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path: root/drivers/iommu/arm-smmu-v3.c
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* iommu/arm-smmu: Set domain geometryRobin Murphy2016-09-161-0/+2
* iommu/arm-smmu: Set PRIVCFG in stage 1 STEsRobin Murphy2016-09-161-1/+6
* iommu/arm-smmu: Support non-PCI devices with SMMUv3Robin Murphy2016-09-161-6/+31
* iommu/arm-smmu: Implement of_xlate() for SMMUv3Robin Murphy2016-09-161-170/+128
* iommu/arm-smmu: Fall back to global bypassRobin Murphy2016-09-161-4/+44
* iommu/arm-smmu: Disable interrupts whilst holding the cmdq lockWill Deacon2016-09-161-2/+3
* iommu/arm-smmu: Fix polling of command queueJean-Philippe Brucker2016-09-161-19/+9
* iommu/arm-smmu: Fix event queues synchronizationJean-Philippe Brucker2016-09-161-84/+66
* iommu/arm-smmu: Don't BUG() if we find aborting STEs with disable_bypassWill Deacon2016-08-191-0/+3
* iommu/arm-smmu: Fix CMDQ error handlingWill Deacon2016-08-191-2/+2
* Merge branch 'for-joerg/arm-smmu/updates' of git://git.kernel.org/pub/scm/lin...Joerg Roedel2016-07-121-0/+2
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| * iommu/arm-smmu: request pcie devices to enable ACSWei Chen2016-07-011-0/+2
* | iommu/arm-smmu: Wire up map_sg for arm-smmu-v3Jean-Philippe Brucker2016-06-131-0/+1
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* remove lots of IS_ERR_VALUE abusesArnd Bergmann2016-05-271-9/+9
* iommu/arm-smmu: Use per-domain page sizes.Robin Murphy2016-05-091-9/+10
* iommu/arm-smmu: Treat IOMMU_DOMAIN_DMA as bypass for nowWill Deacon2016-02-181-1/+6
* iommu/arm-smmu: Don't fail device attach if already attached to a domainWill Deacon2016-02-181-21/+12
* iommu/arm-smmu: Support DMA-API domainsRobin Murphy2016-02-181-1/+9
* iommu/arm-smmu: Use STE.S1STALLD only when supportedPrem Mallappa2015-12-171-3/+12
* iommu/arm-smmu: Fix write to GERRORN registerPrem Mallappa2015-12-171-12/+12
* iommu/arm-smmu: Invalidate TLBs properlyRobin Murphy2015-12-171-1/+4
* iommu/io-pgtable: Indicate granule for TLB maintenanceRobin Murphy2015-12-171-1/+1
* iommu/arm-smmu: Handle unknown CERROR values gracefullyWill Deacon2015-12-171-3/+5
* iommu/arm-smmu: Correct group reference countPeng Fan2015-12-171-7/+11
* iommu/arm-smmu: Use incoming shareability attributes in bypass modeWill Deacon2015-12-171-0/+5
* iommu/arm-smmu: Convert DMA buffer allocations to the managed APIWill Deacon2015-12-171-111/+21
* iommu/arm-smmu: Remove #define for non-existent PRIQ_0_OF fieldWill Deacon2015-12-171-1/+0
*---. Merge branches 'x86/vt-d', 'arm/omap', 'arm/smmu', 's390', 'core' and 'x86/am...Joerg Roedel2015-11-021-44/+111
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| | | * iommu/arm-smmu: Switch to device_group call-backJoerg Roedel2015-10-221-0/+1
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| | * iommu/arm-smmu: Add support for MSI on SMMUv3Marc Zyngier2015-10-151-8/+97
| | * iommu/arm-smmu: Fix error checking for ASID and VMID allocationWill Deacon2015-10-151-4/+5
| | * iommu/arm-smmu: Use drvdata instead of maintaining smmu_devices listWill Deacon2015-10-141-33/+9
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* | iommu/arm-smmu: Use correct address mask for CMD_TLBI_S2_IPAWill Deacon2015-09-221-3/+6
* | iommu/arm-smmu: Ensure IAS is set correctly for AArch32-capable SMMUsWill Deacon2015-09-221-3/+9
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* iommu/arm-smmu: Remove arm_smmu_flush_pgtable()Robin Murphy2015-08-061-10/+0
* iommu/arm-smmu: Clean up DMA API usageRobin Murphy2015-08-061-15/+3
* iommu/arm-smmu: Treat unknown OAS as 48-bitWill Deacon2015-08-061-4/+4
* iommu/arm-smmu: Limit 2-level strtab allocation for small SID sizesWill Deacon2015-07-311-3/+11
* iommu/arm-smmu: Fix MSI memory attributes to match specificationMarc Zyngier2015-07-311-6/+6
* iommu/arm-smmu: Fix enabling of PRIQ interruptMarc Zyngier2015-07-311-3/+5
* iommu/arm-smmu: Skip the execution of CMD_PREFETCH_CONFIGZhen Lei2015-07-081-1/+31
* iommu/arm-smmu: Enlarge STRTAB_L1_SZ_SHIFT to support larger sidsizeZhen Lei2015-07-081-2/+3
* iommu/arm-smmu: Fix the values of ARM64_TCR_{I,O}RGN0_SHIFTZhen Lei2015-07-081-2/+2
* iommu/arm-smmu: Fix LOG2SIZE setting for 2-level stream tablesWill Deacon2015-07-081-8/+9
* iommu/arm-smmu: Fix the index calculation of strtabZhen Lei2015-07-081-1/+1
* iommu/arm-smmu: Delete an unnecessary check before the function call "free_io...Markus Elfring2015-06-291-2/+1
* iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devicesWill Deacon2015-05-291-0/+2670
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