summaryrefslogtreecommitdiffstats
path: root/drivers/iommu/exynos-iommu.c
Commit message (Collapse)AuthorAgeFilesLines
* iommu/exynos: Fix trivial typosSachin Kamat2014-08-191-25/+26
| | | | | | | | | Fixed trivial typos and grammar to improve readability. Changed w/a to workaround. Signed-off-by: Sachin Kamat <sachin.kamat@samsung.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu: Constify struct iommu_opsThierry Reding2014-07-071-1/+1
| | | | | | | | This structure is read-only data and should never be modified. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Fix checkpatch warningSachin Kamat2014-05-261-0/+3
| | | | | | | | Silences the following type of warnings: WARNING: Missing a blank line after declarations Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Remove unnecessary "&" from function pointersBjorn Helgaas2014-05-141-9/+9
| | | | | | | | Remove unnecessary "&" from function pointers in exynos_iommu_ops. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Apply workaround of caching fault page table entriesCho KyongHo2014-05-131-17/+146
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains 2 workaround for the System MMU v3.x. System MMU v3.2 and v3.3 has FLPD cache that caches first level page table entries to reduce page table walking latency. However, the FLPD cache is filled with a first level page table entry even though it is not accessed by a master H/W because System MMU v3.3 speculatively prefetches page table entries that may be accessed in the near future by the master H/W. The prefetched FLPD cache entries are not invalidated by iommu_unmap() because iommu_unmap() only unmaps and invalidates the page table entries that is mapped. Because exynos-iommu driver discards a second level page table when it needs to be replaced with another second level page table or a first level page table entry with 1MB mapping, It is required to invalidate FLPD cache that may contain the first level page table entry that points to the second level page table. Another workaround of System MMU v3.3 is initializing the first level page table entries with the second level page table which is filled with all zeros. This prevents System MMU prefetches 'fault' first level page table entry which may lead page fault on access to 16MiB wide. System MMU 3.x fetches consecutive page table entries by a page table walking to maximize bus utilization and to minimize TLB miss panelty. Unfortunately, functional problem is raised with the fetching behavior because it fetches 'fault' page table entries that specifies no translation information and that a valid translation information will be written to in the near future. The logic in the System MMU generates page fault with the cached fault entries that is no longer coherent with the page table which is updated. There is another workaround that must be implemented by I/O virtual memory manager: any two consecutive I/O virtual memory area must have a hole between the two that is larger than or equal to 128KiB. Also, next I/O virtual memory area must be started from the next 128KiB boundary. 0 128K 256K 384K 512K |-------------|---------------|-----------------|----------------| |area1---------------->|.........hole...........|<--- area2 ----- The constraint is depicted above. The size is selected by the calculation followed: - System MMU can fetch consecutive 64 page table entries at once 64 * 4KiB = 256KiB. This is the size between 128K ~ 384K of the above picture. This style of fetching is 'block fetch'. It fetches the page table entries predefined consecutive page table entries including the entry that is the reason of the page table walking. - System MMU can prefetch upto consecutive 32 page table entries. This is the size between 256K ~ 384K. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Turn on useful configuration optionsCho KyongHo2014-05-131-4/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This turns on FLPD_CACHE, ACGEN and SYSSEL. FLPD_CACHE is a cache of 1st level page table entries that contains the address of a 2nd level page table to reduce latency of page table walking. ACGEN is architectural clock gating that gates clocks by System MMU itself if it is not active. Note that ACGEN is different from clock gating by the CPU. ACGEN just gates clocks to the internal logic of System MMU while clock gating by the CPU gates clocks to the System MMU. SYSSEL selects System MMU version in some Exynos SoCs. Some Exynos SoCs have an option to select System MMU versions exclusively because the SoCs adopts new System MMU version experimentally. This also always selects LRU as TLB replacement policy. Selecting TLB replacement policy is deprecated from System MMU 3.2. TLB in System MMU 3.3 has single TLB replacement policy, LRU. The bit of MMU_CFG selecting TLB replacement policy is remained as reserved. QoS value of page table walking is set to 15 (highst value). System MMU 3.3 can inherit QoS value of page table walking from its master H/W's transaction. This new feature is enabled by default and QoS value written to MMU_CFG is ignored. This patch also adds simplifies the sysmmu version checking by introducing some macros. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Support for device treeCho KyongHo2014-05-131-125/+158
| | | | | | | | | | | | This commit adds device tree support for System MMU. Also, system mmu handling is improved. Previously, an IOMMU domain is bound to a System MMU which is not correct. This patch binds an IOMMU domain with the master device of a System MMU. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Enhanced error messagesCho KyongHo2014-05-131-14/+9
| | | | | | | | | Some redundant error message is removed and some error messages are changed to error level from debug level. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Add devices attached to the System MMU to an IOMMU groupAntonios Motakis2014-05-131-0/+28
| | | | | | | | | | | | | Patch written by Antonios Motakis <a.motakis@virtualopensystems.com>: IOMMU groups are expected by certain users of the IOMMU API, e.g. VFIO. Since each device is behind its own System MMU, we can allocate a new IOMMU group for each device. Reviewed-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Antonios Motakis <a.motakis@virtualopensystems.com> Signed-off-by: Shaik Ameeer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Use exynos-iommu specific typedefCho KyongHo2014-05-131-42/+59
| | | | | | | | | | | | This commit introduces sysmmu_pte_t for page table entries and sysmmu_iova_t vor I/O virtual address that is manipulated by exynos-iommu driver. The purpose of the typedef is to remove dependencies to the driver code from the change of CPU architecture from 32 bit to 64 bit. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Change rwlock to spinlockCho KyongHo2014-05-131-13/+14
| | | | | | | | | | Since acquiring read_lock is not more frequent than write_lock, it is not beneficial to use rwlock, this commit changes rwlock to spinlock. Reviewed-by: Grant Grundler <grundler@chromium.org> Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Remove custom fault handlerCho KyongHo2014-05-131-56/+24
| | | | | | | | | | | This commit removes custom fault handler. The device drivers that need to register fault handler can register with iommu_set_fault_handler(). CC: Grant Grundler <grundler@chromium.org> Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Gating clocks of master H/WCho KyongHo2014-05-131-2/+38
| | | | | | | | | | | | | | | This patch gates clocks of master H/W as well as clocks of System MMU if master clocks are specified. Some Exynos SoCs (i.e. GScalers in Exynos5250) have dependencies in the gating clocks of master H/W and its System MMU. If a H/W is the case, accessing control registers of System MMU is prohibited unless both of the gating clocks of System MMU and its master H/W. CC: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Use managed device helper functionsCho KyongHo2014-05-131-43/+25
| | | | | | | | This patch uses managed device helper functions in the probe(). Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Remove dbgname from drvdata of a System MMUCho KyongHo2014-05-131-19/+13
| | | | | | | | | | This patch removes dbgname member from sysmmu_drvdata structure. Kernel message for debugging already has the name of a single System MMU node. It also removes some compilation warnings. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Always enable runtime PMCho KyongHo2014-05-131-2/+1
| | | | | | | | | | | | Checking if the probing device has a parent device was just to discover if the probing device is involved in a power domain when the power domain controlled by Samsung's custom implementation. Since generic IO power domain is applied, it is required to remove the condition to see if the probing device has a parent device. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Add missing cache flush for removed page table entriesCho KyongHo2014-05-131-0/+2
| | | | | | | | | | | | | This commit adds cache flush for removed small and large page entries in exynos_iommu_unmap(). Missing cache flush of removed page table entries can cause missing page fault interrupt when a master IP accesses an unmapped area. Reviewed-by: Tomasz Figa <t.figa@samsung.com> Tested-by: Grant Grundler <grundler@chromium.org> Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Remove prefetch buffer settingCho KyongHo2014-05-131-14/+0
| | | | | | | | | | | | | | | | Prefetch buffer is a cache of System MMU 3.x and caches a block of page table entries to make effect of larger page with small pages. However, how to control prefetch buffers and the specifications of prefetch buffers different from minor versions of System MMU v3. Prefetch buffers must be controled with care because there are some restrictions in H/W design. The interface and implementation to initiate prefetch buffers will be prepared later. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Fix L2TLB invalidationCho KyongHo2014-05-131-5/+27
| | | | | | | | | | | | | | | | | | | | L2TLB is 8-way set-associative TLB with 512 entries. The number of sets is 64. A single 4KB(small page) translation information is cached only to a set whose index is the same with the lower 6 bits of the page frame number. A single 64KB(large page) translation information can be cached to any 16 sets whose top two bits of their indices are the same with the bit [5:4] of the page frame number. A single 1MB(section) or larger translation information can be cached to any set in the TLB. It is required to invalidate entire sets that may cache the target translation information to guarantee that the L2TLB has no stale data. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Allocate lv2 page table from own slabCho KyongHo2014-05-131-6/+28
| | | | | | | | | | Since kmalloc() does not guarantee that the allignment of 1KiB when it allocates 1KiB, it is required to allocate lv2 page table from own slab that guarantees alignment of 1KiB Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Change error handling when page table update is failedCho KyongHo2014-05-131-14/+44
| | | | | | | | | This patch changes not to panic on any error when updating page table. Instead prints error messages with callstack. Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Fix build errorsCho KyongHo2014-05-131-170/+85
| | | | | | | | | | | | | | | | | | | | | | | | | Commit 25e9d28d92 (ARM: EXYNOS: remove system mmu initialization from exynos tree) removed arch/arm/mach-exynos/mach/sysmmu.h header without removing remaining use of it from exynos-iommu driver, thus causing a compilation error. This patch fixes the error by removing respective include line from exynos-iommu.c. Use of __pa and __va macro is changed to virt_to_phys and phys_to_virt which are recommended in driver code. printk formatting of physical address is also fixed to %pa. Also System MMU driver is changed to control only a single instance of System MMU at a time. Since a single instance of System MMU has only a single clock descriptor for its clock gating, single address range for control registers, there is no need to obtain two or more clock descriptors and ioremaped region. CC: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
* iommu/exynos: Remove dead code (set_prefbuf)Grant Grundler2013-08-141-44/+0
| | | | | | | | exynos_sysmmu_set_prefbuf() is not called any where. Signed-off-by: Grant Grundler <grundler@chromium.org> Reviewed-by: Cho KyongHo <pullip.cho@samsung.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* iommu/fsl: Make iova dma_addr_t in the iommu_iova_to_phys API.Varun Sethi2013-04-021-1/+1
| | | | | | | | This is required in case of PAMU, as it can support a window size of up to 64G (even on 32bit). Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* iommu/exynos: Make exynos_sysmmu_disable staticSachin Kamat2013-02-071-1/+1
| | | | | | | 'exynos_sysmmu_disable' is used only in this file and can be made static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Joerg Roedel <joro@8bytes.org>
* iommu/exynos: use list_del_init instead of list_del/INIT_LIST_HEADWei Yongjun2012-09-181-2/+1
| | | | | | | | | | Using list_del_init() instead of list_del() + INIT_LIST_HEAD(). spatch with a semantic match is used to found this problem. (http://coccinelle.lip6.fr/) Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/exynos: Fix build errorSachin Kamat2012-08-031-3/+3
| | | | | | | | | | | | | Fixes the following build error introduced by commit 3177bb76a8 ("iommu/exynos: Implement DOMAIN_ATTR_GEOMETRY attribute"): drivers/iommu/exynos-iommu.c: In function ‘exynos_iommu_domain_init’: drivers/iommu/exynos-iommu.c:735:2: error: ‘dom’ undeclared (first use in this function) Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Merge tag 'iommu-updates-v3.6-rc1' of ↵Linus Torvalds2012-07-241-0/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU updates from Joerg Roedel: "The most important part of these updates is the IOMMU groups code enhancement written by Alex Williamson. It abstracts the problem that a given hardware IOMMU can't isolate any given device from any other device (e.g. 32 bit PCI devices can't usually be isolated). Devices that can't be isolated are grouped together. This code is required for the upcoming VFIO framework. Another IOMMU-API change written by me is the introduction of domain attributes. This makes it easier to handle GART-like IOMMUs with the IOMMU-API because now the start-address and the size of the domain address space can be queried. Besides that there are a few cleanups and fixes for the NVidia Tegra IOMMU drivers and the reworked init-code for the AMD IOMMU. The latter is from my patch-set to support interrupt remapping. The rest of this patch-set requires x86 changes which are not mergabe yet. So full support for interrupt remapping with AMD IOMMUs will come in a future merge window." * tag 'iommu-updates-v3.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (33 commits) iommu/amd: Fix hotplug with iommu=pt iommu/amd: Add missing spin_lock initialization iommu/amd: Convert iommu initialization to state machine iommu/amd: Introduce amd_iommu_init_dma routine iommu/amd: Move unmap_flush message to amd_iommu_init_dma_ops() iommu/amd: Split enable_iommus() routine iommu/amd: Introduce early_amd_iommu_init routine iommu/amd: Move informational prinks out of iommu_enable iommu/amd: Split out PCI related parts of IOMMU initialization iommu/amd: Use acpi_get_table instead of acpi_table_parse iommu/amd: Fix sparse warnings iommu/tegra: Don't call alloc_pdir with as->lock iommu/tegra: smmu: Fix unsleepable memory allocation at alloc_pdir() iommu/tegra: smmu: Remove unnecessary sanity check at alloc_pdir() iommu/exynos: Implement DOMAIN_ATTR_GEOMETRY attribute iommu/tegra: Implement DOMAIN_ATTR_GEOMETRY attribute iommu/msm: Implement DOMAIN_ATTR_GEOMETRY attribute iommu/omap: Implement DOMAIN_ATTR_GEOMETRY attribute iommu/vt-d: Implement DOMAIN_ATTR_GEOMETRY attribute iommu/amd: Implement DOMAIN_ATTR_GEOMETRY attribute ...
| * iommu/exynos: Implement DOMAIN_ATTR_GEOMETRY attributeJoerg Roedel2012-07-111-0/+4
| | | | | | | | | | | | Implement the attribute for the Samsung Exynos IOMMU driver. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu: Fix typo in iommuMasanari Iida2012-07-241-1/+1
|/ | | | | | | | Correct spelling typo in debug messages and comments in drivers/iommu. Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
* iommu/exynos: Add iommu driver for EXYNOS PlatformsKyongHo Cho2012-05-121-0/+1076
This is the System MMU driver and IOMMU API implementation for EXYNOS SoC platforms. EXYNOS platforms has more than 10 System MMUs dedicated for each multimedia accelerators. The System MMU driver is already in arc/arm/plat-s5p but it is moved to drivers/iommu due to Ohad Ben-Cohen gathered IOMMU drivers there. Any device driver in EXYNOS platforms that needs to control its System MMU must call platform_set_sysmmu() to inform System MMU driver who will control it. platform_set_sysmmu() is defined in <mach/sysmmu.h> Signed-off-by: KyongHo Cho <pullip.cho@samsung.com> Acked-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-14 05:43:57 +0000