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* irqchip/ti-sci-inta: Fix processing of masked irqsGrygorii Strashko2020-04-171-1/+2
| | | | | | | | | | | | | | | | | | | | The ti_sci_inta_irq_handler() does not take into account INTA IRQs state (masked/unmasked) as it uses INTA_STATUS_CLEAR_j register to get INTA IRQs status, which provides raw status value. This causes hard IRQ handlers to be called or threaded handlers to be scheduled many times even if corresponding INTA IRQ is masked. Above, first of all, affects the LEVEL interrupts processing and causes unexpected behavior up the system stack or crash. Fix it by using the Interrupt Masked Status INTA_STATUSM_j register which provides masked INTA IRQs status. Fixes: 9f1463b86c13 ("irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver") Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20200408191532.31252-1-grygorii.strashko@ti.com Cc: stable@vger.kernel.org
* irqchip/ti-sci-inta: Use ERR_CAST inlined function instead of ↵Markus Elfring2019-11-111-2/+3
| | | | | | | | | | | | | | | | | | ERR_PTR(PTR_ERR(...)) A coccicheck run provided information like the following. drivers/irqchip/irq-ti-sci-inta.c:250:9-16: WARNING: ERR_CAST can be used with vint_desc. Generated by: scripts/coccinelle/api/err_cast.cocci Thus adjust the exception handling in one if branch. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/776b7135-26af-df7d-c3a9-4339f7bf1f15@web.de
* irqchip/ti-sci-inta: Fix kernel crash if irq_create_fwspec_mapping failPeter Ujfalusi2019-06-051-2/+2
| | | | | | | | | | | | | | irq_create_fwspec_mapping() can fail, returning 0 as parent_virq. In this case vint_desc is going to be NULL in ti_sci_inta_alloc_irq() which will cause NULL pointer dereference. Also note that irq_create_fwspec_mapping() returns 'unsigned int' so the check '<=' was wrong. Use -EINVAL if irq_create_fwspec_mapping() returned with 0. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* irqchip/ti-sci-inta: Add msi domain supportLokesh Vutla2019-05-011-1/+39
| | | | | | | | | Add a msi domain that is child to the INTA domain. Clients uses the INTA MSI bus layer to allocate irqs in this MSI domain. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
* irqchip/ti-sci-inta: Add support for Interrupt Aggregator driverLokesh Vutla2019-05-011-0/+577
Texas Instruments' K3 generation SoCs has an IP Interrupt Aggregator which is an interrupt controller that does the following: - Converts events to interrupts that can be understood by an interrupt router. - Allows for multiplexing of events to interrupts. Configuration of the interrupt aggregator registers can only be done by a system co-processor and the driver needs to send a message to this co processor over TISCI protocol. Add the required infrastructure to allow the allocation and routing of these events. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>