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path: root/drivers/mmc/imxmmc.c
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* mmc: Move host and card drivers to subdirsPierre Ossman2007-05-011-1137/+0
| | | | | | | Clean up the drivers/mmc directory by moving card and host drivers into subdirectories. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* mmc: Move OCR bit definesPierre Ossman2007-05-011-1/+0
| | | | | | | All host drivers were #include:ing mmc/protocol.h just to get access to the OCR bit defines. Move these to host.h instead. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* [ARM] 4256/1: i.MX/MX1 SDHC fix/workaround of SD card recognition problemsPavel Pisa2007-03-121-1/+12
| | | | | | | | | | | The SDHC controllers cannot process shorter transfers. They has to be handled as longer ones, but it such case CRC error is evaluated. There was a case in the code still, where this error is not ignored as it should to be process these transfers. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* mmc: Allow host drivers to specify max block countPierre Ossman2007-02-041-1/+2
| | | | | | | | | | | | Many controllers have an upper limit on the number of blocks that can be transferred in one request. Allow the host drivers to specify this and make sure we avoid hitting this limit. Also change the max_sectors field to avoid confusion. This makes it map less directly to the block layer limits, but as they didn't apply directly on MMC cards anyway, this isn't a great loss. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* mmc: Allow host drivers to specify a max block sizePierre Ossman2007-02-041-0/+1
| | | | | | | Most controllers have an upper limit on the block size. Allow the host drivers to specify this and make sure we avoid hitting this limit. Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* mmc: Correct definition of R6Philip Langdale2007-01-151-3/+0
| | | | | | | | | | | During development of SDHC support, it was discovered that the definition for R6 was incorrect. This patch fixes that and patches the drivers that do switch on the response type. Signed-off-by: Philip Langdale <philipl@overt.org> Cc: Alex Dubov <oakad@yahoo.com> Cc: Pavel Pisa <ppisa@pikron.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* mmc: constify mmc_host_ops vectorsDavid Brownell2006-12-011-1/+1
| | | | | | | | Now that mmc_host_ops can be constified, update the various drivers to constify those method tables and shrink the writable data segment. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>
* IRQ: Maintain regs pointer globally rather than passing to IRQ handlersDavid Howells2006-10-051-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Maintain a per-CPU global "struct pt_regs *" variable which can be used instead of passing regs around manually through all ~1800 interrupt handlers in the Linux kernel. The regs pointer is used in few places, but it potentially costs both stack space and code to pass it around. On the FRV arch, removing the regs parameter from all the genirq function results in a 20% speed up of the IRQ exit path (ie: from leaving timer_interrupt() to leaving do_IRQ()). Where appropriate, an arch may override the generic storage facility and do something different with the variable. On FRV, for instance, the address is maintained in GR28 at all times inside the kernel as part of general exception handling. Having looked over the code, it appears that the parameter may be handed down through up to twenty or so layers of functions. Consider a USB character device attached to a USB hub, attached to a USB controller that posts its interrupts through a cascaded auxiliary interrupt controller. A character device driver may want to pass regs to the sysrq handler through the input layer which adds another few layers of parameter passing. I've build this code with allyesconfig for x86_64 and i386. I've runtested the main part of the code on FRV and i386, though I can't test most of the drivers. I've also done partial conversion for powerpc and MIPS - these at least compile with minimal configurations. This will affect all archs. Mostly the changes should be relatively easy. Take do_IRQ(), store the regs pointer at the beginning, saving the old one: struct pt_regs *old_regs = set_irq_regs(regs); And put the old one back at the end: set_irq_regs(old_regs); Don't pass regs through to generic_handle_irq() or __do_IRQ(). In timer_interrupt(), this sort of change will be necessary: - update_process_times(user_mode(regs)); - profile_tick(CPU_PROFILING, regs); + update_process_times(user_mode(get_irq_regs())); + profile_tick(CPU_PROFILING); I'd like to move update_process_times()'s use of get_irq_regs() into itself, except that i386, alone of the archs, uses something other than user_mode(). Some notes on the interrupt handling in the drivers: (*) input_dev() is now gone entirely. The regs pointer is no longer stored in the input_dev struct. (*) finish_unlinks() in drivers/usb/host/ohci-q.c needs checking. It does something different depending on whether it's been supplied with a regs pointer or not. (*) Various IRQ handler function pointers have been moved to type irq_handler_t. Signed-Off-By: David Howells <dhowells@redhat.com> (cherry picked from 1b16e7ac850969f38b375e511e3fa2f474a33867 commit)
* [MMC] MMC_CAP_BYTEBLOCK flag for non-log2 block sizes capable hostsRussell King2006-09-241-1/+1
| | | | | | | | | | | | | | | | Some MMC hosts can only handle log2 block sizes. Unfortunately, the MMC password support needs to be able to send non-log2 block sizes. Provide a capability so that the MMC password support can decide whether it should use this support or not. The unfortunate side effect of this host limitation is that any MMC card protected by a password which is not a log2 block size can not be accessed on a host which only allows a log2 block size. This change just adds the flag. The MMC password support code needs updating to use it (if and when it is finally submitted.) Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3751/1: i.MX/MX1 SD/MMC use 512 bytes request for SCR readPavel Pisa2006-09-071-34/+35
| | | | | | | | | | | | | | | | Patch from Pavel Pisa This is another approach to SDHC deficiency workaround. It seems, that previous solution based on 16 bytes (FIFO length size) read is still timing sensitive on genirq and fully preemptive kernels. The new solution is backuped by M9328 UM statement, that only 512 byte block are working properly and by 2.4.26 FreeScale's SDHC code. Jay Monkman reports significant improvement on code based on this driver after applying this change on MX21 as well. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* Remove obsolete #include <linux/config.h>Jörn Engel2006-06-301-1/+0
| | | | | Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
* [MMC] Convert all hosts except mmci to use data->blkszRussell King2006-06-191-1/+1
| | | | | | | | | | | | | The MMC specification allows non-power of two block sizes. As such, we should not pass the log2 block size to host drivers, but instead pass the byte size. However, ARM MMCI can only work with log2 block size, so continue to pass both the log2 block size and byte block size. This means that for the moment, the byte block size must remain a power of two, but this is the first stage of removing this restriction for other hosts. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3531/1: i.MX/MX1 SD/MMC ensure, that clock are stopped before new ↵Pavel Pisa2006-05-191-10/+14
| | | | | | | | | | | | | | command and cleanups Patch from Pavel Pisa There has been problems that for some paths that clock are not stopped during new command programming and initiation. Result is issuing of incorrect command to the card. Some other problems are cleaned too. Noisy report of known ERRATUM #4 has been suppressed. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [MMC] Move set_ios debugging into mmc.cRussell King2006-05-041-4/+0
| | | | | | | | Rather than having every driver duplicate the set_ios debugging, provide a single version in mmc.c which can be expanded as we add additional functionality. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [MMC] PXA and i.MX: don't avoid sending stop command on errorRussell King2006-05-021-1/+1
| | | | | | | | Always send a stop command at the end of a data transfer. If we avoid sending the stop command, some cards remain in data transfer mode, and refuse to accept further read/write commands. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3485/1: i.MX: MX1 SD/MMC fix of unintentional double start possibilityPavel Pisa2006-04-301-11/+43
| | | | | | | | | | | | | | | | | Patch from Pavel Pisa The clock starting imxmci_start_clock() function contains hardware issue workaround, which repeats start attempt, if SDHC does not react on the first trial. But the second start attempt can be taken even, if the first succeed and test code misses time limited clock running phase due to delay caused by schedule to other task or some another device interrupt. This change enables to detect such situation. The performance is not issue, because usually at full clock rate only about six loops in delay cycle are needed. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] 3457/1: i.MX: SD/MMC support for i.MX/MX1Pavel Pisa2006-04-021-0/+1096
Patch from Pavel Pisa This patch adds support of i.MX/MX1 SD/MMC controller. It has been significantly redesigned from the original Sascha Hauer's version to support scatter-gather DMA, to conform to latest Pierre Ossman's and Russell King's MMC-SD Linux 2.6.x infrastructure. The handling of all events has been moved to the softirq context and is designed with no busy-looping in mind. Unfortunately some controller bugs has to be overcome by limited looping about 2-20 usec but these are observed only for initial card recognition phase. There are still some missing/missed IRQs problems under heavy load. Help of somebody with access to the full SDHC design information is probably necessary. Regenerated against 2.6.16-git-060402 to solve clash with other patches. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>