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* mtd: nand: make mtk_ecc.c a separated moduleChuanhong Guo2022-04-271-1/+1
| | | | | | | | | this code will be used in mediatek snfi spi-mem controller with pipelined ECC engine. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220424032527.673605-2-gch981213@gmail.com
* mtd: rawnand: renesas: Add new NAND controller driverMiquel Raynal2021-12-211-0/+1
| | | | | | | | | | | | | | | | | | | Introduce Renesas NAND controller driver which currently supports the following features on R-Car Gen3 and RZ/N1 SoCs: - All ONFI timing modes - Different configurations of its internal ECC controller - On-die (not tested) and software ECC support - Several chips (not tested) - Subpage accesses - DMA and PIO This controller was originally provided by Evatronix before being bought by Cadence. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Ralph Siemsen <ralph.siemsen@linaro.org> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/linux-mtd/20211217142033.353599-3-miquel.raynal@bootlin.com
* mtd: rawnand: pl353: Add support for the ARM PL353 SMC NAND controllerMiquel Raynal2021-06-181-0/+1
| | | | | | | | | | | | This hardware controller is embedded in XilinX Zynq-7000 SoCs and has partial support for Hamming ECC correction. This work is inspired from the original contributions of Punnaiah Choudary Kalluri and Naga Sureshkumar Relli. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Michael Walle <michael@walle.cc> [on zynq-7000] Link: https://lore.kernel.org/linux-mtd/20210610082040.2075611-19-miquel.raynal@bootlin.com
* mtd: rawnand: tango: Remove the driverArnd Bergmann2021-02-011-1/+0
| | | | | | | | | | | | | The tango platform is getting removed [1], so the driver is no longer needed. [1] https://lore.kernel.org/linux-arm-kernel/20210120124812.2800027-1-arnd@kernel.org/T/ Cc: Marc Gonzalez <marc.w.gonzalez@free.fr> Cc: Mans Rullgard <mans@mansr.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210120150555.1610132-1-arnd@kernel.org
* mtd: rawnand: rockchip: NFC driver for RK3308, RK2928 and othersYifeng Zhao2020-12-101-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver supports Rockchip NFC (NAND Flash Controller) found on RK3308, RK2928, RKPX30, RV1108 and other SOCs. The driver has been tested using 8-bit NAND interface on the ARM based RK3308 platform. Support Rockchip SoCs and NFC versions: - PX30 and RK3326(NFCv900). ECC: 16/40/60/70 bits/1KB. CLOCK: ahb and nfc. - RK3308 and RV1108(NFCv800). ECC: 16 bits/1KB. CLOCK: ahb and nfc. - RK3036 and RK3128(NFCv622). ECC: 16/24/40/60 bits/1KB. CLOCK: ahb and nfc. - RK3066, RK3188 and RK2928(NFCv600). ECC: 16/24/40/60 bits/1KB. CLOCK: ahb. Supported features: - Read full page data by DMA. - Support HW ECC(one step is 1KB). - Support 2 - 32K page size. - Support 8 CS(depend on SoCs) Limitations: - No support for the ecc step size is 512. - Untested on some SoCs. - No support for subpages. - No support for the builtin randomizer. - The original bad block mask is not supported. It is recommended to use the BBT(bad block table). Suggested-by: Johan Jonker <jbx6244@gmail.com> Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20201210002134.5686-3-yifeng.zhao@rock-chips.com
* mtd: rawnand: Add NAND controller support on Intel LGM SoCRamuthevar Vadivel Murugan2020-12-101-0/+1
| | | | | | | | | | | | | | This patch adds the new IP of Nand Flash Controller(NFC) support on Intel's Lightning Mountain(LGM) SoC. DMA is used for burst data transfer operation, also DMA HW supports aligned 32bit memory address and aligned data access by default. DMA burst of 8 supported. Data register used to support the read/write operation from/to device. Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20201110012333.18647-3-vadivel.muruganx.ramuthevar@linux.intel.com
* mtd: nand: ecc-hamming: Move Hamming code to the generic NAND layerMiquel Raynal2020-12-101-1/+0
| | | | | | | Hamming ECC code might be later re-used by the SPI NAND layer. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-12-miquel.raynal@bootlin.com
* mtd: nand: ecc-bch: Move BCH code to the generic NAND layerMiquel Raynal2020-11-301-1/+0
| | | | | | | BCH ECC code might be later re-used by the SPI NAND layer. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200929230124.31491-3-miquel.raynal@bootlin.com
* mtd: rawnand: arasan: Add new Arasan NAND controllerMiquel Raynal2020-05-241-0/+1
| | | | | | | | | | | | Add the Arasan NAND controller driver. This brings only NAND controller support. The ECC engine being a bit subtle, hardware ECC support will be added in a second time. This work is based on contributions from Naga Sureshkumar Relli. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200519074549.23673-8-miquel.raynal@bootlin.com
* mtd: rawnand: Remove the cmx270 NAND controller driverBoris Brezillon2020-05-241-1/+0
| | | | | | | | | | The CM-X270 board has been removed, we can remove the custom NAND driver as well. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200518163300.304732-1-boris.brezillon@collabora.com
* mtd: rawnand: Add new Cadence NAND driver to MTD subsystemPiotr Sroka2019-10-041-0/+1
| | | | | | | | | Add new Cadence NAND driver to MTD subsystem Signed-off-by: Piotr Sroka <piotrs@cadence.com> Reported-by: kbuild test robot <lkp@intel.com> Reported-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: remove w90x900 driverArnd Bergmann2019-08-261-1/+0
| | | | | | | | The ARM w90x900 platform is getting removed, so this driver is obsolete. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Add Macronix raw NAND controller driverMason Yang2019-08-261-0/+1
| | | | | | | Add a driver for Macronix raw NAND controller. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: fix build dependencyAnders Roxell2019-04-181-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | When enabling CONFIG_MTD_NAND_ECC_SW_BCH as a module, the MTD_NAND_ECC_SW_BCH depends on MTD_NAND, but the module controlled by MTD_NAND links against the module controlled by MTD_NAND_ECC_SW_BCH. This leads to the following link failure. aarch64-linux-gnu-ld: drivers/mtd/nand/raw/nand_base.o: in function `nand_cleanup': ../drivers/mtd/nand/raw/nand_base.c:5886: undefined reference to `nand_bch_free' aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5886:(.text+0x9928): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `nand_bch_free' aarch64-linux-gnu-ld: drivers/mtd/nand/raw/nand_base.o: in function `nand_set_ecc_soft_ops': ../drivers/mtd/nand/raw/nand_base.c:5093: undefined reference to `nand_bch_calculate_ecc' aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5093:(.text+0xe914): relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21 against undefined symbol `nand_bch_calculate_ecc' aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5093: undefined reference to `nand_bch_calculate_ecc' aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5094: undefined reference to `nand_bch_correct_data' aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5094:(.text+0xe934): relocation truncated to fit: R_AARCH64_ADR_PREL_PG_HI21 against undefined symbol `nand_bch_correct_data' aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5094: undefined reference to `nand_bch_correct_data' aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5148: undefined reference to `nand_bch_init' aarch64-linux-gnu-ld: ../drivers/mtd/nand/raw/nand_base.c:5148:(.text+0xebbc): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `nand_bch_init' Rework CONFIG_MTD_NAND_ECC_SW_BCH from tristate to bool, and then link the nand_bch.o file into nand.ko if its enabled. Fixes: 51ef1d0b2095 ("mtd: nand: Clarify Kconfig entry for software BCH ECC algorithm") Signed-off-by: Anders Roxell <anders.roxell@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Clarify Kconfig entry MTD_NANDMiquel Raynal2019-04-181-1/+1
| | | | | | | | MTD_NAND is large and encloses much more than what the symbol is actually used for: raw NAND. Clarify the symbol by naming it MTD_RAW_NAND instead. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: nand: Clarify Kconfig entry for software Hamming ECC entriesMiquel Raynal2019-04-181-1/+1
| | | | | | | | | | The software Hamming ECC correction implementation is referred as MTD_NAND_ECC which is too generic. Rename it MTD_NAND_ECC_SW_HAMMING. Also rename MTD_NAND_ECC_SMC which is an SMC quirk in the Hamming implementation as MTD_NAND_ECC_SW_HAMMING_SMC. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: nand: Clarify Kconfig entry for software BCH ECC algorithmMiquel Raynal2019-04-181-1/+1
| | | | | | | There is no point in having two distinct entries, merge them and rename the symbol for more clarity: MTD_NAND_ECC_SW_BCH Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Move drivers for Ingenic SoCs to subfolderPaul Cercueil2019-03-211-2/+1
| | | | | | | | Before adding support for more SoCs and seeing the number of files for these drivers grow, we move them to their own subfolder to keep it tidy. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: meson: add support for Amlogic NAND flash controllerLiang Yang2019-02-051-0/+1
| | | | | | | | | | Add initial support for the Amlogic NAND flash controller which is available on Meson SoCs. Signed-off-by: Liang Yang <liang.yang@amlogic.com> Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driverChristophe Kerello2019-02-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The driver adds the support for the STMicroelectronics FMC2 NAND Controller found on STM32MP SOCs. This patch is based on FMC2 command sequencer. The purpose of the command sequencer is to facilitate the programming and the reading of NAND flash pages with the ECC and to free the CPU of sequencing tasks. It requires one DMA channel for write and two DMA channels for read operations. Only NAND_ECC_HW mode is actually supported. The driver supports a maximum 8k page size. The following ECC strength and step size are currently supported: - nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8) - nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4) - nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Extended ECC based on Hamming) This patch has been tested on Micron MT29F8G08ABACAH4 and MT29F8G16ABACAH4 Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: ESMT: retrieve ECC requirements from 5th id byteMarcel Ziswiler2018-10-031-0/+1
| | | | | | | | | | | This patch enables support to read the ECC level from the NAND flash using ESMT SLC NAND ID byte 5 information as documented e.g. in the following data sheet: https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F59L1G81LA(2Y).pdf Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Move JEDEC code to nand_jedec.cBoris Brezillon2018-10-031-0/+1
| | | | | | | | This moves JEDEC related code to nand_jedec.c and JEDEC related struct/macros to include/linux/mtd/jedec.h. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Move ONFI code to nand_onfi.cBoris Brezillon2018-10-031-0/+1
| | | | | | | | This moves ONFI related code to nand_onfi.c and ONFI related struct/macros to include/linux/mtd/onfi.h. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Move legacy code to nand_legacy.cBoris Brezillon2018-10-031-1/+1
| | | | | | | | Allows us to move a few hundred lines of deprecated code out of the core file which is quite big. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: Remove docg4Boris Brezillon2018-10-031-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The diskonchip G4 driver does not fit very well in the raw/parallel NAND framework simply because such chips have an internal controller translating DoC-specific commands into NAND ones. Keeping such a driver in the raw NAND framework is a real burden for NAND maintainers. Not to mention that some parts of this driver are a bit worrisome: - writes are done by subpages, even though we're interfacing with an MLC chip which are known to not support subpage writes very well (it might be that the FTL handles the complexity for us though) - some part of the code are simply ignoring return codes of function that can fail in a few occasions - there's a hack to support OOB writes when no data is provided. This operation is not supported by the chip and should have been rejected, and nandwrite and other userspace tools should have been patched to deal with such devices - the driver is apparently broken when ignore_badblocks module param is not set to 1 and nobody noticed that (don't know since when this is the case, but it's not a recent change) http://lists.infradead.org/pipermail/linux-mtd/2018-July/082472.html Add to that the fact that we already have a docg3 driver in drivers/mtd/devices/docg3.c and, looking at the code (and regs), it seems docg3 and docg4 have a lot in common (even the author of this driver seemed to have realized that interfacing with the raw NAND framework might have been a bad idea http://lists.infradead.org/pipermail/linux-mtd/2012-January/039517.html). For all these reasons, I'm proposing to remove this driver. If anyone ever wants to add support for this chip back, I'd suggest extending the docg3 driver instead of adding a completely new driver. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Cc: Mike Dunn <mikedunn@newsguy.com> Cc: Robert Jarzmik <robert.jarzmik@free.fr> Cc: Sergey Larin <cerg2010cerg2010@mail.ru> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: add NVIDIA Tegra NAND Flash controller driverStefan Agner2018-07-021-0/+1
| | | | | | | | | | | | | | Add support for the NAND flash controller found on NVIDIA Tegra 2 SoCs. This implementation does not make use of the command queue feature. Regular operations using ->exec_op() use PIO mode for data transfers. Raw, ECC and OOB read/writes make use of the DMA mode for data transfer. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
* mtd: rawnand: remove bf5xx_nand driverArnd Bergmann2018-03-171-1/+0
| | | | | | | | The blackfin architecture is getting removed, so this driver has become obsolete. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
* Merge tag 'nand/pxa3xx-removal' of git://git.infradead.org/linux-mtd into ↵Boris Brezillon2018-03-021-1/+0
| | | | | | nand/next Remove the pxa3xx_nand driver (replaced by marvell_nand).
* mtd: nand: move raw NAND related code to the raw/ subdirBoris Brezillon2018-02-161-0/+68
As part of the process of sharing more code between different NAND based devices, we need to move all raw NAND related code to the raw/ subdirectory. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
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