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| | * | | mtd: spi-nor: sfdp: add/use local variable in spi_nor_parse_bfpt()Sergei Shtylyov2020-05-311-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Despite of how spi_nor_parse_bfpt() abuses the structure fields during their calculation, gcc manages to make some decent code out of that. :-) Yet adding a local variable to store the BFPT DWORDs during calculations still saves 12 bytes of the object code (AArch64 gcc 4.8.5)... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: sfdp: prepare BFPT parsing for JESD216 rev DPratyush Yadav2020-05-302-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | JESD216 rev D makes BFPT 20 DWORDs. Update the BFPT size define to reflect that. The check for rev A or later compared the BFPT header length with the maximum BFPT length, BFPT_DWORD_MAX. Since BFPT_DWORD_MAX was 16, and so was the BFPT length for both rev A and B, this check worked fine. But now, since BFPT_DWORD_MAX is 20, it means this check will also stop BFPT parsing for rev A or B, since their length is 16. So, instead check for BFPT_DWORD_MAX_JESD216 to stop BFPT parsing for the first JESD216 version, and check for BFPT_DWORD_MAX_JESD216B for the next two versions. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: sfdp: default to addr_width of 3 for configurable widthsPratyush Yadav2020-05-301-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | JESD216D.01 says that when the address width can be 3 or 4, it defaults to 3 and enters 4-byte mode when given the appropriate command. So, when we see a configurable width, default to 3 and let flash that default to 4 change it in a post-bfpt fixup. This fixes SMPT parsing for flashes with configurable address width. If the SMPT descriptor advertises variable address width, we use nor->addr_width as the address width. But since it was not set to any value from the SFDP table, the read command uses an address width of 0, resulting in an incorrect read being issued. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: Add support for Cypress cy15x104qSascha Hauer2020-05-281-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Cypress cy15b104q and cy15v104q are 4Mbit serial SPI F-RAM devices. Add support for them to the spi-nor driver. The actual Device ID of this chip is 7f 7f 7f 7f 7f 7f c2 2c 04. That is six times the continuation code 7f followed by c2 for Ramtron. Unfortunately the chip sends the Device ID in reversed order, so the continuation code is not at the beginning, but instead at the end. Even more unfortunate is that when reading further the chip sends more 7f codes which means we are not even able to count the continuation codes. We can only hope that this reversed Device ID will never match any other devices ID. Collisions are improbable as of now, the solution from above is good enough. In case of future collisions one can introduce an INFO9 macro, with the downsize that struct flash_info would grow and we have lots of flashes. A more elegant solution would be to introduce dedicated flash ID tables for each bank in JESP106BA. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> [tudor.ambarus@microchip.com: amend commit description with possible future solutions in case collisions occur.] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: Fix SPI NOR acronymTudor Ambarus2020-05-286-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The correct terminology is serial NOR flash or SPI NOR. s/SPI-NOR/SPI NOR and s/spi-nor/SPI NOR across the subsystem. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
| | * | | mtd: spi-nor: spansion: Differentiate between s25fl256s and s25fs256sTudor Ambarus2020-05-281-6/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | s25fs256s was identified as s25fl256s. Differentiate between them by the Family ID using the INFO6 macro. Fixes: b199489d37b2 ("mtd: spi-nor: add the framework for SPI NOR") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@nokia.com>
| | * | | mtd: spi-nor: Add support for s25fs128s1Yicong Yang2020-05-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Cypress s25fs128s1 flash. Previously the flash is decoded as s25fl129p1 by mistake. Add it in the flash info list to correctly decode. The flash also needs a fixup for s25fs-s family. Further capability of the flash will be parsed from bfpt. The flash has been tested under SPI/DUAL/QUAD mode on hisi-sfc-v3xx controller, all the write/read/erase works well. Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: spansion: fix writes on S25FS512SSergei Shtylyov2020-05-281-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Spansion S25FS-S family has an issue in the Basic Flash Parameter Table (BFPT): Dword-11 bits 7:4 specify a page size of 512 bytes. Actually this is configurable in the vendor unique register (CR3V) and even the factory default setting is to "wrap at 256 bytes", so blindly relying on BFPT breaks the page writes on these chips. Add the post-BFPT fixup which restores the default page size of 256 bytes -- to properly read CR3V this early is quite intrusive and should better be done as a new feature; Alexander Sverdlin had the patch doing that: https://patchwork.ozlabs.org/project/linux-mtd/patch/20200227123657.26030-1-alexander.sverdlin@nokia.com/ Fixes: dfd2b74530e ("mtd: spi-nor: add Spansion S25FS512S ID") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@nokia.com> Tested-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: Fix description of the sr_ready() return valueTudor Ambarus2020-04-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The functions return 1 if ready, 0 if not ready, -errno on errors. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
| | * | | mtd: spi-nor: Uniformize the return value in spi_nor_*_ready()Tudor Ambarus2020-04-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_nor_ready() returns 1 if ready, 0 if not ready and -errno on errors. Do the same in all the spi_nor_*_ready() children. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
| | * | | mtd: spi-nor: micron-st: Enable locking for n25q00Jungseung Lee2020-04-291-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | n25q00 uses the 4 bit Block Protection scheme and supports Top/Bottom protection via the BP and TB bits of the Status Register. Enable locking for n25q00. Tested with cirrus controller. Signed-off-by: Jungseung Lee <js07.lee@samsung.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: macronix: Add support for mx25u51245gMason Yang2020-04-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx25u51245g is a mass production for new design and replace mx66u51235f(phase out). Validated by read, erase, read back, write and read back on Xilinx Zynq PicoZed FPGA board which included Macronix SPI Host (driver/spi/spi-mxic.c). Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: macronix: Add support for mx25l51245gMason Yang2020-04-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mx25l51245g is a mass production for new design and replace mx66l51235l(phase out). Validated by read, erase, read back, write and read back on Xilinx Zynq PicoZed FPGA board which included Macronix SPI Host (driver/spi/spi-mxic.c). Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: core: fix kernel-doc typo for spi_nor_[{info|sfdp}_]init_params()Sergei Shtylyov2020-04-281-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When spi_nor_info_init_params(), spi_nor_sfdp_init_params(), and spi_nor_init_params() were added, the kernel-doc for them contained a typo: 'struct spi-nor' instead of 'struct spi_nor' -- fix them. Fixes: 1c1d8d98e1c7 ("mtd: spi-nor: Split spi_nor_init_params()") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: core: fix kernel-doc typo for spi_nor_manufacturer_init_params()Sergei Shtylyov2020-04-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When spi_nor_manufacturer_init_params() was added, the kernel-doc for it contained a typo: 'struct spi-nor' instead of 'struct spi_nor' -- fix it. Fixes: ce0b6f3f3c43 ("mtd: spi-nor: Add default_init() hook to tweak flash parameters") Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: Enable locking for n25q128a11Xiang Chen2020-04-211-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As 4bit block protection patchset for some micron models are merged, n25q128a11 also uses 4 bit Block Protection scheme, so enable locking for it. Tested it on n25q128a11, the locking functions work well. Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Reviewed-by: Jungseung Lee <js07.lee@samsung.com> Tested-by: Shreyas Joshi <shreyasjoshi15@gmail.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| | * | | mtd: spi-nor: spansion: Enable dual and quad read for s25fl256s0Takahiro Kuwano2020-04-201-1/+3
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The s25fl256s0 supports dual and quad read like s25fl256s1. Enable it by adding SPI_NOR_DUAL_READ and SPI_NOR_QUAD_READ flags to the flash_info entry. Tested with the device and confirmed that is working. Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@cypress.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
| * | | Merge tag 'nand/for-5.8' of ↵Richard Weinberger2020-06-0168-2423/+3974
| |\ \ \ | | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/next Raw NAND core changes: * Stop using nand_release(), patched all drivers. * Give more information about the ECC weakness when not matching the chip's requirement. * MAINTAINERS updates. * Support emulated SLC mode on MLC NANDs. * Support "constrained" controllers, adapt the core and ONFI/JEDEC table parsing and Micron's code. * Take check_only into account. * Add an invalid ECC mode to discriminate with valid ones. * Return an enum from of_get_nand_ecc_algo(). * Drop OOB_FIRST placement scheme. * Introduce nand_extract_bits(). * Ensure a consistent bitflips numbering. * BCH lib: - Allow easy bit swapping. - Rework a little bit the exported function names. * Fix nand_gpio_waitrdy(). * Propage CS selection to sub operations. * Add a NAND_NO_BBM_QUIRK flag. * Give the possibility to verify a read operation is supported. * Add a helper to check supported operations. * Avoid indirect access to ->data_buf(). * Rename the use_bufpoi variables. * Fix comments about the use of bufpoi. * Rename a NAND chip option. * Reorder the nand_chip->options flags. * Translate obscure bitfields into readable macros. * Timings: - Fix default values. - Add mode information to the timings structure. Raw NAND controller driver changes: * Fixed many error paths. * Arasan - New driver * Au1550nd: - Various cleanups - Migration to ->exec_op() * brcmnand: - Misc cleanup. - Support v2.1-v2.2 controllers. - Remove unused including <linux/version.h>. - Correctly verify erased pages. - Fix Hamming OOB layout. * Cadence - Make cadence_nand_attach_chip static. * Cafe: - Set the NAND_NO_BBM_QUIRK flag * cmx270: - Remove this controller driver. * cs553x: - Misc cleanup - Migration to ->exec_op() * Davinci: - Misc cleanup. - Migration to ->exec_op() * Denali: - Add more delays before latching incoming data * Diskonchip: - Misc cleanup - Migration to ->exec_op() * Fsmc: - Change to non-atomic bit operations. * GPMI: - Use nand_extract_bits() - Fix runtime PM imbalance. * Ingenic: - Migration to exec_op() - Fix the RB gpio active-high property on qi, lb60 - Make qi_lb60_ooblayout_ops static. * Marvell: - Misc cleanup and small fixes * Nandsim: - Fix the error paths, driver wide. * Omap_elm: - Fix runtime PM imbalance. * STM32_FMC2: - Misc cleanups (error cases, comments, timeout valus, cosmetic changes).
| | * | mtd: rawnand: Add an invalid ECC mode to discriminate with valid onesMiquel Raynal2020-05-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND ECC modes (or providers) have their own enumeration but, unlike their algorithms counterpart, there is no invalid or uninitialized value to discriminate between an error and having chosen a no-ECC situation. Add an "invalid" entry for this purpose. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-7-miquel.raynal@bootlin.com
| | * | mtd: rawnand: Return an enum from of_get_nand_ecc_algo()Miquel Raynal2020-05-311-16/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is an enumeration to list ECC algorithm, let's use it instead of returning an int. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-6-miquel.raynal@bootlin.com
| | * | mtd: rawnand: Drop OOB_FIRST placement schemeMiquel Raynal2020-05-312-109/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This scheme has been introduced for the Davinci controller and means that the OOB area must be read *before* the rest of the data. This has nothing to do with the ECC in OOB placement as it could be understood and most importantly, there is no point in having this function out of the Davinci NAND controller driver. A DT property for this scheme has been added but never used, even by the Davinci driver which only uses this scheme to change the default nand_read_page(). Move the main read_page() helper into the Davinci driver and remove the remaining boilerplate. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-4-miquel.raynal@bootlin.com
| | * | mtd: rawnand: Avoid a typedefMiquel Raynal2020-05-311-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In new code, the use of typedef is discouraged. Turn this one in the raw NAND core into a regular enumeration. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-3-miquel.raynal@bootlin.com
| | * | mtd: Fix typo in mtd_ooblayout_set_databytes() descriptionMiquel Raynal2020-05-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a probable copy/paste error: the function works like mtd_ooblayout_set_bytes(), not *_get_bytes(). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/linux-mtd/20200526195633.11543-2-miquel.raynal@bootlin.com
| | * | mtd: rawnand: Stop using nand_release()Miquel Raynal2020-05-311-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This helper is not very useful and very often people get confused: they use nand_release() instead of nand_cleanup(). Now that all drivers have been converted to do not use nand_release() anymore, let's remove this helper. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Jonathan Corbet <corbet@lwn.net> Link: https://lore.kernel.org/linux-mtd/20200519130035.1883-63-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Reorganize ns_cleanup_module()Miquel Raynal2020-05-311-22/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reorganize ns_cleanup_module() to fit the reworked exit path of ns_init_module(). There is no need for a ns_free_lists() function anymore, so drop it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-18-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Rename a label in ns_init_module()Miquel Raynal2020-05-311-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the "error" label to gave it a meaning. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-17-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Manage lists on error in ns_init_module()Miquel Raynal2020-05-311-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lists are filled with calls to ns_parse_weakblocks(), ns_parse_weakpages() and ns_parse_gravepages(). Handle them in the error path, all at the same time. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-16-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Fix the label pointing on nand_cleanup()Miquel Raynal2020-05-311-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop the generic err_exit. The remaining operation to do from this goto statement is to cleanup the NAND allocations, so rename it. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-15-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Free erase_block_wear on errorMiquel Raynal2020-05-311-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Free erase_block_wear on error, which is allocated by ns_setup_wear_reporting(). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-14-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Use an additional label when freeing the nandsim objectMiquel Raynal2020-05-311-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cosmetic change to give a meaning to all labels in this complicated error path. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-13-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Stop using nand_release()Miquel Raynal2020-05-311-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_release() basically calls mtd_device_unregister() and nand_cleanup(). Both helpers should be called after MTD device registration and NAND scan, respectively. Drop nand_release() and use the two helpers directly so that they fit the error path and the labels there. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-12-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Free the partition names in ns_free()Miquel Raynal2020-05-311-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ns_free() is the helper that is called symmetrically to ns_init() and so should free the same objects, including the partition names. Now, callers of ns_free() do not need to free this partition names themselves. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-11-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Free the allocated device on error in ns_init()Miquel Raynal2020-05-311-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nandsim device is allocated and initialized inside ns_init() by a call to ns_alloc_device(), free it on error. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-10-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Free partition names on error in ns_init()Miquel Raynal2020-05-311-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ns_init() function shall free the partition names allocated by ns_get_partition_name() on error. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-9-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Fix the two ns_alloc_device() error pathsMiquel Raynal2020-05-311-9/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ns_alloc_device() helper has actually two distinct path. Handle errors in both of them. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-8-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Remove debugfs entries at unload timeMiquel Raynal2020-05-311-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create a ns_debugfs_remove() helper for that and call it in ns_cleanup_module(). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-7-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Keep track of the created debugfs entriesMiquel Raynal2020-05-311-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Debugfs entries should be removed in the error path, so first, keep track of them. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-6-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Clean error handlingMiquel Raynal2020-05-311-19/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many function calls are done this way: if ((retval = func()) != 0) return retval; while we expect in the kernel function calls like: retval = func(); if (retval) return retval; Apply this change where possible and also use "ret" instead of "retval" in ns_init_module for consistency, as it is only used in this function. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-5-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Use a consistent ns_ prefix for all functionsMiquel Raynal2020-05-311-117/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some functions are prefixed "nandsim_", others "ns_" and many are simply not prefixed at all. Make this file consistent by prefixing all functions by "ns_". This is a mechanical change. Sometimes the line is a bit reworked as well to fit the kernel coding style. For instance, there are several places where displayed strings are cut. When one of this line is changed because of the naming update, the two parts of the strings gets concatenated. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-4-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Use octal permissionsMiquel Raynal2020-05-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Symbolic permissions 'S_IRUSR' are not preferred. Checkpatch.pl advises to use octal permissions '0400'. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-3-miquel.raynal@bootlin.com
| | * | mtd: rawnand: nandsim: Consistent use of 'ns' instead of 'dev'Miquel Raynal2020-05-311-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The nandsim object is called 'ns' almost everywhere, keep it that way everywhere for consistency. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200525085851.17682-2-miquel.raynal@bootlin.com
| | * | mtd: rawnand: brcmnand: support v2.1-v2.2 controllersÁlvaro Fernández Rojas2020-05-311-9/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2.1: tested on Netgear DGND3700v1 (BCM6368) v2.2: tested on Netgear DGND3700v2 (BCM6362) Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-6-noltari@gmail.com
| | * | mtd: rawnand: brcmnand: rename page sizesÁlvaro Fernández Rojas2020-05-311-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current pages sizes apply to controllers after v3.4 Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-4-noltari@gmail.com
| | * | mtd: rawnand: brcmnand: fix CS0 layoutÁlvaro Fernández Rojas2020-05-311-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only v3.3-v5.0 have a different CS0 layout. Controllers before v3.3 use the same layout for every CS. Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-3-noltari@gmail.com
| | * | mtd: rawnand: brcmnand: rename v4 registersÁlvaro Fernández Rojas2020-05-311-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These registers are also used on v3.3. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-2-noltari@gmail.com
| | * | mtd: rawnand: gpmi: Use nand_extract_bits()Miquel Raynal2020-05-311-164/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Drop the use of gpmi_copy_bits() in favor of the NAND helper nand_extract_bits(). Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200508171805.8627-1-miquel.raynal@bootlin.com
| | * | mtd: rawnand: omap_elm: Fix runtime PM imbalance on errorDinghao Liu2020-05-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pm_runtime_get_sync() increments the runtime PM usage counter even when it returns an error code. Thus a pairing decrement is needed on the error handling path to keep the counter balanced. Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522104008.28340-1-dinghao.liu@zju.edu.cn
| | * | mtd: rawnand: gpmi: Fix runtime PM imbalance in gpmi_nand_probeDinghao Liu2020-05-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no reason that the failure of __gpmi_enable_clk() could lead to PM usage counter decrement. Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522101713.24350-1-dinghao.liu@zju.edu.cn
| | * | mtd: rawnand: gpmi: Fix runtime PM imbalance on errorDinghao Liu2020-05-311-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pm_runtime_get_sync() increments the runtime PM usage counter even when it returns an error code. Thus a pairing decrement is needed on the error handling path to keep the counter balanced. Signed-off-by: Dinghao Liu <dinghao.liu@zju.edu.cn> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200522095139.19653-1-dinghao.liu@zju.edu.cn
| | * | mtd: rawnand: ingenic: Convert the driver to exec_op()Boris Brezillon2020-05-311-56/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's convert the driver to exec_op() to have one less driver relying on the legacy interface. Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Tested-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200519232454.374081-4-boris.brezillon@collabora.com
generated by cgit v1.2.3 (git 2.46.0) at 2025-04-23 13:15:28 +0000