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* Merge tag 'upstream-4.8-rc1' of git://git.infradead.org/linux-ubifsLinus Torvalds2016-08-048-75/+263
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull UBI/UBIFS updates from Richard Weinberger: "This contains mostly cleanups and minor improvements of UBI and UBIFS" * tag 'upstream-4.8-rc1' of git://git.infradead.org/linux-ubifs: ubi: Use bitmaps in Fastmap self-check code ubi: Be more paranoid while seaching for the most recent Fastmap ubi: Check whether the Fastmap anchor matches the super block ubi: Rework Fastmap attach base code ubi: Fix whitespace issue in count_fastmap_pebs() ubi: Introduce vol_ignored() ubi: Fix scan_fast() comment ubifs: switch_gc_head: Remove redondant sync of wbuf ubi: Make volume resize power cut aware ubi: Fix early logging ubi: gluebi: Fix double refcounting ubifs: Silence early error messages if MS_SILENT is set ubi: Fix race condition between ubi device creation and udev ubifs: Update comment for ubifs_errc ubi: Only read necessary size when reading the VID header ubifs: Make xattr structures static ubifs: Silence error output if MS_SILENT is set
| * ubi: Use bitmaps in Fastmap self-check codeRichard Weinberger2016-07-291-9/+11
| | | | | | | | | | | | | | ...don't waste memory by allocating one sizeof(int) per PEB. Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: Be more paranoid while seaching for the most recent FastmapRichard Weinberger2016-07-292-4/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since PEB erasure is asynchornous it can happen that there is more than one Fastmap on the MTD. This is fine because the attach logic will pick the Fastmap data structure with the highest sequence number. On a not so well configured MTD stack spurious ECC errors are common. Causes can be different, bad hardware, wrong operating modes, etc... If the most current Fastmap renders bad due to ECC errors UBI might pick an older Fastmap to attach from. While this can only happen on an anyway broken setup it will show completely different sympthoms and makes finding the root cause much more difficult. So, be debug friendly and fall back to scanning mode of we're facing an ECC error while scanning for Fastmap. Cc: <stable@vger.kernel.org> Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: Check whether the Fastmap anchor matches the super blockRichard Weinberger2016-07-291-0/+7
| | | | | | | | | | | | | | This helps to detect cases where an user copies an UBI image to another target with different bad blocks. Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: Rework Fastmap attach base codeRichard Weinberger2016-07-294-42/+162
| | | | | | | | | | | | | | | | | | Introduce a new list to the UBI attach information object to be able to deal better with old and corrupted Fastmap eraseblocks. Also move more Fastmap specific code into fastmap.c. Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: Fix whitespace issue in count_fastmap_pebs()Richard Weinberger2016-07-291-1/+1
| | | | | | | | Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: Introduce vol_ignored()Richard Weinberger2016-07-292-6/+33
| | | | | | | | | | | | This makes the logic more easy to follow. Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: Fix scan_fast() commentRichard Weinberger2016-07-291-1/+1
| | | | | | | | Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: Make volume resize power cut awareRichard Weinberger2016-07-291-7/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the volume resize operation shrinks a volume, LEBs will be unmapped. Since unmapping will not erase these LEBs immediately we have to wait for that operation to finish. Otherwise in case of a power cut right after writing the new volume table the UBI attach process can find more LEBs than the volume table knows. This will render the UBI image unattachable. Fix this issue by waiting for erase to complete and write the new volume table afterward. Cc: <stable@vger.kernel.org> Reported-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: Fix early loggingRichard Weinberger2016-07-291-4/+4
| | | | | | | | | | | | | | | | | | We cannot use ubi_* logging functions before the UBI object is initialized. Cc: <stable@vger.kernel.org> Fixes: 3260870331 ("UBI: Extend UBI layer debug/messaging capabilities") Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: gluebi: Fix double refcountingRichard Weinberger2016-07-291-5/+0
| | | | | | | | | | | | | | | | | | | | | | There is no need to call get/put on the module reference in gluebi_get/put_device() callbacks. Since mtd->owner is the gluebi module itself mtdcore.c will take care of proper refcounting in __get/put_mtd_device() before executing the callbacks. Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: Fix race condition between ubi device creation and udevIosif Harutyunov2016-07-291-1/+4
| | | | | | | | | | | | | | | | | | | | | | Install the UBI device object before we arm sysfs. Otherwise udev tries to read sysfs attributes before UBI is ready and udev rules will not match. Cc: <stable@vger.kernel.org> Signed-off-by: Iosif Harutyunov <iharutyunov@sonicwall.com> [rw: massaged commit message] Signed-off-by: Richard Weinberger <richard@nod.at>
| * ubi: Only read necessary size when reading the VID headerSascha Hauer2016-07-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When reading the vid hdr from the device UBI always reads a whole page. Instead, read only the data we actually need and speed up attachment of UBI devices by potentially making use of reading subpages if the NAND driver supports it. Since the VID header may be at offset vid_hdr_shift in the page and we can only read from the beginning of a page we have to add that offset to the read size. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Richard Weinberger <richard@nod.at>
* | tree-wide: replace config_enabled() with IS_ENABLED()Masahiro Yamada2016-08-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The use of config_enabled() against config options is ambiguous. In practical terms, config_enabled() is equivalent to IS_BUILTIN(), but the author might have used it for the meaning of IS_ENABLED(). Using IS_ENABLED(), IS_BUILTIN(), IS_MODULE() etc. makes the intention clearer. This commit replaces config_enabled() with IS_ENABLED() where possible. This commit is only touching bool config options. I noticed two cases where config_enabled() is used against a tristate option: - config_enabled(CONFIG_HWMON) [ drivers/net/wireless/ath/ath10k/thermal.c ] - config_enabled(CONFIG_BACKLIGHT_CLASS_DEVICE) [ drivers/gpu/drm/gma500/opregion.c ] I did not touch them because they should be converted to IS_BUILTIN() in order to keep the logic, but I was not sure it was the authors' intention. Link: http://lkml.kernel.org/r/1465215656-20569-1-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Kees Cook <keescook@chromium.org> Cc: Stas Sergeev <stsp@list.ru> Cc: Matt Redfearn <matt.redfearn@imgtec.com> Cc: Joshua Kinard <kumba@gentoo.org> Cc: Jiri Slaby <jslaby@suse.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Borislav Petkov <bp@suse.de> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: "Dmitry V. Levin" <ldv@altlinux.org> Cc: yu-cheng yu <yu-cheng.yu@intel.com> Cc: James Hogan <james.hogan@imgtec.com> Cc: Brian Gerst <brgerst@gmail.com> Cc: Johannes Berg <johannes@sipsolutions.net> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Al Viro <viro@zeniv.linux.org.uk> Cc: Will Drewry <wad@chromium.org> Cc: Nikolay Martynov <mar.kolya@gmail.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Daniel Borkmann <daniel@iogearbox.net> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Rafal Milecki <zajec5@gmail.com> Cc: James Cowgill <James.Cowgill@imgtec.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Alex Smith <alex.smith@imgtec.com> Cc: Adam Buchbinder <adam.buchbinder@gmail.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Mikko Rapeli <mikko.rapeli@iki.fi> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Denys Vlasenko <dvlasenk@redhat.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Hidehiro Kawai <hidehiro.kawai.ez@hitachi.com> Cc: "Luis R. Rodriguez" <mcgrof@do-not-panic.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Ingo Molnar <mingo@redhat.com> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> Cc: Roland McGrath <roland@hack.frob.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Kalle Valo <kvalo@qca.qualcomm.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Tony Wu <tung7970@gmail.com> Cc: Huaitong Han <huaitong.han@intel.com> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: Alexei Starovoitov <ast@kernel.org> Cc: Juergen Gross <jgross@suse.com> Cc: Jason Cooper <jason@lakedaemon.net> Cc: "David S. Miller" <davem@davemloft.net> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Rabin Vincent <rabin@rab.in> Cc: "Maciej W. Rozycki" <macro@imgtec.com> Cc: David Daney <david.daney@cavium.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge tag 'for-linus-20160801' of git://git.infradead.org/linux-mtdLinus Torvalds2016-08-0231-246/+5540
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "NAND: Quoting Boris: 'This pull request contains only one notable change: - Addition of the MTK NAND controller driver And a bunch of specific NAND driver improvements/fixes. Here are the changes that are worth mentioning: - A few fixes/improvements for the xway NAND controller driver - A few fixes for the sunxi NAND controller driver - Support for DMA in the sunxi NAND driver - Support for the sunxi NAND controller IP embedded in A23/A33 SoCs - Addition for bitflips detection in erased pages to the brcmnand driver - Support for new brcmnand IPs - Update of the OMAP-GPMC binding to support DMA channel description' In addition, some small fixes around error handling, etc., as well as one long-standing corner case issue (2.6.20, I think?) with writing 1 byte less than a page. NOR: - rework some error handling on reads and writes, so we can better handle (for instance) SPI controllers which have limitations on their maximum transfer size - add new Cadence Quad SPI flash controller driver - add new Atmel QSPI flash controller driver - add new Hisilicon SPI flash controller driver - support a few new flash, and update supported features on others - fix the logic used for detecting a fully-unlocked flash And other miscellaneous small fixes" * tag 'for-linus-20160801' of git://git.infradead.org/linux-mtd: (60 commits) mtd: spi-nor: don't build Cadence QuadSPI on non-ARM mtd: mtk-nor: remove duplicated include from mtk-quadspi.c mtd: nand: fix bug writing 1 byte less than page size mtd: update description of MTD_BCM47XXSFLASH symbol mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller mtd: spi-nor: Bindings for Cadence Quad SPI Flash Controller driver mtd: nand: brcmnand: Change BUG_ON in brcmnand_send_cmd mtd: pmcmsp-flash: Allocating too much in init_msp_flash() mtd: maps: sa1100-flash: potential NULL dereference mtd: atmel-quadspi: add driver for Atmel QSPI controller mtd: nand: omap2: fix return value check in omap_nand_probe() Documentation: atmel-quadspi: add binding file for Atmel QSPI driver mtd: spi-nor: add hisilicon spi-nor flash controller driver mtd: spi-nor: support dual, quad, and WP for Gigadevice mtd: spi-nor: Added support for n25q00a. memory: Update dependency of IFC for Layerscape mtd: nand: jz4780: Update MODULE_AUTHOR email address mtd: nand: sunxi: prevent a small memory leak mtd: nand: sunxi: add reset line support mtd: nand: sunxi: update DT bindings ...
| * | mtd: spi-nor: don't build Cadence QuadSPI on non-ARMBrian Norris2016-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This controller driver is used only on ARM but is mostly written portably so it can build on other arch'es. Unfortunately, at least x86 doesn't provibe readsl()/writesl() accessors. We could possibly fix this issue in the future by using io{read,write}32_rep() instead, but let's just drop the architectures we aren't using for now. Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | mtd: mtk-nor: remove duplicated include from mtk-quadspi.cWei Yongjun2016-07-191-1/+0
| | | | | | | | | | | | | | | | | | | | | Remove duplicated include. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | mtd: nand: fix bug writing 1 byte less than page sizeHector Palacios2016-07-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_do_write_ops() determines if it is writing a partial page with the formula: part_pagewr = (column || writelen < (mtd->writesize - 1)) When 'writelen' is exactly 1 byte less than the NAND page size the formula equates to zero, so the code doesn't process it as a partial write, although it should. As a consequence the function remains in the while(1) loop with 'writelen' becoming 0xffffffff and iterating endlessly. The bug may not be easy to reproduce in Linux since user space tools usually force the padding or round-up the write size to a page-size multiple. This was discovered in U-Boot where the issue can be reproduced by writing any size that is 1 byte less than a page-size multiple. For example, on a NAND with 2K page (0x800): => nand erase.part <partition> => nand write $loadaddr <partition> 7ff [Editor's note: the bug was added in commit 29072b96078f, but moved around in commit 66507c7bc8895 ("mtd: nand: Add support to use nand_base poi databuf as bounce buffer")] Fixes: 29072b96078f ("[MTD] NAND: add subpage write support") Signed-off-by: Hector Palacios <hector.palacios@digi.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: <stable@vger.kernel.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | mtd: update description of MTD_BCM47XXSFLASH symbolRafał Miłecki2016-07-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | For years now we support writing to BCMA SoC serial flash, so don't describe this driver as providing read-only support anymore. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | mtd: spi-nor: Add driver for Cadence Quad SPI Flash ControllerGraham Moore2016-07-183-0/+1311
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Cadence QSPI controller. This controller is present in the Altera SoCFPGA SoCs and this driver has been tested on the Cyclone V SoC. Signed-off-by: Graham Moore <grmoore@opensource.altera.com> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alan Tull <atull@opensource.altera.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Graham Moore <grmoore@opensource.altera.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Yves Vandervennet <yvanderv@opensource.altera.com> Cc: devicetree@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | mtd: nand: brcmnand: Change BUG_ON in brcmnand_send_cmdFlorian Fainelli2016-07-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the BUG_ON() condition in brcmnand_send_cmd() which checks for the interrupt status "controller ready" bit to a WARN_ON. There is no good reason to kill the system when this condition occur because we could have systems which listed the NAND controller as available (e.g: from Device Tree), but the NAND chip could be malfunctioning and not responding. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | mtd: pmcmsp-flash: Allocating too much in init_msp_flash()Dan Carpenter2016-07-151-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a cut and paste issue here. The bug is that we are allocating more memory than necessary for msp_maps. We should be allocating enough space for a map_info struct (144 bytes) but we instead allocate enough for an mtd_info struct (1840 bytes). It's a small waste. The other part of this is not harmful but when we allocated msp_flash then we allocated enough space fro a map_info pointer instead of an mtd_info pointer. But since pointers are the same size it works out fine. Anyway, I decided to clean up all three allocations a bit to make them a bit more consistent and clear. Fixes: 68aa0fa87f6d ('[MTD] PMC MSP71xx flash/rootfs mappings') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | mtd: maps: sa1100-flash: potential NULL dereferenceDan Carpenter2016-07-151-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | We check for NULL but then dereference "info->mtd" on the next line. Fixes: 72169755cf36 ('mtd: maps: sa1100-flash: show parent device in sysfs') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | mtd: atmel-quadspi: add driver for Atmel QSPI controllerCyrille Pitchen2016-07-153-0/+742
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver add support to the new Atmel QSPI controller embedded into sama5d2x SoCs. It expects a NOR memory to be connected to the QSPI controller. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | mtd: nand: omap2: fix return value check in omap_nand_probe()Wei Yongjun2016-07-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of error, the function dma_request_chan() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Fixes: aa7abd312c11 ('mtd: nand: omap2: Support parsing dma channel information from DT') Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
| * | Merge tag 'nand/for-4.8' of github.com:linux-nand/linux into mtdBrian Norris2016-07-1513-122/+2806
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull NAND changes from Boris Brezillon: """ This pull request contains only one notable change: * Addition of the MTK NAND controller driver And a bunch of specific NAND driver improvements/fixes. Here are the changes that are worth mentioning: * A few fixes/improvements for the xway NAND controller driver * A few fixes for the sunxi NAND controller driver * Support for DMA in the sunxi NAND driver * Support for the sunxi NAND controller IP embedded in A23/A33 SoCs * Addition for bitflips detection in erased pages to the brcmnand driver * Support for new brcmnand IPs * Update of the OMAP-GPMC binding to support DMA channel description """
| | * | mtd: nand: jz4780: Update MODULE_AUTHOR email addressHarvey Hunt2016-07-112-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Emails will bounce from my imgtec address, so update it to a new one. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: Harvey Hunt <harveyhuntnexus@gmail.com> Cc: linux-mtd@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: sunxi: prevent a small memory leakDan Carpenter2016-07-111-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I moved the sanity check on ecc->size before the allocation so that we don't leak memory on error. Fixes: 05af074a4b73 ('mtd: nand: sunxi: check ecc->size values') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: sunxi: add reset line supportIcenowy Zheng2016-07-111-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND controller on some sun8i chips needs its reset line to be deasserted before they can enter working state. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: xway: add nandaddr to own structHauke Mehrtens2016-07-111-16/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of using IO_ADDR_W and IO_ADDR_R use an own pointer to the NAND controller memory area. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: xway: add missing write_buf and read_buf to nand driverHauke Mehrtens2016-07-111-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver needs a special write_buf and read_buf function, because we have to read from a specific address to tell the controller this is a read from the nand controller. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: xway: extract read and write functionHauke Mehrtens2016-07-111-9/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extract the functions to read and write to the register of the NAND flash controller. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: xway: fix nand lockingJohn Crispin2016-07-111-12/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The external Bus Unit (EBU) can control different flash devices, but these NAND flash commands have to be atomic and should not be interrupted in between. Lock the EBU from the beginning of the command till the end by moving the lock to the chip select. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: xway: remove manual resetHauke Mehrtens2016-07-111-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_scan() already resets the NAND flash chip, this driver does not have to call it manually. The xway_reset_chip() functions does the same as the normal NAND reset function. The waiting for the NAND_WAIT_WR_C is done in xway_cmd_ctrl(). Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: xway: Avoid messing up with IO_ADDR_W in ->cmd_ctrl()John Crispin2016-07-111-15/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ->cmd_ctrl() function is adjusting the ->IO_ADDR_W value depending on the command type each time NAND_CTRL_CHANGE is passed. This is not only useless but can lead to an ->IO_ADDR_W corruption. Get rid of this logic and rely on the NAND_CLE and NAND_ALE flags to deduce the iomem address to write the cmd argument to. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: xway: convert to normal platform driverHauke Mehrtens2016-07-112-37/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of hacking this into the plat_nand driver just make this a normal nand driver. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: xway: add some more documentationHauke Mehrtens2016-07-111-6/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds some register documentation which should make it easier to understand how this controller works. In addition it makes now use of BIT() macro and adds some more defines. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nandbiterrs: Support for NAND biterrors test on platforms without raw writeIwo Mergler2016-07-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for NAND biterrors test on platforms without raw write While the default test mode relies on raw write (mtd_write_oob) to introduce bit errors into a page, the rewrite test mode doesn't need it. Changed the overwrite test to use normal writes. The default test mode is unaffected and still requires raw write as before. Signed-off-by: Iwo Mergler <Iwo.Mergler@netcommwireless.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: sunxi: fix subpage writeBoris Brezillon2016-07-111-1/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement ecc->write_subpage() to prevent core code from assigning this hook to nand_write_subpage_hwecc(). This default implementation tries to call ecc->hwctl() which in our case is NULL, thus leading to a NULL pointer dereference. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: sunxi: check ecc->size valuesBoris Brezillon2016-07-111-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Verify that the ecc->size value is either 512 or 1024 bytes. This should always be the case if this field was assigned to the nand->ecc_step_size_ds value, but can be wrong when the user overloaded this value with the nand-ecc-step-size DT property. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: sunxi: prefer 1k ECC blocks when applicableBoris Brezillon2016-07-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switching to 1k ECC blocks when possible provides better resistance against concentrated bitflips. Say you have those two configurations: 1/ 16bits/512bytes 2/ 32bits/1024bytes Both of them require the same amount of ECC bytes (only true for this specific engine), but the second config allows you to correct the case where most of your bitflips are concentrated in a single 512bytes portion. This fact makes the 1k ECC block size more advantageous than the 512bytes one. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: sunxi: Fix OOB bytes retrieval in read_chunks_dma()Boris Brezillon2016-07-111-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The column address passed to the RNDOUT operation was missing the page size offset. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Fixes: 614049a8d904 ("mtd: nand: sunxi: add support for DMA assisted operations")
| | * | mtd: mediatek: driver for MTK Smart DeviceJorge Ramirez-Ortiz2016-07-115-0/+2114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for mediatek's SDG1 NFC nand controller embedded in SoC 2701 Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Xiaolei Li <xiaolei.li@mediatek.com>
| | * | mtd: nand: sunxi: fix return value check in sunxi_nfc_dma_op_prepare()Wei Yongjun2016-07-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case of error, the function dmaengine_prep_slave_sg() returns NULL pointer not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Fixes: 614049a8d904 ("mtd: nand: sunxi: add support for DMA assisted operations") Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: brcmnand: Detect sticky ucorr ecc error on dma readsKamal Dasu2016-07-111-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change provides a fix for controller bug where nand controller could have a possible sticky error after a PIO followed by a DMA read. The fix retries a read if we see a uncorr_ecc after read to detect such sticky errors. The fix applies to only controller version 7.0 and 7.1. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: brcmnand: Add check for erased page bitflipsKamal Dasu2016-06-131-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check for erased page bitflips in a page. And if well within threshold return data as all 0xff. Apply sw check for controller version < 7.2. Controller vesion >= 7.2 has hw support. Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: add ESMT manufacturerRafał Miłecki2016-06-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I got device with ESMT (Elite Semiconductor Memory Technology Inc) F59L1G81MA flash that was detected as: [ 0.852034] nand: device found, Manufacturer ID: 0xc8, Chip ID: 0xd1 [ 0.858402] nand: Unknown NAND 128MiB 3,3V 8-bit [ 0.863031] nand: 128MiB, SLC, page size: 2048, OOB size: 64 According to the F59L1G81MA datasheet (and Read Id documentation) C8h is a "Maker Code" which should mean ESMT. Add it to fix above "Unknown". Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: sunxi: add support for DMA assisted operationsBoris Brezillon2016-06-061-7/+323
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sunxi NAND controller is able to pipeline ECC operations only when operated in DMA mode, which improves a lot NAND throughput while keeping CPU usage low. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: brcmnand: Add v7.2 controller supportFlorian Fainelli2016-06-031-14/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 7.2 controller differs in a few area compared to its predecssor (7.1): - NAND scrambler, which we are not using just yet - higher ECC levels (up to 120 bits) per 1KB data blocks, also not supported yet - up to 128B OOB This patch adds the necessary code to support such a controller generation and updates the Device Tree binding. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Kamal Dasu <kdasu.kdev@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * | mtd: nand: omap2: Support parsing dma channel information from DTCooper Jr., Franklin2016-05-301-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Switch from dma_request_channel to allow passing dma channel information from DT rather than hardcoding a value. Also provide a handle to the GPMC's dev so it can be used to parse the DMA channel information within the GPMC's DT node. Performance Numbers via mtd_speedtest now that EDMA based prefetch works: AM335x Performance numbers: DMA CPULOAD Write: 54% Read: 35% page write speed -23% (vs non dma) page read speed -35% (vs non dma) NO DMA (prefetch-polled) CPULOAD Write: 98% Read: 98% AM437x Performance numbers: DMA CPU LOAD Write: 56% Read: 36% page write speed -16% (vs non dma) page read speed -22% (vs non dma) NO DMA (prefetch-polled) CPULOAD Write: 93% Read: 93% Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 02:41:48 +0000