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* Merge 4.18-rc7 into usb-nextGreg Kroah-Hartman2018-07-302-2/+6
|\ | | | | | | | | | | We want the USB fixes in here as well to handle merge issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * phy: mapphone-mdm6600: Fix wrong enum used for status linesTony Lindgren2018-06-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kbuilt test robot reported: drivers/phy/motorola/phy-mapphone-mdm6600.c:188:16: warning: is used uninitialized in this function [-Wuninitialized] val |= values[i] << i; ~~~~~~^~~ Looking at the phy_mdm6600_status() values does get initialized by gpiod_get_array_value_cansleep(), but we are using wrong enum in that function. Let's fix the use, both end up being three though so urgent rush on this one AFAIK. Fixes: 5d1ebbda0318 ("phy: mapphone-mdm6600: Add USB PHY driver for MDM6600 on Droid 4") Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * phy: phy-brcm-usb-init: Fix power down USB 3.0 PHY when XHCI reenabledJaedon Shin2018-06-291-0/+4
| | | | | | | | | | | | | | | | | | Unset is required to enable USB 3.0 PHY when XHCI reenabled in response to setting PHY3_IDDQ_OVERRIDE in uninit(). Fixes: cd6f769fdea7 ("phy: phy-brcm-usb-init: Power down USB 3.0 PHY when XHCI disabled") Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: mvebu-cp110-comphy: switch to SPDX identifierAntoine Tenart2018-07-241-4/+1
| | | | | | | | | | | | | | | | Use the appropriate SPDX license identifier and drop the license text. This patch is only cosmetic. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: berlin: switch to SPDX license identifierJisheng Zhang2018-07-102-8/+2
| | | | | | | | | | | | | | | | Use the appropriate SPDX license identifier and drop the previous license text. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: Renesas R-Car gen3 PCIe PHY driverSergei Shtylyov2018-07-103-0/+159
| | | | | | | | | | | | | | | | | | | | This PHY is still mostly undocumented -- the only documented registers exist on R-Car V3H (R8A77980) SoC where this PHY stays in a powered-down state after a reset and thus we must power it up for PCIe to work... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: qcom-usb-hs: Mark expected switch fall-throughGustavo A. R. Silva2018-07-101-0/+1
| | | | | | | | | | | | | | | | In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: bcm-sr-pcie: Add Stingray PCIe PHY driverRay Jui2018-07-103-0/+317
| | | | | | | | | | | | | | Add Stingray PCIe PHY driver for both PAXB and PAXC root complex Signed-off-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: phy-mtk-tphy: add property for BC12Chunfeng Yun2018-07-101-0/+13
| | | | | | | | | | | | | | | | Some platforms support BC12 which is disabled by default, here add a property to enable it if need Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: phy-mtk-tphy: add properties for eye diagram testChunfeng Yun2018-07-101-0/+62
| | | | | | | | | | | | | | | | Add properties for Eye diagram test of HQA which sometimes need adjust some parameters of u2phy Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: phy-mtk-tphy: use SPDX license tagChunfeng Yun2018-07-102-9/+2
|/ | | | | | | Use SPDX-License-Identifier tag instead of the GPL license text Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-nextLinus Torvalds2018-06-061-3/+14
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull networking updates from David Miller: 1) Add Maglev hashing scheduler to IPVS, from Inju Song. 2) Lots of new TC subsystem tests from Roman Mashak. 3) Add TCP zero copy receive and fix delayed acks and autotuning with SO_RCVLOWAT, from Eric Dumazet. 4) Add XDP_REDIRECT support to mlx5 driver, from Jesper Dangaard Brouer. 5) Add ttl inherit support to vxlan, from Hangbin Liu. 6) Properly separate ipv6 routes into their logically independant components. fib6_info for the routing table, and fib6_nh for sets of nexthops, which thus can be shared. From David Ahern. 7) Add bpf_xdp_adjust_tail helper, which can be used to generate ICMP messages from XDP programs. From Nikita V. Shirokov. 8) Lots of long overdue cleanups to the r8169 driver, from Heiner Kallweit. 9) Add BTF ("BPF Type Format"), from Martin KaFai Lau. 10) Add traffic condition monitoring to iwlwifi, from Luca Coelho. 11) Plumb extack down into fib_rules, from Roopa Prabhu. 12) Add Flower classifier offload support to igb, from Vinicius Costa Gomes. 13) Add UDP GSO support, from Willem de Bruijn. 14) Add documentation for eBPF helpers, from Quentin Monnet. 15) Add TLS tx offload to mlx5, from Ilya Lesokhin. 16) Allow applications to be given the number of bytes available to read on a socket via a control message returned from recvmsg(), from Soheil Hassas Yeganeh. 17) Add x86_32 eBPF JIT compiler, from Wang YanQing. 18) Add AF_XDP sockets, with zerocopy support infrastructure as well. From Björn Töpel. 19) Remove indirect load support from all of the BPF JITs and handle these operations in the verifier by translating them into native BPF instead. From Daniel Borkmann. 20) Add GRO support to ipv6 gre tunnels, from Eran Ben Elisha. 21) Allow XDP programs to do lookups in the main kernel routing tables for forwarding. From David Ahern. 22) Allow drivers to store hardware state into an ELF section of kernel dump vmcore files, and use it in cxgb4. From Rahul Lakkireddy. 23) Various RACK and loss detection improvements in TCP, from Yuchung Cheng. 24) Add TCP SACK compression, from Eric Dumazet. 25) Add User Mode Helper support and basic bpfilter infrastructure, from Alexei Starovoitov. 26) Support ports and protocol values in RTM_GETROUTE, from Roopa Prabhu. 27) Support bulking in ->ndo_xdp_xmit() API, from Jesper Dangaard Brouer. 28) Add lots of forwarding selftests, from Petr Machata. 29) Add generic network device failover driver, from Sridhar Samudrala. * ra.kernel.org:/pub/scm/linux/kernel/git/davem/net-next: (1959 commits) strparser: Add __strp_unpause and use it in ktls. rxrpc: Fix terminal retransmission connection ID to include the channel net: hns3: Optimize PF CMDQ interrupt switching process net: hns3: Fix for VF mailbox receiving unknown message net: hns3: Fix for VF mailbox cannot receiving PF response bnx2x: use the right constant Revert "net: sched: cls: Fix offloading when ingress dev is vxlan" net: dsa: b53: Fix for brcm tag issue in Cygnus SoC enic: fix UDP rss bits netdev-FAQ: clarify DaveM's position for stable backports rtnetlink: validate attributes in do_setlink() mlxsw: Add extack messages for port_{un, }split failures netdevsim: Add extack error message for devlink reload devlink: Add extack to reload and port_{un, }split operations net: metrics: add proper netlink validation ipmr: fix error path when ipmr_new_table fails ip6mr: only set ip6mr_table from setsockopt when ip6mr_new_table succeeds net: hns3: remove unused hclgevf_cfg_func_mta_filter netfilter: provide udp*_lib_lookup for nf_tproxy qed*: Utilize FW 8.37.2.0 ...
| * phy: cp110-comphy: 2.5G SGMII modeAntoine Tenart2018-05-171-3/+14
| | | | | | | | | | | | | | | | | | This patch allow the CP110 comphy to configure some lanes in the 2.5G SGMII mode. This mode is quite close to SGMII and uses nearly the same code path. Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | phy: mediatek: add XS-PHY driverChunfeng Yun2018-05-203-0/+610
| | | | | | | | | | | | | | Support XS-PHY for MediaTek SoCs with USB3.1 GEN2 controller Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845Manu Gautam2018-05-201-8/+118
| | | | | | | | | | | | | | | | | | | | | | There are two QUSB2 PHYs present on sdm845. In order to improve eye diagram for both the PHYs some parameters need to be changed. Provide device tree properties to override these from board specific device tree files. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: qcom-qmp: Add QMP V3 USB3 UNI PHY support for sdm845Manu Gautam2018-05-202-1/+151
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QMP V3 UNI PHY is a single lane USB3 PHY without support for DisplayPort (DP). Main difference from DP combo QMPv3 PHY is that UNI PHY doesn't have dual RX/TX lanes and no separate DP_COM block for configuration related to type-c or DP. Also remove "qcom,qmp-v3-usb3-phy" compatible string which was earlier added for sdm845 only as there wouldn't be any user of same. While at it, fix has_pwrdn_delay attribute for USB-DP PHY configuration and. Reviewed-by: Evan Green <evgreen@chromium.org> Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: qcom-qusb2: Fix crash if nvmem cell not specifiedManu Gautam2018-05-201-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver currently crashes due to NULL pointer deference while updating PHY tune register if nvmem cell is NULL. Since, fused value for Tune1/2 register is optional, we'd rather bail out. Fixes: ca04d9d3e1b1 ("phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips") Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Reviewed-by: Evan Green <evgreen@chromium.org> Cc: stable <stable@vger.kernel.org> # 4.14+ Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: qcom-qmp: Enable pipe_clk before PHY initializationManu Gautam2018-05-201-14/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QMP PHY for USB/PCIE requires pipe_clk for locking of retime buffers at the pipe interface. Driver checks for PHY_STATUS without enabling pipe_clk due to which phy_init() fails with initialization timeout. Though pipe_clk is output from PHY (after PLL is programmed during initialization sequence) to GCC clock_ctl and then fed back to PHY but for PHY_STATUS register to reflect successful initialization pipe_clk from GCC must be present. Since, clock driver now ignores status_check for pipe_clk on clk_enable/disable, driver can safely enable/disable pipe_clk from phy_init/exit. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: stm32: fix usbphyc static checker and checkpatch warningsAmelie Delaunay2018-05-201-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the following issues: * warning reported by checkpatch: WARNING: line over 80 characters #87: FILE: drivers/phy/st/phy-stm32-usbphyc.c:87: +static void stm32_usbphyc_get_pll_params(u32 clk_rate, struct pll_params *pll_params) * bug reported by static checker (Dan Carpenter): drivers/phy/st/phy-stm32-usbphyc.c:371 stm32_usbphyc_probe() error: uninitialized symbol 'i'. * unused stm32_usbphyc structure member: bool pll_enabled. * unnecessary extra line in stm32_usbphyc_of_xlate Fixes: 94c358da3a05 "phy: stm32: add support for STM32 USB PHY Controller (USBPHYC)" Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: mapphone-mdm6600: Add runtime PM support for n_gsm on USB suspendTony Lindgren2018-05-201-0/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can suspend the mdm6600 over USB via sysfs and then mdm6600 enters a low-power idle mode. In the low-power mode, mdm6600 radio and n_gsm uart are functional but we need to use USB mode0 GPIO pin to send a wake-up pulse to the modem to talk with it over n_gsm. As the GPIO mode0 line is dual purposed and and also needed by the USB PHY driver to boot mdm6600 into the correct USB mode, let's also manage the wake-up GPIO in the USB PHY driver. For the USB PHY idle, there does not anything specific we need to do for runtime PM after getting the PHY configured. The PHY framework already idles the USB PHY when not in use separately from the mdm6600 state. It seems that it takes about 100 - 200ms for mdm6600 to wake up from the low-power idle mode. And then mdm6600 stays awake about 1.2s until it needs to be kicked again. The mdm6600 status GPIO pins don't seem to change state when mdm6600 changes between normal and idle mode. Let's manage the mdm6600 mode with runtime PM. If phy-mapphone-mdm6600 sysfs entry for power/control is set to "on", we keep mdm6600 out of idle by kicking the GPIO line. If the entry is set to "auto" we let mdm6600 enter low-power state. Cc: Marcel Partap <mpartap@gmx.net> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Michael Scott <hashcode0f@gmail.com> Cc: NeKit <nekit1000@gmail.com> Cc: Pavel Machek <pavel@ucw.cz> Cc: Sebastian Reichel <sre@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: tegra: Convert to use match_string() helperAndy Shevchenko2018-05-201-14/+1
| | | | | | | | | | | | | | | | | | The new helper returns index of the matching string in an array. We are going to use it here. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: Add a driver for the ATH79 USB phyAlban Bedel2018-04-253-1/+119
| | | | | | | | | | | | | | | | | | | | | | | | | | The ATH79 USB phy is very simple, it only have a reset. On some SoC a second reset is used to force the phy in suspend mode regardless of the USB controller status. This driver is added to the qualcom directory as atheros is now part of qualcom and newer SoC of this familly are marketed under the qualcom name. Signed-off-by: Alban Bedel <albeu@free.fr> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: core: Allow phy_pm_runtime_xxx API calls with NULL phyManu Gautam2018-04-251-0/+18
| | | | | | | | | | | | | | | | | | | | | | phy_init() and phy_exit() calls, and phy_power_on() and phy_power_off() already accept NULL as valid PHY reference and act as NOP. Extend same concept to phy runtime_pm APIs to keep drivers (e.g. dwc3) code simple while dealing with optional PHYs. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* | phy: exynos-mipi-video: Simplify code by using regmap_update_bits()Sylwester Nawrocki2018-04-251-20/+14
|/ | | | | | | | There is no functional change, just replacing regmap_read()/modify/ regmap_write() with regmap_update_bits() function calls. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* Merge tag 'armsoc-soc' of ↵Linus Torvalds2018-04-051-7/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates from Arnd Bergmann: "This release brings up a new platform based on the old ARM9 core: the Nuvoton NPCM is used as a baseboard management controller, competing with the better known ASpeed AST2xx series. Another important change is the addition of ARMv7-A based chips in mach-stm32. The older parts in this platform are ARMv7-M based microcontrollers, now they are expanding to general-purpose workloads. The other changes are the usual defconfig updates to enable additional drivers, lesser bugfixes. The largest updates as often are the ongoing OMAP cleanups, but we also have a number of changes for the older PXA and davinci platforms this time. For the Renesas shmobile/r-car platform, some new infrastructure is needed to make the watchdog work correctly. Supporting Multiprocessing on Allwinner A80 required a significant amount of new code, but is not doing anything unexpected" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (179 commits) arm: npcm: modify configuration for the NPCM7xx BMC. MAINTAINERS: update entry for ARM/berlin ARM: omap2: fix am43xx build without L2X0 ARM: davinci: da8xx: simplify CFGCHIP regmap_config ARM: davinci: da8xx: fix oops in USB PHY driver due to stack allocated platform_data ARM: multi_v7_defconfig: add NXP FlexCAN IP support ARM: multi_v7_defconfig: enable thermal driver for i.MX devices ARM: multi_v7_defconfig: add RN5T618 PMIC family support ARM: multi_v7_defconfig: add NXP graphics drivers ARM: multi_v7_defconfig: add GPMI NAND controller support ARM: multi_v7_defconfig: add OCOTP driver for NXP SoCs ARM: multi_v7_defconfig: configure I2C driver built-in arm64: defconfig: add CONFIG_UNIPHIER_THERMAL and CONFIG_SNI_AVE ARM: imx: fix imx6sll-only build ARM: imx: select ARM_CPU_SUSPEND for CPU_IDLE as well ARM: mxs_defconfig: Re-sync defconfig ARM: imx_v4_v5_defconfig: Use the generic fsl-asoc-card driver ARM: imx_v4_v5_defconfig: Re-sync defconfig arm64: defconfig: enable stmmac ethernet to defconfig ARM: EXYNOS: Simplify code in coupled CPU idle hot path ...
| * ARM: da8xx: use platform data for CFGCHIP syscon regmapDavid Lechner2018-02-191-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts from using a platform device for the CFGCHIP syscon regmap to using platform data to pass the regmap to consumers. A lazy getter function is used so that the regmap will only be created if it is actually used. This function will also be used in the clock init when we convert to the common clock framework. The USB PHY driver is currently the only consumer. This driver is updated to use platform data to get the CFGCHIP regmap instead of syscon_regmap_lookup_by_pdevname(). Signed-off-by: David Lechner <david@lechnology.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
| * phy: da8xx-usb: rename clock con_idsDavid Lechner2018-02-121-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | This renames the clock con_ids in the DA8XX USB PHY driver as well as the matching names in the mach clock registration code. This is in preparation for using device tree clocks where these names will become part of the device tree bindings. The new names more closely match the names used in the USB clock diagram in the SoC TRM. Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* | Merge tag 'phy-for-4.17' of ↵Greg Kroah-Hartman2018-03-2030-394/+3153
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next Kishon writes: phy: for 4.17 *) Add USB PHY driver for MDM6600 on Droid *) Add USB PHY driver for STM32 USB PHY Controller *) Add inno-usb2-phy driver for hi3798cv200 SoC *) Add combo phy driver (SATA/USB/PCIE) for HiSilicon STB SoCs *) Add USB3 PHY driver for Meson GXL and GXM *) Add support for R8A77965 Gen3 USB 2.0 PHY in phy-rcar-gen3-usb2 driver *) Add support for qualcomm QUSB2 V2 and QMP V3 USB3 PHY in phy-qcom-qusb2 and phy-qcom-qmp PHY driver respectively *) Add support for runtime PM in phy-qcom-qusb2 and phy-qcom-qmp PHY drivers *) Add support for Allwinner R40 USB PHY in sun4i-usb PHY driver *) Add support in rockchip-typec PHY driver to make extcon optional and fallback to working in host mode if extcon is missing *) Add support in rockchip-typec PHY driver to mux PHYs connected to DP *) Add support to configure slew rate parameters in phy-mtk-tphy PHY driver *) Add workaround for missing Vbus det interrupts on Allwinner A23/A33 *) Add USB speed related PHY modes in phy core *) Fix PHY 'structure' documentation *) Force rockchip-typec PHY to USB2 if DP-only mode is used *) Fix phy-qcom-qusb2 and phy-qcom-qmp PHY drivers to follow PHY reset and initialization sequence as per hardware programming manual *) Fix Marvell BG2CD SoC USB failure in phy-berlin-usb driver *) Minor fixes in lpc18xx-usb-otg, xusb-tegra210 and phy-rockchip-emmc PHY drivers Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: tegra: xusb: Uncomment register writeThierry Reding2018-03-161-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The reason why this was originally commented out is no longer clear. The UPHY driver for SATA works fine with or without this change. The reset value of the XDIGCLK_EN bit is 0, so unless programmed by the bootloader this shouldn't make a difference anyway. Define a macro for this bit and uncomment the code. This also fixes a coverity issue brought to my attention by Rohith because not only is the XDIGCLK_EN field modification commented out, but also the register write which causes none of the earlier modifications of the register value to be written to the register and the value being overwritten. Reported-by: Rohith Seelaboyina <rseelaboyina@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: rockchip-typec: fall back to working in host-mode if extcon is missing.Enric Balletbo i Serra2018-03-161-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Right now the rockchip type-c phy does fail probing when no extcon is detected. Some boards get the cable-state via the extcon interface and have this supported, other boards seem to use the fusb302 chip or another but the driver currently does not seem to utilize the extcon interface to report the cable-state. And, other, just connect the type-c to a standard USB-A port so use no controller at all. A missing extcon shouldn't fail to probe, instead, should just fall back to working in host-mode if it cannot get the extcon. Fixes: c301b327aea898af ("arm64: dts: rockchip: add usb3-phy otg-port support for rk3399") Reported-by: Vicente Bergas <vicencb@gmail.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: rockchip-typec: support DP phy switchChris Zhong2018-03-161-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are 2 Type-c PHYs in RK3399, but only one DP controller. Hence only one PHY can connect to DP controller at one time, the other should be disconnected. The GRF_SOC_CON26 register has a switch bit to do it, set this bit means enable PHY 1, clear this bit means enable PHY 0. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: rockchip-typec: force to USB2 if DP at 4 lanes modeChris Zhong2018-03-161-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The usb3tousb2_en BIT will be clear to 0 in probe(), it make USB controller work at USB3 mode, and if the USB phy is turned on with DP only mode(4 lanes DP), the rockchip_usb3_phy_power_on() will return directly, so usb3_host_disable and usb3_host_port these 2 BIT will keep a same value as coreboot. In coreboot, these 3 BITs are set as USB2 mode, but now one of the bits is changed to USB3, it make USB controller work at a unknown status. These 3 BITs should be changed to USB2, if the Type-C works at 4 lanes mode, and then switch it back to USB3 mode, when USB disconnect. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: rockchip-typec: enable usb3 host during usb3 phy power onWilliam wu2018-03-161-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have forced usb3 to work in usb2 only mode in firmware by setting usb3tousb2_en (bit3 of GRF_USB3PHY0/1_CON0) to 1, and setting host_u3_port_disable (bit0 of GRF_USB3OTG0/1_CON1) to 1 and host_u3_port (bit15~12 of GRF_USB3OTG0/1_CON1) to 0. So we need to re-enable usb3 host. Note that the RK3399 TRM suggests that we should keep the whole usb3 controller in reset for the duration of the Type-C PHY initialization. However, it's hard to assert the reset in the current framework of reset. And according to the TRM, it doesn't require that we should clear the usb3tousb2 bit before pipe ready. So let's enable the usb3 host after pipe ready to avoid the Type-C PHY initialization failure. Signed-off-by: William wu <wulf@rock-chips.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: rockchip-typec: deprecate some DT properties for various register fields.Enric Balletbo i Serra2018-03-161-49/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding properties for various register fields in the DT doesn't scale and this information should be in the driver instead. Before this patch these registers (description below) were specified in the DT, every register node contained 3 sections: offset, enable bit, write mask bit. - rockchip,typec-conn-dir : the register of type-c connector direction, for type-c phy0, it must be <0xe580 0 16>; for type-c phy1, it must be <0xe58c 0 16>; - rockchip,usb3tousb2-en : the register of type-c force usb3 to usb2 enable control. for type-c phy0, it must be <0xe580 3 19>; for type-c phy1, it must be <0xe58c 3 19>; - rockchip,external-psm : the register of type-c phy external psm clock selection. for type-c phy0, it must be <0xe588 14 30>; for type-c phy1, it must be <0xe594 14 30>; - rockchip,pipe-status : the register of type-c phy pipe status. for type-c phy0, it must be <0xe5c0 0 0>; for type-c phy1, it must be <0xe5c0 16 16>; After this patch these register definitions are in the driver. So can be removed from the DT. Note that there are 2 type-c phys for RK3399 with different offsets, the driver checks the phy base address of the running instance and applies the right offsets. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: mapphone-mdm6600: Add USB PHY driver for MDM6600 on Droid 4Tony Lindgren2018-03-163-0/+551
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's add support for the GPIO controlled USB PHY on the MDM6600 modem. It is used on some Motorola Mapphone series of phones and tablets such as Droid 4. The MDM6600 is hardwired to the first OHCI port in the Droid 4 case, and is controlled by several GPIOs. The USB PHY is integrated into the MDM6600 device it seems. We know this as we get L3 errors from omap-usb-host if trying to use the PHY before MDM6600 is configured. The GPIOs controlling MDM6600 are used to power device on and off, to configure the USB start-up mode (normal mode versus USB flashing), and they also tell the state of the MDM6600 device. The two start-up mode GPIOs are dual-purposed and used for out of band (OOB) wake-up for USB and TS 27.010 serial mux. But we need to configure the USB start-up mode first to get MDM6600 booted in the right mode to be usable in the first place. Note that the Motorola Mapphone Linux kernel tree has a "radio-ctrl" driver for modems. But it really does not control the radio at all, it just controls the modem power and start-up mode for USB. So I came to the conclusion that we're better off having this done in the USB PHY driver. For adding support for USB flashing mode, we can later on add a kernel module option for flash_mode=1 or something similar. Also note that currently there is no PM runtime support for the OHCI on omap variant SoCs. So for low(er) power idle states, currenty both ohci-platform and phy-mapphone-mdm6600 must be unloaded or unbound. For reference here is what I measured for total power consumption on an idle Droid 4 with and without USB related MDM6600 modules: idle lcd off phy-mapphone-mdm6600 ohci-platform 153mW 284mW 344mW So it seems that MDM6600 is currently not yet idling even with it's radio turned off, but that's something that is beyond the control of this USB PHY driver. This patch does get us to the point where modem data and GPS are usable with libqmi and ModemManager for example. Voice calls need more audio driver work. Cc: devicetree@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marcel Partap <mpartap@gmx.net> Cc: Michael Scott <michael.scott@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: add inno-usb2-phy driver for hi3798cv200 SoCPengcheng Li2018-03-163-0/+208
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It adds inno-usb2-phy driver for hi3798cv200 SoC USB 2.0 support. One inno-usb2-phy device can support up to two PHY ports. While there is device level reference clock and power reset to be controlled, each PHY port has its own utmi reset that needs to assert/de-assert as needed. Hi3798cv200 needs to access PHY port0 register via particular peripheral syscon controller register to control PHY, like turning on PHY clock. Signed-off-by: Pengcheng Li <lpc.li@hisilicon.com> Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: rcar-gen3-usb2: Add support for r8a77965Yoshihiro Shimoda2018-03-161-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for r8a77965 (R-Car M3-N). This SoC has dedicated pins. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: stm32: add support for STM32 USB PHY Controller (USBPHYC)Amelie Delaunay2018-03-163-0/+476
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds phy transceiver driver for STM32 USB PHY Controller (USBPHYC) that provides dual port High-Speed phy for OTG (single port) and EHCI/OHCI host controller (two ports). One port of the phy is shared between the two USB controllers through a UTMI+ switch. [fengguang.wu@intel.com: Make stm32_usbphyc_get_pll_params() to be static] Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: add 'depends on HAS_IOMEM' to fix unmet dependencyMasahiro Yamada2018-03-163-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These configs select MFD_SYSCON, but do not depend on HAS_IOMEM. Compile testing on architecture without HAS_IOMEM causes "unmet direct dependencies" in Kconfig phase. Detected by "make ARCH=score allyesconfig". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: amlogic: add USB3 PHY support for Meson GXL and GXMMartin Blumenstingl2018-03-163-0/+295
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a new driver for the USB3 PHY found on Meson GXL and GXM SoCs (both SoCs are using the same USB PHY register layout). Unfortunately there is no documentation for this PHY in the public S905X datasheet (published for example by Khadas). What we know so far about this PHY: - even though the Meson GXL and GXM SoCs do not expose an USB3 port (the dwc3 controller only has USB2 ports enabled) we need to initialize the USB3 PHY (specifically USB_R1_U3H_FLADJ_30MHZ_REG_MASK). Without this initialization high-speed USB devices (especially USB hard disks and thumb drives, slower devices like mice do not seem to be affected) - on some boards the USB3 PHY starts in "device mode" - we want to bring it into a known state (by switching it to host mode for now). - it is responsible for the OTG detection and for switching the first USB2 PHY between host and peripheral (aka device) mode. an interrupt can be used to detect changes between host and device mode. There are five inputs to this register area: - the clock and reset line for the USB3 PHY itself - the clock and reset line for the peripheral mode and OTG detection logic (on the GXL and GXM SoCs these are the same clock and reset line as for the USB3 PHY itself, but Amlogic sees this as two different components - even though they share the same register space - so they have to be passed individually to allow specifying different inputs on other SoCs if needed) - the interrupt for the OTG detection logic The whole OTG detection logic is not implemented yet. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Tested-by: Yixun Lan <yixun.lan@amlogic.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: berlin-usb: adjust USB_PHY_RX_CTRL init flagsAlexander Monakov2018-03-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the value written into the USB_PHY_RX_CTRL configuration register match 0xAA79 value written by manufacturer-supplied kernels for Sony NSZ-GS7 (Berlin2 SoC), Google Chromecast and Valve Steam Link (BG2CD). This fixes timeouts communicating to the internal hub on Steam Link. Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: phy-mtk-tphy: add configurable parameters for slew rate calibrateChunfeng Yun2018-03-161-5/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are two parameters, ref_clk and coefficient, for U2 slew rate calibrate which may vary on different SoCs, here allow them to be configurable Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: phy-mtk-tphy: keep default value of mcu_bus_ck_gate_enChunfeng Yun2018-03-161-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The default value of mcu_bus_ck_gate_en is 1, if clear it, will prevent system to enter deep idle mode, so keep its default value and without affecting PCIe function. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: lpc18xx-usb-otg: error handling in lpc18xx_usb_otg_phy_power_on()Alexey Khoroshilov2018-03-161-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If regmap_update_bits() fails in lpc18xx_usb_otg_phy_power_on(), lpc->clk is left enabled. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: allwinner: sun4i-usb: poll vbus changes on A23/A33 when driving VBUSChen-Yu Tsai2018-03-121-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AXP223 PMIC, like the AXP221, does not generate VBUS change interrupts when N_VBUSEN is used to drive VBUS for the OTG port on the board. This was not noticed until recently, as most A23/A33 boards use a GPIO pin that does not support interrupts for OTG ID detection. This forces the driver to use polling. However the A33-OlinuXino uses a pin that does support interrupts, so the driver uses them. However the VBUS interrupt never fires, and the driver never gets to update the VBUS status. This results in musb timing out waiting for VBUS to rise. This was worked around for the AXP221 by resorting to polling changes in commit 91d96f06a760 ("phy-sun4i-usb: Add workaround for missing Vbus det interrupts on A31"). This patch adds the A23 and A33 to the list of SoCs that need the workaround. Fixes: fc1f45ed3043 ("phy-sun4i-usb: Add support for the usb-phys on the sun8i-a33 SoC") Fixes: 123dfdbcfaf5 ("phy-sun4i-usb: Add support for the usb-phys on the sun8i-a23 SoC") Cc: <stable@vger.kernel.org> # 4.3.x: 68dbc2ce77bb phy-sun4i-usb: Use of_match_node to get model specific config data Cc: <stable@vger.kernel.org> # 4.3.x: 5cf700ac9d50 phy: phy-sun4i-usb: Fix optional gpios failing probe Cc: <stable@vger.kernel.org> # 4.3.x: 04e59a0211ff phy-sun4i-usb: Fix irq free conditions to match request conditions Cc: <stable@vger.kernel.org> # 4.3.x: 91d96f06a760 phy-sun4i-usb: Add workaround for missing Vbus det interrupts on A31 Cc: <stable@vger.kernel.org> # 4.3.x Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: amlogic: phy-meson-gxl-usb2: rename some of the U2P_R2 registersMartin Blumenstingl2018-03-081-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The U2P_R2 register provides "test mode" functionality for bits 17:0. These are only used during SoC development and should be left untouched on production SoC versions. Rename these register definitions to indicate that these are for "test mode" only. While here, also merge the definitions for U2P_R2_DATA_IN_MASK and U2P_R2_DATA_IN_EN_MASK (bits 0:7) because Amlogic's internal documentation suggests that these bits belong together. The old definition was not taken from the documentation but rather from a struct definition in the Amlogic GPL kernel sources. No functional changes. Suggested-by: Yixun Lan <yixun.lan@amlogic.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: amlogic: phy-meson-gxl-usb2: default to host modeMartin Blumenstingl2018-03-082-14/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The USB2 PHY can switch between PHY_MODE_USB_HOST and PHY_MODE_USB_DEVICE. However, it cannot do it on it's own since it requires re-routing of the corresponding USB pins from dwc3 (which is used for host-mode) to dwc2 (which is used for device-mode). Thus we don't need to auto-detect the mode based on the USB controller, which simplifies the driver code. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: amlogic: phy-meson-gxl-usb2: support the clock and reset lineMartin Blumenstingl2018-03-081-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Meson GXL USB2 PHYs require an additional clock (USB) which has to be enabled. If that clock is disabled then all PHY registers read 0x0. Luckily for us that clock is always enabled (either by harddware defaults, the bootrom, or any of the bootloaders before u-boot/BL3-3). The OTG capable USB2 PHY additionally has a reset line (USB_OTG, which is shared with other components, such as the USB3 PHY for example). Extend the driver so it handles this clock and the shared reset line. We only trigger the reset during the .init phase since it's a shared reset line, so triggering it during the driver's .reset implementation would effectively also only trigger it once anyways. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: amlogic: phy-meson-gxl-usb2: don't log an error on -EPROBE_DEFERMartin Blumenstingl2018-03-081-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devm_phy_create can return -EPROBE_DEFER if the phy-supply is not ready yet. Silence this warning as the driver framework will re-attempt registering the PHY - this second try works without any errors. So only log actual errors to keep the kernel log free of misleading error messages. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
| * | phy: rockchip-emmc: use regmap_read_poll_timeout to poll dllrdyShawn Lin2018-03-081-22/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just use the API instead of open-coding it, no functional change intended. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-30 17:39:34 +0000