| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | pinctrl: aspeed: g5: constify pinconf_ops, pinctrl_ops, and pinmux_ops struct... | Julia Lawall | 2017-08-22 | 1 | -3/+3 |
| * | pinctrl: aspeed: g5: Add USB device and host support | Andrew Jeffery | 2017-08-14 | 1 | -1/+57 |
| * | pinctrl: aspeed: g5: Add pinconf support | Andrew Jeffery | 2017-04-24 | 1 | -1/+152 |
| * | pinctrl: aspeed-g5: Add mux configuration for all pins | Andrew Jeffery | 2016-12-28 | 1 | -4/+1474 |
| * | pinctrl: aspeed: Read and write bits in LPC and GFX controllers | Andrew Jeffery | 2016-12-27 | 1 | -9/+39 |
| * | pinctrl-aspeed-g5: Never set SCU90[6] | Andrew Jeffery | 2016-11-07 | 1 | -1/+1 |
| * | pinctrl: aspeed-g5: Fix pin association of SPI1 function | Andrew Jeffery | 2016-10-18 | 1 | -8/+78 |
| * | pinctrl: aspeed-g5: Fix GPIOE1 typo | Andrew Jeffery | 2016-10-18 | 1 | -1/+1 |
| * | pinctrl: aspeed-g5: Fix names of GPID2 pins | Andrew Jeffery | 2016-10-18 | 1 | -6/+6 |
| * | pinctrl: Add pinctrl-aspeed-g5 driver | Andrew Jeffery | 2016-09-07 | 1 | -0/+808 |
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