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* pinctrl: cherryview: fix address_space_handler() argumentRaag Jadav2023-08-221-3/+2
| | | | | | | | | | | | | First argument of acpi_*_address_space_handler() APIs is acpi_handle of the device, which is incorrectly passed in driver ->remove() path here. Fix it by passing the appropriate argument and while at it, make both API calls consistent using ACPI_HANDLE(). Fixes: a0b028597d59 ("pinctrl: cherryview: Add support for GMMR GPIO opregion") Cc: stable@vger.kernel.org Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: intel: consolidate ACPI dependencyRaag Jadav2023-08-221-19/+1
| | | | | | | | | Since all the Intel specific platform drivers depend on ACPI, we can consolidate their config dependency. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: cherryview: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helperAndy Shevchenko2023-08-211-7/+3
| | | | | | | | | Since pm.h provides a helper for system no-IRQ PM callbacks, switch the driver to use it instead of open coded variant. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20230717172821.62827-4-andriy.shevchenko@linux.intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: lynxpoint: Make use of pm_ptr()Andy Shevchenko2023-08-181-4/+3
| | | | | | | | | | | | | | | Cleaning up the driver to use pm_ptr() and *_PM_OPS() macros that make it simpler and allows the compiler to remove those functions if built without CONFIG_PM and CONFIG_PM_SLEEP support. The lp_gpio_resume() is also assigned to .thaw and .restore members. This is not a problem as the function it enables input pins that had been disabled by firmware and repetion of that doesn't change the pin configuration, i.e. it is idempotent. Reviewed-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20230717172821.62827-6-andriy.shevchenko@linux.intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: baytrail: Make use of pm_ptr()Andy Shevchenko2023-08-181-8/+3
| | | | | | | | | | | Cleaning up the driver to use pm_ptr() and *_PM_OPS() macros that make it simpler and allows the compiler to remove those functions if built without CONFIG_PM and CONFIG_PM_SLEEP support. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20230717172821.62827-3-andriy.shevchenko@linux.intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: intel: Switch to use exported namespaceAndy Shevchenko2023-08-1516-9/+18
| | | | | | | We already have a few symbols exported in the namespace. Let's do the same for others (except PM for now). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* Merge patch series "Reuse common functions from pinctrl-intel"Andy Shevchenko2023-08-156-236/+57
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Raag Jadav <raag.jadav@intel.com> says: This series exports common pinctrl functions that are used across Intel specific platform drivers to PINCTRL_INTEL namespace and reuses them into Baytrail, Cherryview and Lynxpoint drivers. This helps reduce their code and memory footprint. X86 kernels are fairly unikernels such that pinctrl-intel driver is enabled by most Linux distributions and most Intel specific platform drivers (inside drivers/pinctrl/intel) depend on it. The only exception to this is Lynxpoint. But taking into account its fairly old age, it wouldn't suffer much from pinctrl-intel dependency. bloat-o-meter: ============== Intel: add/remove: 17/10 grow/shrink: 0/0 up/down: 375/-319 (56) Total: Before=9598, After=9654, chg +0.58% Baytrail: add/remove: 1/6 grow/shrink: 0/2 up/down: 41/-441 (-400) Total: Before=16538, After=16138, chg -2.42% Cherryview: add/remove: 1/6 grow/shrink: 2/0 up/down: 90/-272 (-182) Total: Before=18133, After=17951, chg -1.00% Lynxpoint: add/remove: 1/6 grow/shrink: 0/1 up/down: 24/-354 (-330) Total: Before=7836, After=7506, chg -4.21% Link: https://lore.kernel.org/r/20230814060311.15945-1-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * pinctrl: lynxpoint: reuse common functions from pinctrl-intelRaag Jadav2023-08-152-83/+9
| | | | | | | | | | | | | | | | | | | | Reuse common functions from pinctrl-intel driver. While at it, select pinctrl-intel for Intel Lynxpoint driver. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230814060311.15945-5-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * pinctrl: cherryview: reuse common functions from pinctrl-intelRaag Jadav2023-08-151-60/+9
| | | | | | | | | | | | | | | | | | Reuse common functions from pinctrl-intel driver. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230814060311.15945-4-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * pinctrl: baytrail: reuse common functions from pinctrl-intelRaag Jadav2023-08-151-79/+11
| | | | | | | | | | | | | | | | | | Reuse common functions from pinctrl-intel driver. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230814060311.15945-3-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * pinctrl: intel: export common pinctrl functionsRaag Jadav2023-08-152-14/+28
| | | | | | | | | | | | | | | | | | | | Export common pinctrl functions that are used across Intel specific platform drivers, so that they can be reused. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230814060311.15945-2-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* | Merge patch series "Introduce Intel Tangier pinctrl driver"Andy Shevchenko2023-08-157-1277/+778
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Raag Jadav <raag.jadav@intel.com> says: Merrifield and Moorefield pinctrl driver implementations are similar in terms of how they access the hardware. We can consolidate their pinctrl functionalities into a common library driver. This patch set introduces: 1. Intel Tangier driver that supports the common pinctrl functionalities for Merrifield and Moorefield platforms. 2. Intel Tangier adaptation for Merrifield pinctrl driver. 3. Intel Tangier adaptation for Moorefield pinctrl driver. Tested on Intel Edison platform. No deviation observed in the contents of below entries before and after this patchset. - /proc/interrupts - /sys/kernel/debug/gpio - /sys/kernel/debug/pinctrl/*/pins Link: https://lore.kernel.org/r/20230814054033.12004-1-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | pinctrl: moorefield: Adapt to Intel Tangier driverRaag Jadav2023-08-153-622/+37
| | | | | | | | | | | | | | | | | | | | | | | | Make use of Intel Tangier as a library driver for Moorefield. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Link: https://lore.kernel.org/r/20230814054033.12004-4-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | pinctrl: merrifield: Adapt to Intel Tangier driverRaag Jadav2023-08-153-655/+41
| | | | | | | | | | | | | | | | | | | | | | | | Make use of Intel Tangier as a library driver for Merrifield. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Link: https://lore.kernel.org/r/20230814054033.12004-3-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
| * | pinctrl: tangier: Introduce Intel Tangier driverRaag Jadav2023-08-155-0/+700
| |/ | | | | | | | | | | | | | | | | Intel Tangier implements the common pinctrl functionalities for Merrifield and Moorefield platforms. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Link: https://lore.kernel.org/r/20230814054033.12004-2-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* / pinctrl: baytrail: consolidate common mask operationRaag Jadav2023-08-151-19/+15
|/ | | | | | | | | Consolidate common mask operation outside of switch cases and limit IO operations to positive cases. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: cherryview: Drop goto labelAndy Shevchenko2023-06-191-4/+5
| | | | | | | We do not use goto labels in the Intel pin control drivers, so drop the only one in the entire folder. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: baytrail: invert if conditionRaag Jadav2023-06-191-3/+1
| | | | | | | | | Invert if condition and get rid of redundant else. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230616203356.27343-4-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: baytrail: add warning for BYT_VAL_REG retrieval failureRaag Jadav2023-06-191-0/+8
| | | | | | | | | | Add warning for BYT_VAL_REG retrieval failure and continue such case to avoid unintended reads/writes in pm_ops. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230616203356.27343-3-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: baytrail: reduce scope of spinlock in ->dbg_show() hookRaag Jadav2023-06-191-10/+10
| | | | | | | | | | | | | | | Reduce scope of spinlock to IO operations in ->dbg_show() hook and save a few bytes. add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-12 (-12) Function old new delta byt_gpio_dbg_show 890 878 -12 Total: Before=17029, After=17017, chg -0.07% Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230616203356.27343-2-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: intel: refine ->irq_set_type() hookRaag Jadav2023-06-151-21/+24
| | | | | | | | | | | | | Refine ->irq_set_type() hook and improve its readability by: - Reducing scope of spinlock by moving unneeded operations out of it. - Dropping redundant PADCFG0_RXEVCFG_SHIFT and including it directly into PADCFG0_RXEVCFG_* definitions. - Utilizing temporary variables for common operations. - Simplifying if-else-if chain. Signed-off-by: Raag Jadav <raag.jadav@intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: intel: refine ->set_mux() hookRaag Jadav2023-06-141-4/+5
| | | | | | | | | | | | | | | Utilize a temporary variable for common shift operation in ->set_mux() hook and improve readability while saving a few bytes. add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-3 (-3) Function old new delta intel_pinmux_set_mux 245 242 -3 Total: Before=10472, After=10469, chg -0.03% Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20230613085054.10976-2-raag.jadav@intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: baytrail: Use str_hi_lo() helperAndy Shevchenko2023-06-121-1/+2
| | | | | | Use str_hi_lo() helper instead of open coding the same. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: intel: Add Intel Meteor Lake-S pin controller supportAndy Shevchenko2023-06-071-6/+206
| | | | | | | | | | | This driver adds pinctrl/GPIO support for Intel Meteor Lake-S. The GPIO controller is based on the next generation GPIO hardware but still compatible with the one supported by the Intel pinctrl and GPIO core driver. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: moorefield: Use BUFCFG_PINMODE_GPIO in ->pin_dbg_show()Andy Shevchenko2023-06-061-1/+1
| | | | | | | Use explicit comparison to BUFCFG_PINMODE_GPIO instead of implying it. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: moorefield: Fix open-drain pin mode configurationAndy Shevchenko2023-06-061-2/+12
| | | | | | | | | | | Currently the pin may not be configured as open-drain in some cases because the argument may be 0 for the boolean types of the pin configurations. Fix this by ignoring the argument. With that, allow to actually restore pin to the push-pull mode. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: merrifield: Use BUFCFG_PINMODE_GPIO in ->pin_dbg_show()Andy Shevchenko2023-06-061-1/+1
| | | | | | | Use explicit comparison to BUFCFG_PINMODE_GPIO instead of implying it. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: merrifield: Fix open-drain pin mode configurationAndy Shevchenko2023-06-061-2/+12
| | | | | | | | | | | Currently the pin may not be configured as open-drain in some cases because the argument may be 0 for the boolean types of the pin configurations. Fix this by ignoring the argument. With that, allow to actually restore pin to the push-pull mode. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: cherryview: Return correct value if pin in push-pull modeAndy Shevchenko2023-06-061-5/+10
| | | | | | | | | | Currently the getter returns ENOTSUPP on pin configured in the push-pull mode. Fix this by adding the missed switch case. Fixes: ccdf81d08dbe ("pinctrl: cherryview: add option to set open-drain pin config") Fixes: 6e08d6bbebeb ("pinctrl: Add Intel Cherryview/Braswell pin controller support") Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: cherryview: Don't use IRQ core constanst for invalid IRQAndy Shevchenko2023-06-021-1/+1
| | | | | | | The semantics of INVALID_HWIRQ is rather localized to IPI usage. Let's keep it that way. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: baytrail: Use BIT() in BYT_PULL_ASSIGN_* definitionsAndy Shevchenko2023-06-021-3/+2
| | | | | | | | The bias setting (pull-up or pull-down) are bit fields and we never enable them both, hence use BIT() macro to define them. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* pinctrl: baytrail: Unify style of error and debug messagesAndy Shevchenko2023-06-021-41/+23
| | | | | | | | | | | | Use same formatting strings where it makes sense, so linker will utilize only a single copy of it, otherwise make the style similar to the rest of the messages of the close enough semantics. add/remove: 1/0 grow/shrink: 2/2 up/down: 91/-110 (-19) Total: Before=17562, After=17543, chg -0.11% Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
* Merge tag 'pinctrl-v6.3-1' of ↵Linus Torvalds2023-02-2222-315/+177
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Nothing special, notably a lot of new Qualcomm hardware is supported, a RISC-V reference SoC and then some cleanups both in code and device tree bindings. Core changes: - Add PINCTRL_PINFUNCTION() macro and use it in several drivers New drivers: - New driver for the StarFive JH7110 SoC "sys" and "aon" (always-on) pin controllers. (RISC-V.) - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin controller - New subdrivers for the Qualcomm SM8550 SoC and LPASS pin controllers - New subdriver for the Qualcomm SA8775P SoC pin controller - New subdriver for the Qualcomm IPQ5332 SoC pin controller - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC pin control - New subdriver for the Mediatek MT7981 SoC pin controller Improvements: - Several cleanups and refactorings to the Intel drivers - Add 4KOhm bias support to the Intel driver - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver - Support general purpose clocks in the Qualcomm MSM8226 SoC - Several conversions to use the new I2C .probe_new() call - Massive clean-up of the Qualcomm Device Tree YAML schemas - Add VIN[45] pins, groups and functions to the Renesas r8a77950 SoC driver" * tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (118 commits) pinctrl: qcom: Add support for i2c specific pull feature pinctrl: starfive: Add StarFive JH7110 aon controller driver pinctrl: starfive: Add StarFive JH7110 sys controller driver dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl pinctrl: add mt7981 pinctrl driver dt-bindings: pinctrl: add bindings for MT7981 SoC dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated pinctrl: qcom: Introduce IPQ5332 TLMM driver dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl dt-bindings: pinctrl: qcom: lpass-lpi: correct GPIO name pattern pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS dt-bindings: pinctrl: qcom,sm8550-lpass-lpi-pinctrl: add SM8550 LPASS pinctrl: at91: use devm_kasprintf() to avoid potential leaks dt-bindings: pinctrl: qcom: correct gpio-ranges in examples dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example ...
| * pinctrl: intel: Get rid of unused members in struct intel_functionAndy Shevchenko2022-12-301-9/+0
| | | | | | | | | | | | | | | | | | The driver has been converted to a generic data type and macro for the pin function definition, hence get rid of not used members in the struct intel_function. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: moorefield: Convert to use new memeber in struct intel_functionAndy Shevchenko2022-12-301-3/+3
| | | | | | | | | | | | | | | | Convert driver to use generic data type and hence a new member in the struct intel_function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: merrifield: Convert to use new memeber in struct intel_functionAndy Shevchenko2022-12-301-3/+3
| | | | | | | | | | | | | | | | Convert driver to use generic data type and hence a new member in the struct intel_function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: lynxpoint: Convert to use new memeber in struct intel_functionAndy Shevchenko2022-12-301-4/+4
| | | | | | | | | | | | | | | | Convert driver to use generic data type and hence a new member in the struct intel_function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: cherryview: Convert to use new memeber in struct intel_functionAndy Shevchenko2022-12-301-3/+3
| | | | | | | | | | | | | | | | Convert driver to use generic data type and hence a new member in the struct intel_function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: baytrail: Convert to use new memeber in struct intel_functionAndy Shevchenko2022-12-301-5/+5
| | | | | | | | | | | | | | | | Convert driver to use generic data type and hence a new member in the struct intel_function. No functional change intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: intel: Make use of struct pinfunction and PINCTRL_PINFUNCTION()Andy Shevchenko2022-12-302-8/+11
| | | | | | | | | | | | | | | | Since pin control provides a generic data type and a macro for the pin function definition, use them in the Intel driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: intel: Define maximum pad number in the groupAndy Shevchenko2022-12-282-4/+6
| | | | | | | | | | | | | | | | | | Instead of using hard coded magic number here and there, define maximum pad number in the group in newly added INTEL_PINCTRL_MAX_GPP_SIZE. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: intel: Use same order of bit fields for PADCFG2Andy Shevchenko2022-12-281-1/+1
| | | | | | | | | | | | | | | | PADCFG0 and PADCFG1 are ordered from MSB to LSB, do the same for PADCFG2 bit fields. No functional changes intended. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: intel: Add ~4k bias supportAndy Shevchenko2022-12-281-0/+12
| | | | | | | | | | | | | | | | | | All versions that have 20k and 5k resistance, i.e. all that the driver supports, may support ~4k when the above mentioned are connected in parallel. Add such a support. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: intel: Add definitions to all possible biasesAndy Shevchenko2022-12-281-0/+3
| | | | | | | | | | | | | | | | Add definitions to all possible biases, i.e. add ~800 Ohms, ~952 Ohms, ~4 kOhms. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: intel: Deduplicate some code in intel_config_set_pull()Andy Shevchenko2022-12-281-15/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | First part is to assign default argument for all cases, since bias disablement doesn't use it anyway. Second part is to clear all bits in the bias setting and depending on the argument and parameter set them as asked. While at it, add break statement to the default cases. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: intel: Add default case to intel_config_set_pull()Andy Shevchenko2022-12-271-0/+4
| | | | | | | | | | | | | | | | For the sake of symmetry with intel_config_get_pull(), add a default case to the outer switch. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: intel: Convert to generic_handle_domain_irq()Andy Shevchenko2022-12-271-7/+2
| | | | | | | | | | | | | | | | Replace construct that matches generic_handle_irq(irq_find_mapping()) to a single call to generic_handle_domain_irq(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: intel: Always use gpp_num_padown_regs in the main driverAndy Shevchenko2022-12-272-14/+8
| | | | | | | | | | | | | | | | For the size-based communities, always use gpp_num_padown_regs, which is now provided explicitly via INTEL_COMMUNITY_SIZE() macro. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: sunrisepoint: Replace SPT_COMMUNITY() by INTEL_COMMUNITY_*()Andy Shevchenko2022-12-271-24/+13
| | | | | | | | | | | | | | Use INTEL_COMMUNITY_*() common macro instead custom SPT_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
| * pinctrl: tigerlake: Replace TGL_COMMUNITY() by INTEL_COMMUNITY_GPPS()Andy Shevchenko2022-12-271-20/+10
| | | | | | | | | | | | | | Use INTEL_COMMUNITY_GPPS() common macro instead custom TGL_COMMUNITY(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-29 11:08:01 +0000