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path: root/drivers/pinctrl/pinctrl-equilibrium.c
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* pinctrl: equilibrium: Convert to use grp memberAndy Shevchenko2023-12-121-2/+2
| | | | | | | | | | Convert drivers to use grp member embedded in struct group_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin group description. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231211190321.307330-7-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: equilibrium: Convert to use struct pingroupAndy Shevchenko2023-12-071-13/+13
| | | | | | | | | The pin control header provides struct pingroup. Utilize it instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231204160033.1872569-4-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: equilibrium: Use temporary variable to hold pinsAndy Shevchenko2023-12-011-7/+6
| | | | | | | | | | The pins are allocated from the heap, but in order to pass them as constant object, we need to use non-constant pointer. Achieve this by using a temporary variable. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-5-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: equilibrium: Unshadow error code of of_property_count_u32_elems()Andy Shevchenko2023-12-011-3/+4
| | | | | | | | | | | | of_property_count_u32_elems() might return an error code in some cases. It's naturally better to assign what it's returned to the err variable and supply the real code to the upper layer(s). Besides that, it's a common practice to avoid assignments for the data in cases when we know that the error condition happened. Refactor the code accordingly. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231129161459.1002323-4-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: equilibrium: Convert to immutable irq_chipLinus Walleij2023-04-141-8/+14
| | | | | | | | | Convert the driver to immutable irq-chip with a bit of intuition. Cc: Marc Zyngier <maz@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230403-immutable-irqchips-v1-5-503788a7f6e6@linaro.org
* pinctrl: equilibrium: Switch to use fwnode instead of of_nodeAndy Shevchenko2022-05-091-6/+5
| | | | | | | | | GPIO library now accepts fwnode as a firmware node, so switch the driver to use it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20220503151321.58800-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: equilibrium: Fix function addition in multiple groupsRahul Tanwar2021-10-251-1/+6
| | | | | | | | | | Ignore the same function with multiple groups. Fix a typo in error print. Fixes: 1948d5c51dba ("pinctrl: Add pinmux & GPIO controller driver for a new SoC") Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com> Link: https://lore.kernel.org/r/20211020093815.20870-1-rtanwar@maxlinear.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Bulk conversion to generic_handle_domain_irq()Marc Zyngier2021-08-121-1/+1
| | | | | | | | | | | Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Marc Zyngier <maz@kernel.org>
* pinctrl: equilibrium: Add missing MODULE_DEVICE_TABLEBixuan Cui2021-05-201-0/+1
| | | | | | | | | | | This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Bixuan Cui <cuibixuan@huawei.com> Link: https://lore.kernel.org/r/20210508031502.53637-1-cuibixuan@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: equilibrium: add missing of_node_putJunlin Yang2021-03-101-3/+13
| | | | | | | | | | | Fix OF node leaks by calling of_node_put in for_each_child_of_node when the cycle returns. Generated by: scripts/coccinelle/iterators/for_each_child.cocci Signed-off-by: Junlin Yang <yangjunlin@yulong.com> Link: https://lore.kernel.org/r/20210216080231.1303-1-angkery@163.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Fix warning by adding missing MODULE_LICENSERahul Tanwar2019-11-281-0/+1
| | | | | | | | | | | | | | | | | Fix below build warning WARNING: modpost: missing MODULE_LICENSE() in drivers/pinctrl/pinctrl-equilibrium.o Introduced by commit 1948d5c51dba ("pinctrl: Add pinmux & GPIO controller driver for a new SoC") by adding missing MODULE_LICENSE. Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Link: https://lore.kernel.org/r/20191128080832.13529-2-rahul.tanwar@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: Add pinmux & GPIO controller driver for a new SoCRahul Tanwar2019-11-211-0/+944
Intel Lightning Mountain SoC has a pinmux controller & GPIO controller IP which controls pin multiplexing & configuration including GPIO functions selection & GPIO attributes configuration. This IP is not based on & does not have anything in common with Chassis specification. The pinctrl drivers under pinctrl/intel/* are all based upon Chassis spec compliant pinctrl IPs. So this driver doesn't fit & can not use pinctrl framework under pinctrl/intel/* and it requires a separate new driver. Add a new GPIO & pin control framework based driver for this IP. Signed-off-by: Rahul Tanwar <rahul.tanwar@linux.intel.com> Link: https://lore.kernel.org/r/33e649758b70490f01724a887c490d5008c7656d.1573797249.git.rahul.tanwar@linux.intel.com Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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