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* pinctrl: pinmux: Don't free pins requested by other devices in ↵Sonic Zhang2013-08-141-5/+5
| | | | | | | | | | | | | | | pinmux_disable_setting. One peripheral may share part of its pins with the 2nd peripheral and the other pins with the 3rd. If it requests all pins when part of them has already be requested and owned by the 2nd peripheral, this request fails and pinmux_disable_setting() is called. The pinmux_disable_setting() frees all pins of the first peripheral without checking if the pin is owned by itself or the 2nd, which results in the malfunction of the 2nd peripheral driver. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: nomadik: delete ancient pin control APILinus Walleij2013-08-071-295/+0
| | | | | | | | | The pin control subsystem was created to do away with custom pin control APIs such as this one. It was kept for backward-compatibility but is completely unused in the current kernel, so let's delete it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sirf: add missing __iomem annotationJingoo Han2013-08-071-1/+1
| | | | | | | | | | | | | | | | | | Added missing __iomem annotation in order to fix the following sparse warnings: drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: warning: incorrect type in assignment (different address spaces) drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: expected void *regs drivers/pinctrl/sirf/pinctrl-sirf.c:846:14: got void [noderef] <asn:2>* drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: warning: incorrect type in assignment (different address spaces) drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: expected void [noderef] <asn:2>*regs drivers/pinctrl/sirf/pinctrl-sirf.c:869:33: got void *regs drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: warning: incorrect type in argument 1 (different address spaces) drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: expected void volatile [noderef] <asn:2>*addr drivers/pinctrl/sirf/pinctrl-sirf.c:909:17: got void *regs Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: pinconf: fix comparison of different typesJingoo Han2013-08-071-1/+1
| | | | | | | | | Fix the following sparse warning: drivers/pinctrl/pinconf.c:521:20: error: incompatible types in comparison expression (different type sizes) Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: at91: choose appropriate handler for level interruptsBoris BREZILLON2013-08-071-2/+14
| | | | | | | | | | | | | The current implementation handle both edge and level interrupts with the 'handle_simple_irq' handler. Level interrupts are active as long as the pin stays at the configured level (low or high). In this case we have to use 'handle_level_irq' which mask the interrupt until the handle has treated it. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Tested-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Staticize local symbolsSachin Kamat2013-08-071-4/+4
| | | | | | | | Symbols used only in this file are made static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: st: Convert to use devm_ioremap_resourceSachin Kamat2013-08-071-5/+3
| | | | | | | | | devm_request_and_ioremap is deprecated. Use devm_ioremap_resource instead. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: imx: work around select input quirkShawn Guo2013-08-071-2/+32
| | | | | | | | | | | | | | | | | The select input for some pin may not be implemented using the regular select input register but the general purpose register. A real example is that imx6q designers found the select input for USB OTG ID pin is missing at the very late stage, and can not add a new select input register but have to use a general purpose register bit to implement it. The patch adds a workaround for such select input quirk by interpreting the input_val cell of pin function ID in a different way, so that all the info that needed for setting up select input bits in general purpose register could be decoded from there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Tested-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: sunxi: Fix incorrect NULL checkSachin Kamat2013-08-071-1/+1
| | | | | | | | | | *map should be tested for NULL instead of map as kmalloc pointer is assigned to it. This also fixes a potential null pointer dereference bug later in the code. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: shut up a couple of pinctrl warningsRussell King - ARM Linux2013-08-071-18/+11
| | | | | | | | | | | | | | | | | So, I notice that we get a couple of warnings from the pinctrl code: drivers/pinctrl/pinconf.c: In function 'pinconf_dbg_config_print': drivers/pinctrl/pinconf.c:433:36: warning: 'configs' may be used uninitialized in this function drivers/pinctrl/pinconf.c: In function 'pinconf_dbg_config_write': drivers/pinctrl/pinconf.c:511:36: warning: 'configs' may be used uninitialized in this function While the compiler might not be able to work out that "configs" is safe, the code doesn't lend itself very well to identifying that fact when reading it either. This can be trivially solved by a slight restructuring of the code - which also reduces the LOC. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* drivers/pinctrl: don't check resource with devm_ioremap_resourceWolfram Sang2013-08-072-8/+0
| | | | | | | | devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* pinctrl: rockchip: include correct clk headerHeiko Stübner2013-08-071-1/+1
| | | | | | | | The correct header to include for clock handling is clk.h . clk-provider.h should not be used in simple clock consumers. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
* Merge branch 'pinmux/next/fixes' of git://linuxtv.org/pinchartl/fbdev into develLinus Walleij2013-07-296-629/+1093
|\ | | | | | | Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * sh-pfc: r8a7790: Add VIN pin groups and functionsShinobu Uehara2013-07-291-0/+106
| | | | | | | | | | | | Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Add USB pin groups and functionsShinobu Uehara2013-07-291-0/+42
| | | | | | | | | | | | Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com> Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Add SCIF2 pin groups and functionsLaurent Pinchart2013-07-291-0/+32
| | | | | | | | Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Add MSIOF pin groups and functionsKunihito Higashiyama2013-07-291-0/+236
| | | | | | | | | | | | Signed-off-by: Kunihito Higashiyama <kunihito.higashiyama.ur@renesas.com> Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Sort pin groups and functions alphabeticallyLaurent Pinchart2013-07-291-265/+265
| | | | | | | | | | | | | | Navigating through the source code is hard enough without having to manually search for groups and functions. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Fix miscellaneous pinmux configuration tables mistakesShinya Kuribayashi2013-07-291-16/+15
| | | | | | | | | | | | | | | | Fix erroneous entries in the pinmux configuration tables that affect HSCIF, I2C, LBSC, SCIF, SSI and VIN operation. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Add SCIF2 pins configuration supportShinya Kuribayashi2013-07-291-17/+23
| | | | | | | | | | | | | | | | Update the pinmux configuration tables to support the SCIF2 pins (TX2/TX2_B, RX2/RX2_B, SCK2). Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Add TCLK1 pin configuration supportShinya Kuribayashi2013-07-291-3/+4
| | | | | | | | | | | | | | Update the pinmux configuration tables to support the TCLK1 pin. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Swap SCIFA2_RXD_B and HRX0_C configurationsShinya Kuribayashi2013-07-291-8/+8
| | | | | | | | | | | | | | | | The SCIFA2 RXD_B and HRX0_C pins have their pinmux configuration data swapped, fix it. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Remove deprecated SPV_EVEN pinShinya Kuribayashi2013-07-291-4/+3
| | | | | | | | | | | | | | The pins have been removed from the datasheet, remove them here as well. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Remove deprecated RDS pinsShinya Kuribayashi2013-07-291-51/+33
| | | | | | | | | | | | | | The pins have been removed from the datasheet, remove them here as well. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Remove deprecated Ethernet MII/RMII pinsShinya Kuribayashi2013-07-291-130/+94
| | | | | | | | | | | | | | The pins have been removed from the datasheet, remove them here as well. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Remove trailing '_TANS' string from RTS/CTS pinsShinya Kuribayashi2013-07-291-10/+10
| | | | | | | | | | | | | | | | The RTS/CTS pins have been renamed in the datasheet, rename them here as well. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7790: Rename I2C SDA/SCL pinsShinya Kuribayashi2013-07-291-104/+104
| | | | | | | | | | | | | | | | The I2C pins have been renamed in the datasheet, rename them here as well. Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: r8a7779: Add I2C pin groupsPhil Edworthy2013-07-291-0/+105
| | | | | | | | | | | | | | Add all I2C pin groups to R8A7779 PFC driver. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * sh-pfc: sh73a0: Remove EXT_IRQ16L and EXT_IRQ16H macrosLaurent Pinchart2013-07-291-36/+32
| | | | | | | | | | | | | | | | The macros expand to irq_pin() calls and where most probably introduced from a copy&paste of the sh7372 PFC data. Replace them with irq_pin(). Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se>
| * sh-pfc: sh7372: Replace <mach/irqs.h> with <linux/sh_intc.h>Laurent Pinchart2013-07-291-2/+1
| | | | | | | | | | | | | | | | | | The mach/irqs.h header is included only to get the evt2irq macro definition. The macro is defined in linux/sh_intc.h, include it directly instead of the mach-specific header. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se>
| * sh-pfc: Remove unneeded mach/<soc>.h includesLaurent Pinchart2013-07-293-3/+0
| | | | | | | | | | | | | | | | The SoC-specific mach/<soc>.h headers are included needlesly. Don't include them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Magnus Damm <damm@opensource.se>
* | Merge branch 'pinmux/next/pin-no-gpio' of git://linuxtv.org/pinchartl/fbdev ↵Linus Walleij2013-07-2924-3673/+3275
|\ \ | | | | | | | | | | | | | | | into devel Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| * | sh-pfc: Support pins not associated with a GPIO portLaurent Pinchart2013-07-295-18/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pins with selectable functions but without a GPIO port can't be named PORT_# or GP_#_#. Add a SH_PFC_PIN_NAMED macro to declare such pins in the pinmux pins array, naming them with the PIN_ prefix followed by the pin physical position. In order to make sure not to register those pins as GPIOs, add a SH_PFC_PIN_CFG_NO_GPIO pin flag to denote pins without a GPIO port. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Compute pin ranges automaticallyLaurent Pinchart2013-07-297-88/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the manually specified ranges from PFC SoC data and compute the ranges automatically. This prevents ranges from being out-of-sync with pins definitions. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Rename struct sh_pfc nr_pins field to nr_gpio_pinsLaurent Pinchart2013-07-293-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The field contains the number of pins with an associated GPIO port. This is currently equal to the total number of pins but will be modified when adding support for pins without a GPIO port. Rename the field accordingly. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Add pin number to struct sh_pfc_pinLaurent Pinchart2013-07-291-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | The pin number is usually equal to the GPIO number but can differ when GPIO numbering is sparse. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Pass the pin number down to the port function macroLaurent Pinchart2013-07-291-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The PORT_1 macro invokes a macro passed as a parameter. Pass the pin number down to that macro at the bottom of the call stack. This will be used to compute the pin ranges automatically. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Add port numbers to the CPU_ALL_PORT macroLaurent Pinchart2013-07-295-114/+114
| | | | | | | | | | | | | | | | | | | | | | | | Pass down the port number down to the PORT_1 macro. The port number will be used to compute the pin ranges automatically. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Don't duplicate argument to PINMUX_GPIO macroLaurent Pinchart2013-07-2912-1420/+1418
| | | | | | | | | | | | | | | | | | | | | | | | | | | The PINMUX_GPIO macro takes a port name and a data mark, respectively of the form GPIO_name and name_DATA. Modify the macro to take the name as a single argument and derive the port name and data mark from it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: shx3: Remove shx3_ prefix from static symbolsLaurent Pinchart2013-07-291-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | Unlike all other PFC SoC data, the shx3 data prefix all static symbols with shx3_. Remove the prefix to be consistent with the other source files. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * | sh-pfc: sh7734: Use the common GP port style macrosLaurent Pinchart2013-07-292-51/+22
| | | | | | | | | | | | | | | | | | | | | The SoC has a bank-style PFC. Replace the custom-defined macros with common macros from sh-pfc.h. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
| * | sh-pfc: Consolidate pin definition macrosLaurent Pinchart2013-07-295-56/+36
| | | | | | | | | | | | | | | | | | | | | Move the pin definition macros to a common header file. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Consolidate PFC SoC data macrosLaurent Pinchart2013-07-299-214/+140
| | | | | | | | | | | | | | | | | | | | | | | | Move macros defined in several SoC data files to a common location and document them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Rename gpio arguments to be consistent with the rest of the codeLaurent Pinchart2013-07-291-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The gpio_get_data_reg() and gpio_setup_data_reg() functions both take an argument named gpio. The argument contains a GPIO offset for the first function and a pin index for the second one. Rename them to offset and idx respectively to match the rest of the code. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Replace pinmux_enum_id typedef with u16Laurent Pinchart2013-07-2921-46/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The typedef only conceals the real variable type without bringing any additional value (see Documentation/CodingStyle, section 5.b). Moreover, it polutes the pinmux namespace. Replace it with the integer type it used to hide. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Don't overallocate memory for the GPIO chip pins arrayLaurent Pinchart2013-07-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO driver uses an array of sh_pfc_gpio_pin structures to store per-GPIO pin data. The array size is miscomputed at allocation time by using the number of the last pin instead of the number of pins. When the pin space contains holes this leads to memory overallocation. Fix it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Remove unused GPIO_PORT_ALL macroLaurent Pinchart2013-07-293-16/+0
| | | | | | | | | | | | | | | | | | | | | The macro isn't used, remove it. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Remove unneeded const keywordsLaurent Pinchart2013-07-291-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Two integer field structures are needlesly defined as const. Remove the const keyword. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Remove unused macro and enum entriesLaurent Pinchart2013-07-291-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | The SH_PFC_MARK_INVALID macro and the PINMUX_FLAG_TYPE, GPIO_CFG_REQ and GPIO_CFG_FREE enum entries are used, remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
| * | sh-pfc: Remove unused PORT_DATA_* macrosLaurent Pinchart2013-07-291-30/+0
| | | | | | | | | | | | | | | | | | | | | Most of the PORT_DATA_* macros are not used, remove them. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Yusuke Goda <yusuke.goda.sx@renesas.com>