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* Merge tag 'arm-drivers-v5.12' of ↵Linus Torvalds2021-02-204-5/+12
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "Updates for SoC specific drivers include a few subsystems that have their own maintainers but send them through the soc tree: SCMI firmware: - add support for a completion interrupt Reset controllers: - new driver for BCM4908 - new devm_reset_control_get_optional_exclusive_released() function Memory controllers: - Renesas RZ/G2 support - Tegra124 interconnect support - Allow more drivers to be loadable modules TEE/optee firmware: - minor code cleanup The other half of this is SoC specific drivers that do not belong into any other subsystem, most of them living in drivers/soc: - Allwinner/sunxi power management work - Allwinner H616 support - ASpeed AST2600 system identification support - AT91 SAMA7G5 SoC ID driver - AT91 SoC driver cleanups - Broadcom BCM4908 power management bus support - Marvell mbus cleanups - Mediatek MT8167 power domain support - Qualcomm socinfo driver support for PMIC - Qualcomm SoC identification for many more products - TI Keystone driver cleanups for PRUSS and elsewhere" * tag 'arm-drivers-v5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (89 commits) soc: aspeed: socinfo: Add new systems soc: aspeed: snoop: Add clock control logic memory: tegra186-emc: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE memory: samsung: exynos5422-dmc: Correct function names in kerneldoc memory: ti-emif-pm: Drop of_match_ptr from of_device_id table optee: simplify i2c access drivers: soc: atmel: fix type for same7 tee: optee: remove need_resched() before cond_resched() soc: qcom: ocmem: don't return NULL in of_get_ocmem optee: sync OP-TEE headers tee: optee: fix 'physical' typos drivers: optee: use flexible-array member instead of zero-length array tee: fix some comment typos in header files soc: ti: k3-ringacc: Use of_device_get_match_data() soc: ti: pruss: Refactor the CFG sub-module init soc: mediatek: pm-domains: Don't print an error if child domain is deferred soc: mediatek: pm-domains: Add domain regulator supply dt-bindings: power: Add domain regulator supply soc: mediatek: cmdq: Remove cmdq_pkt_flush() soc: mediatek: pm-domains: Add support for mt8167 ...
| * reset: core: fix a kernel-doc markupMauro Carvalho Chehab2021-01-141-2/+2
| | | | | | | | | | | | | | | | | | | | A function has a different name between their prototype and its kernel-doc markup: ../drivers/reset/core.c:888: warning: expecting prototype for device_reset(). Prototype was for __device_reset() instead Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: hisilicon: correct vendor prefixZhen Lei2021-01-081-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | The vendor prefix of "Hisilicon Limited" is "hisilicon", it is clearly stated in "vendor-prefixes.yaml". For backward compatibility reasons fall back to the deprecated compatible if the new one failed. Fixes: 1527058736fa ("reset: hisilicon: add reset-hi3660") Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Cc: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: simple: add BCM4908 MISC PCIe reset controller supportRafał Miłecki2021-01-082-1/+3
| | | | | | | | | | | | | | | | It's a trivial reset controller. One register with bit per PCIe core. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | ARM: remove zte zx platformArnd Bergmann2021-01-201-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | The ZTE ZX set-top-box SoC platform was added in 2015 by Jun Nie, with Baoyou Xie and Shawn Guo subsequently becoming maintainers after the addition of the 64-bit variant. However, the only machines that were ever supported upstream are the reference designs, not actual set-top-box devices that would benefit from this support. All ZTE set-top-boxes from the past few years seem to be based on third-party SoCs. While there is very little information about zx296702 and zx296718 on the web, I found some references to other chips from the same family, such as zx296716 and zx296719, which were never submitted for upstream support. Finally, there is no support for the GPU on either of them, with the lima and panfrost device drivers having been added after work on the zx platform had stopped. Shawn confirmed that he has not seen any interest in this platform for the past four years, and that it can be removed. Thanks to Jun and Shawn for maintaining this platform over the past five years. Cc: Jun Nie <jun.nie@linaro.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge tag 'arm-soc-drivers-5.11' of ↵Linus Torvalds2020-12-165-6/+93
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "There are a couple of subsystems maintained by other people that merge their drivers through the SoC tree, those changes include: - The SCMI firmware framework gains support for sensor notifications and for controlling voltage domains. - A large update for the Tegra memory controller driver, integrating it better with the interconnect framework - The memory controller subsystem gains support for Mediatek MT8192 - The reset controller framework gains support for sharing pulsed resets For Soc specific drivers in drivers/soc, the main changes are - The Allwinner/sunxi MBUS gets a rework for the way it handles dma_map_ops and offsets between physical and dma address spaces. - An errata fix plus some cleanups for Freescale Layerscape SoCs - A cleanup for renesas drivers regarding MMIO accesses. - New SoC specific drivers for Mediatek MT8192 and MT8183 power domains - New SoC specific drivers for Aspeed AST2600 LPC bus control and SoC identification. - Core Power Domain support for Qualcomm MSM8916, MSM8939, SDM660 and SDX55. - A rework of the TI AM33xx 'genpd' power domain support to use information from DT instead of platform data - Support for TI AM64x SoCs - Allow building some Amlogic drivers as modules instead of built-in Finally, there are numerous cleanups and smaller bug fixes for Mediatek, Tegra, Samsung, Qualcomm, TI OMAP, Amlogic, Rockchips, Renesas, and Xilinx SoCs" * tag 'arm-soc-drivers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (222 commits) soc: mediatek: mmsys: Specify HAS_IOMEM dependency for MTK_MMSYS firmware: xilinx: Properly align function parameter firmware: xilinx: Add a blank line after function declaration firmware: xilinx: Remove additional newline firmware: xilinx: Fix kernel-doc warnings firmware: xlnx-zynqmp: fix compilation warning soc: xilinx: vcu: add missing register NUM_CORE soc: xilinx: vcu: use vcu-settings syscon registers dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding soc: xilinx: vcu: drop useless success message clk: samsung: mark PM functions as __maybe_unused soc: samsung: exynos-chipid: initialize later - with arch_initcall soc: samsung: exynos-chipid: order list of SoCs by name memory: jz4780_nemc: Fix potential NULL dereference in jz4780_nemc_probe() memory: ti-emif-sram: only build for ARMv7 memory: tegra30: Support interconnect framework memory: tegra20: Support hardware versioning and clean up OPP table initialization dt-bindings: memory: tegra20-emc: Document opp-supported-hw property soc: rockchip: io-domain: Fix error return code in rockchip_iodomain_probe() reset-controller: ti: force the write operation when assert or deassert ...
| * reset-controller: ti: force the write operation when assert or deassertCrystal Guo2020-12-031-2/+2
| | | | | | | | | | | | | | | | Force the write operation in case the read already happens to return the correct value. Signed-off-by: Crystal Guo <crystal.guo@mediatek.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: socfpga: add error handling and release mem-regionDinh Nguyen2020-12-011-2/+9
| | | | | | | | | | | | | | | | | | | | | | In case of an error, call release_mem_region when an error happens during allocation of resources. Also add error handling for the case that reset_controller_register fails. Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: meson: make it possible to build as a moduleNeil Armstrong2020-11-162-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to reduce the kernel Image size on multi-platform distributions, make it possible to build the reset controller driver as a module. This partially reverts commit 8290924e6878 ("reset: meson: make it explicitly non-modular"). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: make shared pulsed reset controls re-triggerableAmjad Ouled-Ameur2020-11-161-0/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current reset framework API does not allow to release what is done by reset_control_reset(), IOW decrement triggered_count. Add the new reset_control_rearm() call to do so. When reset_control_reset() has been called once, the counter triggered_count, in the reset framework, is incremented i.e the resource under the reset is in-use and the reset should not be done again. reset_control_rearm() would be the way to state that the resource is no longer used and, that from the caller's perspective, the reset can be fired again if necessary. Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com> Reported-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: add BCM6345 reset controller driverÁlvaro Fernández Rojas2020-11-173-0/+143
|/ | | | | | | | | | Add support for resetting blocks through the Linux reset controller subsystem for BCM63xx SoCs. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <F.fainelli@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2020-10-245-14/+64
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms. A bulk of this is smaller fixes or cleanups, but some of the new material this time around is: - Support for Nvidia Tegra234 SoC - Ring accelerator support for TI AM65x - PRUSS driver for TI platforms - Renesas support for R-Car V3U SoC - Reset support for Cortex-M4 processor on i.MX8MQ There are also new socinfo entries for a handful of different SoCs and platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits) drm/mediatek: reduce clear event soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api soc: mediatek: cmdq: add jump function soc: mediatek: cmdq: add write_s_mask value function soc: mediatek: cmdq: add write_s value function soc: mediatek: cmdq: add read_s function soc: mediatek: cmdq: add write_s_mask function soc: mediatek: cmdq: add write_s function soc: mediatek: cmdq: add address shift in jump soc: mediatek: mtk-infracfg: Fix kerneldoc soc: amlogic: pm-domains: use always-on flag reset: sti: reset-syscfg: fix struct description warnings reset: imx7: add the cm4 reset for i.MX8MQ dt-bindings: reset: imx8mq: add m4 reset reset: Fix and extend kerneldoc reset: reset-zynqmp: Added support for Versal platform dt-bindings: reset: Updated binding for Versal reset driver reset: imx7: Support module build soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk soc: fsl: qman: convert to use be32_add_cpu() ...
| * reset: sti: reset-syscfg: fix struct description warningsAlain Volmat2020-09-231-3/+4
| | | | | | | | | | | | | | | | | | Fix formating of struct description to avoid warning highlighted by W=1 compilation. Fixes: e5d76075d930 ("drivers: reset: STi SoC system configuration reset controller support") Signed-off-by: Alain Volmat <avolmat@me.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: imx7: add the cm4 reset for i.MX8MQPeng Fan2020-09-231-0/+4
| | | | | | | | | | | | | | Add the cm4 reset used by the remoteproc driver Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: Fix and extend kerneldocKrzysztof Kozlowski2020-09-231-1/+2
| | | | | | | | | | | | | | | | | | | | Fix W=1 compile warnings (invalid kerneldoc): drivers/reset/core.c:50: warning: Function parameter or member 'array' not described in 'reset_control' drivers/reset/core.c:50: warning: Function parameter or member 'deassert_count' not described in 'reset_control' Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: reset-zynqmp: Added support for Versal platformSai Krishna Potthuri2020-09-231-6/+44
| | | | | | | | | | | | | | | | | | | | | | Updated the reset driver to support Versal platform. As part of adding Versal support - Added Versal specific compatible string. - Reset Id and number of resets are different for Versal and ZynqMP, hence taken care of these two based on compatible string. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: imx7: Support module buildAnson Huang2020-09-232-4/+10
| | | | | | | | | | | | | | | | | | | | Use module_platform_driver(), add module device table, author, description and license to support module build, and CONFIG_RESET_IMX7 is changed to default 'y' ONLY for i.MX7D, other platforms need to select it in defconfig. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | Merge 5.9-rc3 into usb-nextGreg Kroah-Hartman2020-08-311-7/+7
|\ \ | | | | | | | | | | | | | | | We want the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * | treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva2020-08-231-7/+7
| |/ | | | | | | | | | | | | | | | | | | Replace the existing /* fall through */ comments and its variants with the new pseudo-keyword macro fallthrough[1]. Also, remove unnecessary fall-through markings when it is the case. [1] https://www.kernel.org/doc/html/v5.7/process/deprecated.html?highlight=fallthrough#implicit-switch-case-fall-through Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
* / reset: Add Raspberry Pi 4 firmware reset controllerNicolas Saenz Julienne2020-08-183-0/+134
|/ | | | | | | | | | | | | | Raspberry Pi 4's co-processor controls some of the board's HW initialization process, but it's up to Linux to trigger it when relevant. Introduce a reset controller capable of interfacing with RPi4's co-processor that models these firmware initialization routines as reset lines. Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Link: https://lore.kernel.org/r/20200629161845.6021-3-nsaenzjulienne@suse.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* Merge tag 'drivers_soc_for_5.9' of ↵Arnd Bergmann2020-07-271-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers SOC: TI Keystone driver update for v5.9 - TI K3 Ring Accelerator updates - Few non critical warining fixes * tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static firmware: ti_sci: Replace HTTP links with HTTPS ones soc: ti/ti_sci_protocol.h: drop a duplicated word + clarify soc: ti: k3: fix semicolon.cocci warnings soc: ti: k3-ringacc: fix: warn: variable dereferenced before check 'ring' dmaengine: ti: k3-udma: Switch to k3_ringacc_request_rings_pair soc: ti: k3-ringacc: separate soc specific initialization soc: ti: k3-ringacc: add request pair of rings api. soc: ti: k3-ringacc: add ring's flags to dump soc: ti: k3-ringacc: Move state tracking variables under a struct dt-bindings: soc: ti: k3-ringacc: convert bindings to json-schema Link: https://lore.kernel.org/r/1595711814-7015-1-git-send-email-santosh.shilimkar@oracle.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * firmware: ti_sci: Replace HTTP links with HTTPS onesAlexander A. Klimov2020-07-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
* | reset: Replace HTTP links with HTTPS onesAlexander A. Klimov2020-07-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: intel: fix a compile warning about REG_OFFSET redefinedDejin Zheng2020-07-201-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | kernel test robot reports a compile warning about REG_OFFSET redefined in the reset-intel-gw.c after merging commit e44ab4e14d6f4 ("regmap: Simplify implementation of the regmap_read_poll_timeout() macro"). the warning is like that: drivers/reset/reset-intel-gw.c:18:0: warning: "REG_OFFSET" redefined #define REG_OFFSET GENMASK(31, 16) In file included from ./arch/arm/mach-ixp4xx/include/mach/hardware.h:30:0, from ./arch/arm/mach-ixp4xx/include/mach/io.h:15, from ./arch/arm/include/asm/io.h:198, from ./include/linux/io.h:13, from ./include/linux/iopoll.h:14, from ./include/linux/regmap.h:20, from drivers/reset/reset-intel-gw.c:12: ./arch/arm/mach-ixp4xx/include/mach/platform.h:25:0: note: this is the location of the previous definition #define REG_OFFSET 3 Reported-by: kernel test robot <lkp@intel.com> Fixes: c9aef213e38cde ("reset: intel: Add system reset controller driver") Signed-off-by: Dejin Zheng <zhengdejin5@gmail.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: simple: Add reset callbackMaxime Ripard2020-06-161-0/+20
| | | | | | | | | | | | | | | | | | | | The reset-simple code lacks a reset callback that is still pretty easy to implement. The only real thing to consider is the delay needed for a device to be reset, so let's expose that as part of the reset-simple driver data. Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: Move reset-simple header out of drivers/resetMaxime Ripard2020-06-165-49/+4
|/ | | | | | | | | | The reset-simple code can be useful for drivers outside of drivers/reset that have a few reset controls as part of their features. Let's move it to include/linux/reset. Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge tag 'char-misc-5.8-rc1' of ↵Linus Torvalds2020-06-071-19/+7
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the large set of char/misc driver patches for 5.8-rc1 Included in here are: - habanalabs driver updates, loads - mhi bus driver updates - extcon driver updates - clk driver updates (approved by the clock maintainer) - firmware driver updates - fpga driver updates - gnss driver updates - coresight driver updates - interconnect driver updates - parport driver updates (it's still alive!) - nvmem driver updates - soundwire driver updates - visorbus driver updates - w1 driver updates - various misc driver updates In short, loads of different driver subsystem updates along with the drivers as well. All have been in linux-next for a while with no reported issues" * tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits) habanalabs: correctly cast u64 to void* habanalabs: initialize variable to default value extcon: arizona: Fix runtime PM imbalance on error extcon: max14577: Add proper dt-compatible strings extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()' extcon: remove redundant assignment to variable idx w1: omap-hdq: print dev_err if irq flags are not cleared w1: omap-hdq: fix interrupt handling which did show spurious timeouts w1: omap-hdq: fix return value to be -1 if there is a timeout w1: omap-hdq: cleanup to add missing newline for some dev_dbg /dev/mem: Revoke mappings when a driver claims the region misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages() misc: xilinx-sdfec: cleanup return value in xsdfec_table_write() misc: xilinx-sdfec: improve get_user_pages_fast() error handling nvmem: qfprom: remove incorrect write support habanalabs: handle MMU cache invalidation timeout habanalabs: don't allow hard reset with open processes habanalabs: GAUDI does not support soft-reset habanalabs: add print for soft reset due to event habanalabs: improve MMU cache invalidation code ...
| * firmware: xilinx: Remove eemi ops for reset_get_statusRajan Vaja2020-04-281-7/+1
| | | | | | | | | | | | | | | | | | | | Use direct function call instead of using eemi ops for reset_get_status. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-14-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * firmware: xilinx: Remove eemi ops for reset_assertRajan Vaja2020-04-281-12/+6
| | | | | | | | | | | | | | | | | | | | Use direct function call instead of using eemi ops for reset_assert. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Link: https://lore.kernel.org/r/1587761887-4279-13-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* | reset: hi6220: Add support for AO reset controllerPeter Griffin2020-05-061-1/+68
| | | | | | | | | | | | | | | | | | | | | | | | This is required to bring Mali450 gpu out of reset. Cc: Peter Griffin <peter.griffin@linaro.org> Cc: Enrico Weigelt <info@metux.net> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> [jstultz: Added comment, Fix void return build issue Reported-by: kbuild test robot <lkp@intel.com>] Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: imx7: Add support for i.MX8MP SoCAnson Huang2020-05-061-0/+101
|/ | | | | | | | i.MX8MP is a new SoC of i.MX8M family, it has same src IP inside but with different module layout, add support for it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* reset: intel: add unspecified HAS_IOMEM dependencyBrendan Higgins2020-02-101-1/+1
| | | | | | | | | | | | | | Currently CONFIG_RESET_INTEL_GW=y implicitly depends on CONFIG_HAS_IOMEM=y; consequently, on architectures without IOMEM we get the following build error: /usr/bin/ld: drivers/reset/reset-intel-gw.o: in function `intel_reset_probe': drivers/reset/reset-intel-gw.c:185: undefined reference to `devm_platform_ioremap_resource' Fix the build error by adding the unspecified dependency. Signed-off-by: Brendan Higgins <brendanhiggins@google.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* reset: brcmstb-rescal: add unspecified HAS_IOMEM dependencyBrendan Higgins2020-02-101-0/+1
| | | | | | | | | | | | | | Currently CONFIG_RESET_BRCMSTB_RESCAL=y implicitly depends on CONFIG_HAS_IOMEM=y; consequently, on architectures without IOMEM we get the following build error: /usr/bin/ld: drivers/reset/reset-brcmstb-rescal.o: in function `brcm_rescal_reset_probe': drivers/reset/reset-brcmstb-rescal.c:76: undefined reference to `devm_ioremap_resource' Fix the build error by adding the unspecified dependency. Signed-off-by: Brendan Higgins <brendanhiggins@google.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* Merge tag 'reset-for-5.6' of git://git.pengutronix.de/pza/linux into arm/driversOlof Johansson2020-01-108-23/+714
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reset controller updates for v5.6 This tag adds support for the Nuvoton NPCM, Intel Gatway SoC, and Broadcom BCM7216 RESCAL reset controllers, adds missing SCSSI reset controls for newer Uniphier SoCs, aligns the program flow in the devm_reset_controller_register, __devm_reset_control_get, and devm_reset_control_array_get functions for better consistency, and allows to build the Qcom AOSS reset driver as a module. This is based on v5.5-rc3 because the core patch depends on commit db23808615e2 ("reset: Do not register resource data for missing resets"). * tag 'reset-for-5.6' of git://git.pengutronix.de/pza/linux: reset: qcom-aoss: Allow CONFIG_RESET_QCOM_AOSS to be a tristate reset: Add Broadcom STB RESCAL reset controller dt-bindings: reset: Document BCM7216 RESCAL reset controller reset: intel: Add system reset controller driver dt-bindings: reset: Add YAML schemas for the Intel Reset controller reset: uniphier: Add SCSSI reset control for each channel reset: Align logic and flow in managed helpers reset: npcm: add NPCM reset controller driver dt-bindings: reset: Add binding constants for NPCM7xx reset controller dt-bindings: reset: add NPCM reset controller documentation Link: https://lore.kernel.org/r/dbbb2ca7490a0146d9ba632fd4d9f38063e03e9f.camel@pengutronix.de Signed-off-by: Olof Johansson <olof@lixom.net>
| * reset: qcom-aoss: Allow CONFIG_RESET_QCOM_AOSS to be a tristateJohn Stultz2020-01-082-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow CONFIG_RESET_QCOM_AOSS to be set as as =m to allow for the driver to be loaded from a modules. Also replaces the builtin_platform_driver() line with module_platform_driver() and adds a MODULE_DEVICE_TABLE() entry. Cc: Todd Kjos <tkjos@google.com> Cc: Alistair Delva <adelva@google.com> Cc: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: Add Broadcom STB RESCAL reset controllerJim Quinlan2020-01-063-0/+115
| | | | | | | | | | | | | | | | | | | | | | On BCM7216 there is a special purpose reset controller named RESCAL (reset calibration) which is necessary for SATA and PCIe0/1 to operate correctly. This commit adds support for such a reset controller to be available. Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: intel: Add system reset controller driverDilip Kota2020-01-033-0/+272
| | | | | | | | | | | | | | | | | | | | Add driver for the reset controller present on Intel Gateway SoCs for performing reset management of the devices present on the SoC. Driver also registers a reset handler to peform the entire device reset. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: uniphier: Add SCSSI reset control for each channelKunihiko Hayashi2020-01-021-5/+8
| | | | | | | | | | | | | | | | | | | | | | SCSSI has reset controls for each channel in the SoCs newer than Pro4, so this adds missing reset controls for channel 1, 2 and 3. And more, this moves MCSSI reset ID after SCSSI. Fixes: 6b39fd590aeb ("reset: uniphier: add reset control support for SPI") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: Align logic and flow in managed helpersGeert Uytterhoeven2020-01-021-16/+17
| | | | | | | | | | | | | | | | | | | | | | | | __devm_reset_control_get() and devm_reset_control_array_get() are very similar, but they do not look similar, due to inverted logic. Make them more similar, following the "bail out early" paradigm. Adjust the logic and flow in devm_reset_controller_register() to match the two other functions. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: npcm: add NPCM reset controller driverTomer Maimon2020-01-023-0/+299
| | | | | | | | | | | | | | Add Nuvoton NPCM BMC reset controller driver. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | Merge tag 'cpuidle_psci-v5.5-rc4' of ↵Olof Johansson2020-01-082-12/+4
|\| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/people/ulf.hansson/linux-pm into arm/drivers Initial support for hierarchical CPU arrangement, managed by PSCI and its corresponding cpuidle driver. This support is based upon using the generic PM domain, which already supports devices belonging to CPUs. Finally, these is a DTS patch that enables the hierarchical topology to be used for the Qcom 410c Dragonboard, which supports the PSCI OS-initiated mode. * tag 'cpuidle_psci-v5.5-rc4' of git://git.linaro.org/people/ulf.hansson/linux-pm: (611 commits) arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 cpuidle: psci: Add support for PM domains by using genpd PM / Domains: Introduce a genpd OF helper that removes a subdomain cpuidle: psci: Support CPU hotplug for the hierarchical model cpuidle: psci: Manage runtime PM in the idle path cpuidle: psci: Prepare to use OS initiated suspend mode via PM domains cpuidle: psci: Attach CPU devices to their PM domains cpuidle: psci: Add a helper to attach a CPU to its PM domain cpuidle: psci: Support hierarchical CPU idle states cpuidle: psci: Simplify OF parsing of CPU idle state nodes cpuidle: dt: Support hierarchical CPU idle states of: base: Add of_get_cpu_state_node() to get idle states for a CPU node firmware: psci: Export functions to manage the OSI mode dt: psci: Update DT bindings to support hierarchical PSCI states cpuidle: psci: Align psci_power_state count with idle state count Linux 5.5-rc4 locks: print unsigned ino in /proc/locks riscv: export flush_icache_all to modules riscv: reject invalid syscalls below -1 riscv: fix compile failure with EXPORT_SYMBOL() & !MMU ... Link: https://lore.kernel.org/r/20200102160820.3572-1-ulf.hansson@linaro.org Signed-off-by: Olof Johansson <olof@lixom.net>
| * reset: Do not register resource data for missing resetsGeert Uytterhoeven2019-12-101-2/+2
| | | | | | | | | | | | | | | | | | | | | | When an optional reset is not present, __devm_reset_control_get() and devm_reset_control_array_get() still register resource data to release the non-existing reset on cleanup, which is futile. Fix this by skipping NULL reset control pointers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: Fix {of,devm}_reset_control_array_get kerneldoc return typesGeert Uytterhoeven2019-12-101-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | of_reset_control_array_get() and devm_reset_control_array_get() return struct reset_control pointers, not internal struct reset_control_array pointers, just like all other reset control API calls. Correct the kerneldoc to match the code. Fixes: 17c82e206d2a3cd8 ("reset: Add APIs to manage array of resets") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: brcmstb: Remove resource checksFlorian Fainelli2019-12-101-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The use of IS_ALIGNED() is incorrect, the typical resource we pass looks like this: start: 0x8404318, size: 0x30. When using IS_ALIGNED() we will get the following 0x8404318 & (0x18 - 1) = 0x10 which is definitively not equal to 0, same goes with the size. These two checks would make the driver fail probing. Remove the resource checks, since there should be no constraint on the base addresse or size. Fixes: 77750bc089e4 ("reset: Add Broadcom STB SW_INIT reset controller driver") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
* | reset: reset-scmi: Match scmi device by both name and protocol idSudeep Holla2019-12-241-1/+1
|/ | | | | | | | | | | | | | The scmi bus now has support to match the driver with devices not only based on their protocol id but also based on their device name if one is available. This was added to cater the need to support multiple devices and drivers for the same protocol. Let us add the name "reset" to scmi_device_id table in the driver so that in matches only with device with the same name and protocol id SCMI_PROTOCOL_RESET. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2019-12-057-18/+81
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Olof Johansson: "Various driver updates for platforms: - A larger set of work on Tegra 2/3 around memory controller and regulator features, some fuse cleanups, etc.. - MMP platform drivers, in particular for USB PHY, and other smaller additions. - Samsung Exynos 5422 driver for DMC (dynamic memory configuration), and ASV (adaptive voltage), allowing the platform to run at more optimal operating points. - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas - Clock/reset control driver for TI/OMAP - Meson-A1 reset controller support - Qualcomm sdm845 and sda845 SoC IDs for socinfo" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits) firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT soc: fsl: add RCPM driver dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition memory: tegra: Consolidate registers definition into common header memory: tegra: Ensure timing control debug features are disabled memory: tegra: Introduce Tegra30 EMC driver memory: tegra: Do not handle error from wait_for_completion_timeout() memory: tegra: Increase handshake timeout on Tegra20 memory: tegra: Print a brief info message about EMC timings memory: tegra: Pre-configure debug register on Tegra20 memory: tegra: Include io.h instead of iopoll.h memory: tegra: Adapt for Tegra20 clock driver changes memory: tegra: Don't set EMC rate to maximum on probe for Tegra20 memory: tegra: Add gr2d and gr3d to DRM IOMMU group memory: tegra: Set DMA mask based on supported address bits soc: at91: Add Atmel SFR SN (Serial Number) support memory: atmel-ebi: switch to SPDX license identifiers memory: atmel-ebi: move NUM_CS definition inside EBI driver soc: mediatek: Refactor bus protection control soc: mediatek: Refactor sram control ...
| * reset: improve of_xlate documentationPhilipp Zabel2019-10-241-2/+4
| | | | | | | | | | | | Mention of_reset_simple_xlate as the default if of_xlate is not set. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: simple: Add Realtek RTD1195/RTD1295Andreas Färber2019-10-241-1/+2
| | | | | | | | | | | | | | | | Enable RESET_SIMPLE for ARCH_REALTEK. They can reuse the DesignWare bindings to avoid a new compatible. Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: simple: Keep alphabetical orderAndreas Färber2019-10-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Restore alphabetical order for Kconfig dependencies and help text. Compatibles got out of order too, but no functional change done here. Goal is to make it obvious where to add new platforms. Fixes: 64c47b624f64 ("reset: Add reset controller support for BM1880 SoC") Fixes: 1d7592f84f92 ("reset: simple: Enable for ASPEED systems") Fixes: 96a2f50305d1 ("reset: build simple reset controller driver for Agilex") Cc: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
| * reset: zynqmp: Make reset_control_ops constPhilipp Zabel2019-10-221-1/+1
| | | | | | | | | | | | | | The zynqmp_reset_ops structure is never modified. Make it const. Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-04 13:32:25 +0000