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* soc: fsl: qe: qe_io.c: access device tree property using be32_to_cpuRasmus Villemoes2019-12-091-4/+10
| | | | | | | | | We need to apply be32_to_cpu to make this work correctly on little-endian hosts. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: qe_io.c: don't open-code of_parse_phandle()Rasmus Villemoes2019-12-091-5/+2
| | | | | | Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: qe.c: use of_property_read_* helpersRasmus Villemoes2019-12-091-25/+8
| | | | | | | | | | | | | Instead of manually doing of_get_property/of_find_property and reading the value by assigning to a u32* or u64* and dereferencing, use the of_property_read_* functions. This make the code more readable, and more importantly, is required for this to work correctly on little-endian platforms. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: merge qe_ic.h headers into qe_ic.cRasmus Villemoes2019-12-092-101/+50
| | | | | | | | | | The public qe_ic.h header is no longer included by anything but qe_ic.c. Merge both headers into qe_ic.c, and drop the unused constants. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: simplify qe_ic_init()Rasmus Villemoes2019-12-091-23/+4
| | | | | | | | | | | | qe_ic_init() takes a flags parameter, but all callers (including the sole remaining one) have always passed 0. So remove that parameter and simplify the body accordingly. We still explicitly initialize the Interrupt Configuration Register (CICR) to its reset value of all-zeroes, just in case the bootloader has played funny games. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: make qe_ic_get_{low,high}_irq staticRasmus Villemoes2019-12-091-2/+2
| | | | | | | | These are only called from within qe_ic.c, so make them static. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: don't use NO_IRQ in qe_ic.cRasmus Villemoes2019-12-091-11/+10
| | | | | | | | | | | | | This driver is currently PPC-only, and on powerpc, NO_IRQ is 0, so this doesn't change functionality. However, not every architecture defines NO_IRQ, and some define it as -1, so the detection of a failed irq_of_parse_and_map() (which returns 0 on failure) would be wrong on those. So to prepare for allowing this driver to build on other architectures, drop all references to NO_IRQ. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: remove unused qe_ic_set_* functionsRasmus Villemoes2019-12-091-94/+0
| | | | | | | | | | | | | | | | There are no current callers of these functions, and they use the ppc-specific virq_to_hw(). So removing them gets us one step closer to building QE support for ARM. If the functionality is ever actually needed, the code can be dug out of git and then adapted to work on all architectures, but for future reference please note that I believe qe_ic_set_priority is buggy: The "priority < 4" should be "priority <= 4", and in the else branch 24 should be replaced by 28, at least if I'm reading the data sheet right. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: rename qe_ic_cascade_low_mpic -> qe_ic_cascade_lowRasmus Villemoes2019-12-091-4/+4
| | | | | | | | | | The qe_ic_cascade_{low,high}_mpic functions are now used as handlers both when the interrupt parent is mpic as well as ipic, so remove the _mpic suffix. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: move qe_ic_cascade_* functions to qe_ic.cRasmus Villemoes2019-12-091-0/+42
| | | | | | | | | | | | These functions are only ever called through a function pointer, and therefore it makes no sense for them to be "static inline" - gcc has no choice but to emit a copy in each translation unit that takes the address of one of these. Since they are now only referenced from qe_ic.c, just make them local to that file. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: move calls of qe_ic_init out of arch/powerpc/Rasmus Villemoes2019-12-091-3/+26
| | | | | | | | | | | | | | | | | | | | | | | Having to call qe_ic_init() from platform-specific code makes it awkward to allow building the QE drivers for ARM. It's also a needless duplication of code, and slightly error-prone: Instead of the caller needing to know the details of whether the QUICC Engine High and QUICC Engine Low are actually the same interrupt (see e.g. the machine_is() in mpc85xx_mds_qeic_init), just let the init function choose the appropriate handlers after it has parsed the DT and figured it out. If the two interrupts are distinct, use separate handlers, otherwise use the handler which first checks the CHIVEC register (for the high priority interrupts), then the CIVEC. All existing callers pass 0 for flags, so continue to do that from the new single caller. Later cleanups will remove that argument from qe_ic_init and simplify the body, as well as make qe_ic_init into a proper init function for an IRQCHIP_DECLARE, eliminating the need to manually look up the fsl,qe-ic node. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: remove pointless sysfs registration in qe_ic.cRasmus Villemoes2019-12-091-31/+0
| | | | | | | | | | There's no point in registering with sysfs when that doesn't actually allow any interaction with the device or driver (no uevents, no sysfs files that provide information or allow configuration, no nothing). Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: drop assign-only high_active in qe_ic_initRasmus Villemoes2019-12-091-4/+2
| | | | | | | | high_active is only assigned to but never used. Remove it. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: drop unneeded #includesRasmus Villemoes2019-12-092-7/+0
| | | | | | | | | | These includes are not actually needed, and asm/rheap.h and sysdev/fsl_soc.h are PPC-specific, hence prevent compiling QE for other architectures. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: qe.c: guard use of pvr_version_is() with CONFIG_PPC32Rasmus Villemoes2019-12-091-1/+9
| | | | | | | | | | | | | | | | | | | | Commit e5c5c8d23fef (soc/fsl/qe: only apply QE_General4 workaround on affected SoCs) introduced use of pvr_version_is(), saying The QE_General4 workaround is only valid for the MPC832x and MPC836x SoCs. The other SoCs that embed a QUICC engine are not affected by this hardware bug and thus can use the computed divisors (this was successfully tested on the T1040). I'm reading the above as saying that the errata does not apply to the ARM-based SOCs with QUICC engine. In any case, use of pvr_version_is() must be guarded by CONFIG_PPC32 before we can remove the PPC32 dependency from CONFIG_QUICC_ENGINE, so introduce qe_general4_errata() to keep the necessary #ifdeffery localized to a trivial helper. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: replace spin_event_timeout by readx_poll_timeout_atomicRasmus Villemoes2019-12-091-6/+7
| | | | | | | | | | In preparation for allowing QE to be built for architectures other than ppc, use the generic readx_poll_timeout_atomic() helper from iopoll.h rather than the ppc-only spin_event_timeout(). Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: avoid ppc-specific io accessorsRasmus Villemoes2019-12-099-123/+129
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In preparation for allowing to build QE support for architectures other than PPC, replace the ppc-specific io accessors by the qe_io* macros. Done via $ spatch --sp-file io.cocci --in-place drivers/soc/fsl/qe/ where io.cocci is @@ expression addr, val; @@ - out_be32(addr, val) + qe_iowrite32be(val, addr) @@ expression addr; @@ - in_be32(addr) + qe_ioread32be(addr) @@ expression addr, val; @@ - out_be16(addr, val) + qe_iowrite16be(val, addr) @@ expression addr; @@ - in_be16(addr) + qe_ioread16be(addr) @@ expression addr, val; @@ - out_8(addr, val) + qe_iowrite8(val, addr) @@ expression addr; @@ - in_8(addr) + qe_ioread8(addr) @@ expression addr, clr, set; @@ - clrsetbits_be32(addr, clr, set) + qe_clrsetbits_be32(addr, clr, set) @@ expression addr, clr, set; @@ - clrsetbits_be16(addr, clr, set) + qe_clrsetbits_be16(addr, clr, set) @@ expression addr, clr, set; @@ - clrsetbits_8(addr, clr, set) + qe_clrsetbits_8(addr, clr, set) @@ expression addr, set; @@ - setbits32(addr, set) + qe_setbits_be32(addr, set) @@ expression addr, set; @@ - setbits16(addr, set) + qe_setbits_be16(addr, set) @@ expression addr, set; @@ - setbits8(addr, set) + qe_setbits_8(addr, set) @@ expression addr, clr; @@ - clrbits32(addr, clr) + qe_clrbits_be32(addr, clr) @@ expression addr, clr; @@ - clrbits16(addr, clr) + qe_clrbits_be16(addr, clr) @@ expression addr, clr; @@ - clrbits8(addr, clr) + qe_clrbits_8(addr, clr) Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: rename qe_(clr/set/clrset)bit* helpersRasmus Villemoes2019-12-091-5/+5
| | | | | | | | | | Make it clear that these operate on big-endian registers (i.e. use the iowrite*be primitives) before we introduce more uses of them and allow the QE drivers to be built for platforms other than ppc32. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: drop volatile qualifier of struct qe_ic::regsRasmus Villemoes2019-12-092-3/+3
| | | | | | | | | | | The actual io accessors (e.g. in_be32) implicitly add a volatile qualifier to their address argument. Remove volatile from the struct definition and the qe_ic_(read/write) helpers, in preparation for switching from the ppc-specific io accessors to generic ones. Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* soc: fsl: qe: remove space-before-tabRasmus Villemoes2019-12-091-2/+2
| | | | | | Reviewed-by: Timur Tabi <timur@kernel.org> Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2019-12-053-0/+162
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Olof Johansson: "Various driver updates for platforms: - A larger set of work on Tegra 2/3 around memory controller and regulator features, some fuse cleanups, etc.. - MMP platform drivers, in particular for USB PHY, and other smaller additions. - Samsung Exynos 5422 driver for DMC (dynamic memory configuration), and ASV (adaptive voltage), allowing the platform to run at more optimal operating points. - Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas - Clock/reset control driver for TI/OMAP - Meson-A1 reset controller support - Qualcomm sdm845 and sda845 SoC IDs for socinfo" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits) firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT soc: fsl: add RCPM driver dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition memory: tegra: Consolidate registers definition into common header memory: tegra: Ensure timing control debug features are disabled memory: tegra: Introduce Tegra30 EMC driver memory: tegra: Do not handle error from wait_for_completion_timeout() memory: tegra: Increase handshake timeout on Tegra20 memory: tegra: Print a brief info message about EMC timings memory: tegra: Pre-configure debug register on Tegra20 memory: tegra: Include io.h instead of iopoll.h memory: tegra: Adapt for Tegra20 clock driver changes memory: tegra: Don't set EMC rate to maximum on probe for Tegra20 memory: tegra: Add gr2d and gr3d to DRM IOMMU group memory: tegra: Set DMA mask based on supported address bits soc: at91: Add Atmel SFR SN (Serial Number) support memory: atmel-ebi: switch to SPDX license identifiers memory: atmel-ebi: move NUM_CS definition inside EBI driver soc: mediatek: Refactor bus protection control soc: mediatek: Refactor sram control ...
| * soc: fsl: add RCPM driverRan Wang2019-11-123-0/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The NXP's QorIQ processors based on ARM Core have RCPM module (Run Control and Power Management), which performs system level tasks associated with power management such as wakeup source control. Note that this driver will not support PowerPC based QorIQ processors, and it depends on PM wakeup source framework which provide collect wake information. Signed-off-by: Ran Wang <ran.wang_1@nxp.com> Reviewed-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* | dpaa_eth: register a device link for the qman portal usedMadalin Bucur2019-10-311-6/+0
| | | | | | | | | | | | | | | | | | | | | | Before this change, unbinding the QMan portals did not trigger a corresponding unbinding of the dpaa_eth making use of it; the first QMan portal related operation issued afterwards crashed the kernel. The device link ensures the dpaa_eth dependency upon the qman portal used is honoured at the QMan portal removal. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | soc: fsl: qbman: allow registering a device link for the portal userMadalin Bucur2019-10-311-0/+13
|/ | | | | | | | Introduce the API required to make sure that the devices that use the QMan portal are unbound when the portal is unbound. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2019-09-1613-168/+329
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC driver updates from Arnd Bergmann: "This contains driver changes that are tightly connected to SoC specific code. Aside from smaller cleanups and bug fixes, here is a list of the notable changes. New device drivers: - The Turris Mox router has a new "moxtet" bus driver for its on-board pluggable extension bus. The same platform also gains a firmware driver. - The Samsung Exynos family gains a new Chipid driver exporting using the soc device sysfs interface - A similar socinfo driver for Qualcomm Snapdragon chips. - A firmware driver for the NXP i.MX DSP IPC protocol using shared memory and a mailbox Other changes: - The i.MX reset controller driver now supports the NXP i.MX8MM chip - Amlogic SoC specific drivers gain support for the S905X3 and A311D chips - A rework of the TI Davinci framebuffer driver to allow important cleanups in the platform code - A couple of device drivers for removed ARM SoC platforms are removed. Most of the removals were picked up by other maintainers, this contains whatever was left" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (123 commits) bus: uniphier-system-bus: use devm_platform_ioremap_resource() soc: ti: ti_sci_pm_domains: Add support for exclusive and shared access dt-bindings: ti_sci_pm_domains: Add support for exclusive and shared access firmware: ti_sci: Allow for device shared and exclusive requests bus: imx-weim: remove incorrect __init annotations fbdev: remove w90x900/nuc900 platform drivers spi: remove w90x900 driver net: remove w90p910-ether driver net: remove ks8695 driver firmware: turris-mox-rwtm: Add sysfs documentation firmware: Add Turris Mox rWTM firmware driver dt-bindings: firmware: Document cznic,turris-mox-rwtm binding bus: moxtet: fix unsigned comparison to less than zero bus: moxtet: remove set but not used variable 'dummy' ARM: scoop: Use the right include dt-bindings: power: add Amlogic Everything-Else power domains bindings soc: amlogic: Add support for Everything-Else power domains controller fbdev: da8xx: use resource management for dma fbdev: da8xx-fb: drop a redundant if fbdev: da8xx-fb: use devm_platform_ioremap_resource() ...
| * soc: fsl: dpio: remove explicit device_link_removeIoana Ciornei2019-08-151-2/+0
| | | | | | | | | | | | | | | | | | | | Starting with commit 72175d4ea4c4 ("driver core: Make driver core own stateful device links") stateful device links are owned by the driver core and should not be explicitly removed on device unbind. Delete all device_link_remove appearances from the dpio driver. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc: fsl: guts: Add definition for LS1028AYinbo Zhu2019-08-151-0/+6
| | | | | | | | | | | | | | | | Adding compatible string "ls1028a-dcfg" to initialize guts driver for ls1028 and SoC die attribute definition for LS1028A Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc/fsl/qbman: Update device tree with reserved memoryRoy Pledge2019-08-151-24/+36
| | | | | | | | | | | | | | | | | | | | | | When using the reserved memory node in the device tree there are two options - dynamic or static. If a dynamic allocation was selected (where the kernel selects the address for the allocation) convert it to a static allocation by inserting the reg property. This will ensure the same memory is reused after a kexec() Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc/fsl/qbman: Fixup qman_shutdown_fq()Roy Pledge2019-08-151-11/+42
| | | | | | | | | | | | | | | | | | When shutting down a FQ on a dedicated channel only the SW portal associated with that channel can dequeue from it. Make sure the correct portal is use. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc/fsl/qbman: Disable interrupts during portal recoveryRoy Pledge2019-08-153-3/+21
| | | | | | | | | | | | | | Disable the QBMan interrupts during recovery. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc/fsl/qbman: Fix drain_mr_fqni()Roy Pledge2019-08-151-1/+3
| | | | | | | | | | | | | | | | | | The drain_mr_fqni() function may be called fron uninterruptable context so convert the msleep() to an mdelay(). Also ensure that the valid bit is updated while polling. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc/fsl/qbman: Cleanup QMan queues if device was already initializedRoy Pledge2019-08-154-4/+38
| | | | | | | | | | | | | | | | | | | | If the QMan device was previously initialized make sure all the frame queues are out of service once all the portals are probed. This handles the case where the kernel is restarted without the SoC being reset (kexec for example) Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc/fsl/qbman: Cleanup buffer pools if BMan was initialized prior to bootupRoy Pledge2019-08-154-9/+41
| | | | | | | | | | | | | | | | | | Clean the BMan buffer pools if the device had been initialized previously. This will ensure a consistent state if the kernel was soft restarted (kexec for example) Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc/fsl/qbman: Rework QBMan private memory setupRoy Pledge2019-08-153-11/+76
| | | | | | | | | | | | | | | | | | | | | | Rework QBMan private memory setup so that the areas are not zeroed if the device was previously initialized If the QMan private memory was already initialized skip the PFDR initialization. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc: fsl: qbman: Remove dev_err() usage after platform_get_irq()Stephen Boyd2019-08-152-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Thierry Reding <treding@nvidia.com> Cc: Li Yang <leoyang.li@nxp.com> Cc: Simon Horman <horms+renesas@verge.net.au> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * Merge tag 'soc-fsl-next-v5.3-2' of ↵Olof Johansson2019-07-212-99/+66
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers NXP/FSL SoC driver updates for v5.3 (take 2) DPAA2 Console driver - Add driver to export two char devices to dump logs for MC and AIOP DPAA2 DPIO driver - Add support for memory backed QBMan portals - Increase the timeout period to prevent false error - Add APIs to retrieve QBMan portal probing status DPAA Qman driver - Only make liodn fixup on powerpc SoCs with PAMU iommu QUICC Engine - Add support for importing qe-snums through device tree - Some cleanups and foot print optimzation * tag 'soc-fsl-next-v5.3-2' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: qe: fold qe_get_num_of_snums into qe_snums_init soc: fsl: qe: support fsl,qe-snums property dt-bindings: soc: fsl: qe: document new fsl,qe-snums binding soc: fsl: qe: introduce qe_get_device_node helper soc: fsl: qe: reduce static memory footprint by 1.7K soc: fsl: qe: drop useless static qualifier soc: fsl: fix spelling mistake "Firmaware" -> "Firmware" Link: https://lore.kernel.org/r/20190605194511.12127-1-leoyang.li@nxp.com Signed-off-by: Olof Johansson <olof@lixom.net>
| | * soc: fsl: qe: fold qe_get_num_of_snums into qe_snums_initRasmus Villemoes2019-06-051-30/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment "No QE ever has fewer than 28 SNUMs" is false; e.g. the MPC8309 has 14. The code path returning -EINVAL is also a recipe for instant disaster, since the caller (qe_snums_init) uncritically assigns the return value to the unsigned qe_num_of_snum, and would thus proceed to attempt to copy 4GB from snum_init_46[] to the snum[] array. So fold the handling of the legacy fsl,qe-num-snums into qe_snums_init, and make sure we do not end up using the snum_init_46 array in cases other than the two where we know it makes sense. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qe: support fsl,qe-snums propertyRasmus Villemoes2019-06-051-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver support for the newly introduced fsl,qe-snums property. Conveniently, of_property_read_variable_u8_array does exactly what we need: If the property fsl,qe-snums is found (and has an allowed size), the array of values get copied to snums, and the return value is the number of snums - we cannot assign directly to num_of_snums, since we need to check whether the return value is negative. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qe: introduce qe_get_device_node helperRasmus Villemoes2019-06-051-42/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'try of_find_compatible_node(NULL, NULL, "fsl,qe"), fall back to of_find_node_by_type(NULL, "qe")' pattern is repeated five times. Factor it into a common helper. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qe: reduce static memory footprint by 1.7KRasmus Villemoes2019-06-051-30/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current array of struct qe_snum use 256*4 bytes for just keeping track of the free/used state of each index, and the struct layout means there's another 768 bytes of padding. If we just unzip that structure, the array of snum values just use 256 bytes, while the free/inuse state can be tracked in a 32 byte bitmap. So this reduces the .data footprint by 1760 bytes. It also serves as preparation for introducing another DT binding for specifying the snum values. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: qe: drop useless static qualifierRasmus Villemoes2019-06-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The local variable snum_init has no reason to have static storage duration. Reviewed-by: Christophe Leroy <christophe.leroy@c-s.fr> Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * soc: fsl: fix spelling mistake "Firmaware" -> "Firmware"Colin Ian King2019-05-291-1/+1
| | | | | | | | | | | | | | | | | | | | | There is a spelling mistake in a pr_err message. Fix it. Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
* | | Merge branch 'pdf_fixes_v1' of https://git.linuxtv.org/mchehab/experimental ↵Jonathan Corbet2019-07-221-1/+1
|\ \ \ | |/ / |/| | | | | | | | | | | into mauro Bring in a set of post-thrashup fixes from Mauro.
| * | docs: powerpc: convert docs to ReST and rename to *.rstMauro Carvalho Chehab2019-07-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert docs to ReST and add them to the arch-specific book. The conversion here was trivial, as almost every file there was already using an elegant format close to ReST standard. The changes were mostly to mark literal blocks and add a few missing section title identifiers. One note with regards to "--": on Sphinx, this can't be used to identify a list, as it will format it badly. This can be used, however, to identify a long hyphen - and "---" is an even longer one. At its new index.rst, let's add a :orphan: while this is not linked to the main index.rst file, in order to avoid build warnings. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Acked-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> # cxl
* | | Merge tag 'soc-fsl-next-v5.3' of ↵Olof Johansson2019-06-1711-44/+534
|\ \ \ | |/ / |/| / | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into arm/drivers NXP/FSL SoC driver updates for v5.3 DPAA2 Console driver - Add driver to export two char devices to dump logs for MC and AIOP DPAA2 DPIO driver - Add support for memory backed QBMan portals - Increase the timeout period to prevent false error - Add APIs to retrieve QBMan portal probing status DPAA Qman driver - Only make liodn fixup on powerpc SoCs with PAMU iommu * tag 'soc-fsl-next-v5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc: fsl: qbman_portals: add APIs to retrieve the probing status soc: fsl: qman: fixup liodns only on ppc targets soc: fsl: dpio: Add support for memory backed QBMan portals bus: mc-bus: Add support for mapping shareable portals soc: fsl: dpio: Increase timeout for QBMan Management Commands soc: fsl: add DPAA2 console support Documentation: DT: Add entry for DPAA2 console soc: fsl: guts: Add definition for LX2160A Signed-off-by: Olof Johansson <olof@lixom.net>
| * soc: fsl: qbman_portals: add APIs to retrieve the probing statusLaurentiu Tudor2019-05-202-8/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a couple of new APIs to check the probing status of the required cpu bound qman and bman portals: 'int bman_portals_probed()' and 'int qman_portals_probed()'. They return the following values. * 1 if qman/bman portals were all probed correctly * 0 if qman/bman portals were not yet probed * -1 if probing of qman/bman portals failed Portals are considered successful probed if no error occurred during the probing of any of the portals and if enough portals were probed to have one available for each cpu. The error handling paths were slightly rearranged in order to fit this new functionality without being too intrusive. Drivers that use qman/bman portal driver services are required to use these APIs before calling any functions exported by these drivers or otherwise they will crash the kernel. First user will be the dpaa1 ethernet driver, coming in a subsequent patch. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc: fsl: qman: fixup liodns only on ppc targetsLaurentiu Tudor2019-05-202-2/+9
| | | | | | | | | | | | | | | | | | ARM SoCs use SMMU so the liodn fixup done in the qman driver is no longer making sense and it also breaks the ICID settings inherited from u-boot. Do the fixups only for PPC targets. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc: fsl: dpio: Add support for memory backed QBMan portalsRoy Pledge2019-05-203-32/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | NXP devices with QBMan version 5 and above can enable software portals that are memory backed. This allows the portal to be mapped as cacheable/sharable (same as all normal memory) so that portals can freely migrate between cores and clusters in the SoC. The driver will enable this mode by default when appropriate HW support is detected. Signed-off-by: Youri Querry <youri.querry_1@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc: fsl: dpio: Increase timeout for QBMan Management CommandsYouri Querry2019-05-201-2/+2
| | | | | | | | | | | | | | | | | | | | The timeout for QBMan Management Commands can falsely trigger on a busy system. This patch doubles the timeout to avoid the false error reports Signed-off-by: Youri Querry <youri.querry_1@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * soc: fsl: add DPAA2 console supportIoana Ciornei2019-05-203-0/+340
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DPAA2 MC and AIOP console log support. The platform driver probes on the "fsl,dpaa2-console" device tree node which describes the base firmware address needed in order to infer the start address of both firmware logs: MC and AIOP. It then exports two misc char devices which can be used to dump the needed logs. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-04-13 16:17:50 +0000