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* soc: dove: Let genpd deal with disabling of unused PM domainsUlf Hansson2015-10-121-1/+0
| | | | | | | | | Genpd tries from a late_initcall to disable unused PM domains, which makes it unnecessary to also manage this from any earlier phase when for example initializing a genpd. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* genirq: Remove irq argument from irq flow handlersThomas Gleixner2015-09-161-2/+2
| | | | | | | | | | | | | | Most interrupt flow handlers do not use the irq argument. Those few which use it can retrieve the irq number from the irq descriptor. Remove the argument. Search and replace was done with coccinelle and some extra helper scripts around it. Thanks to Julia for her help! Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
* soc: dove: Prepare irq handler for irq argument removalThomas Gleixner2015-09-141-1/+1
| | | | | | | | | | | | | | The irq argument of most interrupt flow handlers is unused or merily used instead of a local variable. The handlers which need the irq argument can retrieve the irq number from the irq descriptor. Search and update was done with coccinelle and the invaluable help of Julia Lawall. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
* soc: dove: Use irq_desc_get_xxx() to avoid redundant lookup of irq_descThomas Gleixner2015-09-141-1/+1
| | | | | | | | Search and replace done with coccinelle Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Julia Lawall <Julia.Lawall@lip6.fr> Cc: Jiang Liu <jiang.liu@linux.intel.com>
* Merge tag 'armsoc-late' of ↵Linus Torvalds2015-09-102-19/+21
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull late ARM SoC updates from Kevin Hilman: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. The bulk of the changes are for samsung/exynos SoCs for some changes that needed a few minor reworks so ended up a bit late. The others are mainly for qcom SoCs: a couple fixes and some DTS updates" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits) ARM: multi_v7_defconfig: Enable PBIAS regulator soc: qcom: smd: Correct fBLOCKREADINTR handling soc: qcom: smd: Use correct remote processor ID soc: qcom: smem: Fix errant private access ARM: dts: qcom: msm8974-sony-xperia-honami: Use stdout-path ARM: dts: qcom: msm8960-cdp: Use stdout-path ARM: dts: qcom: msm8660-surf: Use stdout-path ARM: dts: qcom: ipq8064-ap148: Use stdout-path ARM: dts: qcom: apq8084-mtp: Use stdout-path ARM: dts: qcom: apq8084-ifc6540: Use stdout-path ARM: dts: qcom: apq8074-dragonboard: Use stdout-path ARM: dts: qcom: apq8064-ifc6410: Use stdout-path ARM: dts: qcom: apq8064-cm-qs600: Use stdout-path ARM: dts: qcom: Label serial nodes for aliasing and stdout-path reset: ath79: Fix missing spin_lock_init reset: Add (devm_)reset_control_get stub functions ARM: EXYNOS: switch to using generic cpufreq driver for exynos4x12 cpufreq: exynos: Remove unselectable rule for arm-exynos-cpufreq.o ARM: dts: add iommu property to JPEG device for exynos4 ARM: dts: enable SPI1 for exynos4412-odroidu3 ...
| * soc: qcom: smd: Correct fBLOCKREADINTR handlingBjorn Andersson2015-09-091-3/+3
| | | | | | | | | | | | | | | | | | | | fBLOCKREADINTR is masking the notification from the remote and should hence be cleared while we're waiting the tx fifo to drain. Also change the reset state to mask the notification, as send is the only use case where we're interested in it. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * soc: qcom: smd: Use correct remote processor IDAndy Gross2015-09-091-4/+12
| | | | | | | | | | | | | | | | This patch fixes SMEM addressing issues when remote processors need to use secure SMEM partitions. Signed-off-by: Andy Gross <agross@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
| * soc: qcom: smem: Fix errant private accessAndy Gross2015-09-091-12/+6
| | | | | | | | | | | | | | | | This patch corrects private partition item access. Instead of falling back to global for instances where we have an actual host and remote partition existing, return the results of the private lookup. Signed-off-by: Andy Gross <agross@codeaurora.org>
* | Merge tag 'armsoc-drivers' of ↵Linus Torvalds2015-09-0122-448/+3616
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Olof Johansson: "Some releases this branch is nearly empty, others we have more stuff. It tends to gather drivers that need SoC modification or dependencies such that they have to (also) go in through our tree. For this release, we have merged in part of the reset controller tree (with handshake that the parts we have merged in will remain stable), as well as dependencies on a few clock branches. In general, new items here are: - Qualcomm driver for SMM/SMD, which is how they communicate with the coprocessors on (some) of their platforms - memory controller work for ARM's PL172 memory controller - reset drivers for various platforms - PMU power domain support for Marvell platforms - Tegra support for T132/T210 SoCs: PMC, fuse, memory controller per-SoC support" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits) ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze() ARM: tegra: Disable cpuidle if PSCI is available soc/tegra: pmc: Use existing pclk reference soc/tegra: pmc: Remove unnecessary return statement soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile memory: tegra: Add Tegra210 support memory: tegra: Add support for a variable-size client ID bitfield clk: shmobile: rz: Add CPG/MSTP Clock Domain support clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support clk: shmobile: Add CPG/MSTP Clock Domain support ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets reset: reset-zynq: Adding support for Xilinx Zynq reset controller. docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings. MIPS: ath79: Add the reset controller to the AR9132 dtsi reset: Add a driver for the reset controller on the AR71XX/AR9XXX devicetree: Add bindings for the ATH79 reset controller reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property doc: dt: add documentation for lpc1850-rgu reset driver ...
| * \ Merge tag 'tegra-for-4.3-soc' of ↵Olof Johansson2015-08-2014-448/+830
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers ARM: tegra: Core SoC changes for v4.3-rc1 This contains a bit more of Tegra210 support, which is shaping up pretty nicely. Other than that there are a couple of cleanup patches here, too. * tag 'tegra-for-4.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze() ARM: tegra: Disable cpuidle if PSCI is available soc/tegra: pmc: Use existing pclk reference soc/tegra: pmc: Remove unnecessary return statement soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile soc/tegra: fuse: Add spare bit offset for Tegra210 soc/tegra: fuse: Add spare bit offset for Tegra124 soc/tegra: fuse: Add spare bit offset for Tegra114 soc/tegra: fuse: Rename core_* to soc_* soc/tegra: fuse: Add Tegra210 support soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers soc/tegra: fuse: Restrict legacy code to 32-bit ARM soc/tegra: pmc: Add Tegra210 support soc/tegra: pmc: Restrict legacy code to 32-bit ARM soc/tegra: pmc: Avoid usage of uninitialized variable soc/tegra: Add Tegra210 support soc/tegra: Add Tegra132 support Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | soc/tegra: pmc: Use existing pclk referenceThierry Reding2015-08-131-9/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver requests the pclk clock at probe time already and stores its reference to it in struct tegra_pmc, so there is no need to look it up everytime it is needed. Use the existing reference instead. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: pmc: Remove unnecessary return statementThierry Reding2015-08-131-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Functions returning no value don't need an explicit return statement. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in MakefileMasahiro Yamada2015-08-131-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Kbuild descends into drivers/soc/tegra/ only when CONFIG_ARCH_TEGRA is enabled. (see drivers/soc/Makefile) $(CONFIG_ARCH_TEGRA) in drivers/soc/tegra/Makefile always evaluates to 'y'. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Add spare bit offset for Tegra210Thierry Reding2015-07-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The offset of the first spare bit register on Tegra210 is 0x380, but account for the fixed offset of 0x100 in the fuse accessor. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Add spare bit offset for Tegra124Thierry Reding2015-07-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The offset of the first spare bit register on Tegra124 is 0x300, but account for the fixed offset of 0x100 in the fuse accessor. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Add spare bit offset for Tegra114Thierry Reding2015-07-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The offset of the first spare bit register on Tegra114 is 0x280, but account for the fixed offset of 0x100 in the fuse accessor. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Rename core_* to soc_*Thierry Reding2015-07-167-44/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There's a mixture of core_* and soc_* prefixes for variables storing information related to the VDD_CORE rail. Choose one (soc_*) and use it more consistently. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Add Tegra210 supportThierry Reding2015-07-165-1/+212
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Tegra210 support to the fuses driver and add Tegra210-specific speedo definitions. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Unify Tegra20 and Tegra30 driversThierry Reding2015-07-1610-367/+413
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unifying the drivers makes it easier to restrict the legacy probing paths to 32-bit ARM. This in turn will come in handy as support for new 64-bit ARM SoCs is added. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: fuse: Restrict legacy code to 32-bit ARMThierry Reding2015-07-161-9/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For backwards-compatibility with old device trees, if no APBMISC node exists this driver hard-codes the I/O memory region. All 64-bit ARM device tree files are recent enough that they can be required to have this node, and therefore the legacy code path is not required. Based on work done by Paul Walmsley <pwalmsley@nvidia.com>. Cc: Paul Walmsley <pwalmsley@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: pmc: Add Tegra210 supportThierry Reding2015-07-161-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra210 uses a power management controller that is compatible with earlier SoC generations but adds a couple of power partitions for new hardware blocks. Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: pmc: Restrict legacy code to 32-bit ARMThierry Reding2015-07-161-15/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For backwards-compatibility with old device trees, if no PMC node exists this driver hard-codes the I/O memory region. All 64-bit ARM device tree files are recent enough that they can be required to have this node, and therefore the legacy code path is not required on 64-bit ARM. Based on work done by Paul Walmsley <pwalmsley@nvidia.com>. Cc: Paul Walmsley <pwalmsley@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: pmc: Avoid usage of uninitialized variableThierry Reding2015-07-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make sure to only drop the reference to the OF node after it's been successfully obtained. Fixes: 3568df3d31d6 ("soc: tegra: Add thermal reset (thermtrip) support to PMC") Cc: <stable@vger.kernel.org> # v4.0+ Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: Add Tegra210 supportThierry Reding2015-07-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add Tegra210 to the matching table for NVIDIA Tegra SoCs. Signed-off-by: Thierry Reding <treding@nvidia.com>
| | * | soc/tegra: Add Tegra132 supportThierry Reding2015-07-161-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Add Tegra132 to the matching table for NVIDIA Tegra SoCs. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | Merge tag 'qcom-soc-for-4.3' of git://codeaurora.org/quic/kernel/agross-msm ↵Olof Johansson2015-08-135-0/+2372
| |\ \ \ | | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into next/drivers Qualcomm ARM Based SoC Updates for 4.3 * Add SMEM driver * Add SMD driver * Add RPM over SMD driver * Select QCOM_SCM by default * tag 'qcom-soc-for-4.3' of git://codeaurora.org/quic/kernel/agross-msm: devicetree: soc: Add Qualcomm SMD based RPM DT binding soc: qcom: Driver for the Qualcomm RPM over SMD soc: qcom: Add Shared Memory Driver soc: qcom: Add device tree binding for Shared Memory Device drivers: qcom: Select QCOM_SCM unconditionally for QCOM_PM soc: qcom: Add Shared Memory Manager driver Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | soc: qcom: Driver for the Qualcomm RPM over SMDBjorn Andersson2015-07-293-0/+259
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Driver for the Resource Power Manager (RPM) found in Qualcomm 8974 based devices. The driver exposes resources that child drivers can operate on; to implementing regulator, clock and bus frequency drivers. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | soc: qcom: Add Shared Memory DriverBjorn Andersson2015-07-293-0/+1328
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the Qualcomm Shared Memory Driver (SMD) providing communication channels to remote processors, ontop of SMEM. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | drivers: qcom: Select QCOM_SCM unconditionally for QCOM_PMLina Iyer2015-07-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable QCOM_SCM for QCOM power management driver Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| | * | soc: qcom: Add Shared Memory Manager driverBjorn Andersson2015-07-283-0/+784
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | The Shared Memory Manager driver implements an interface for allocating and accessing items in the memory area shared among all of the processors in a Qualcomm platform. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Acked-by: Andy Gross <agross@codeaurora.org> Signed-off-by: Andy Gross <agross@codeaurora.org>
| * / ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resetsRussell King2015-08-053-0/+414
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PMU device contains an interrupt controller, power control and resets. The interrupt controller is a little sub-standard in that there is no race free way to clear down pending interrupts, so we try to avoid problems by reducing the window as much as possible, and clearing as infrequently as possible. The interrupt support is implemented using an IRQ domain, and the parent interrupt referenced in the standard DT way. The power domains and reset support is closely related - there is a defined sequence for powering down a domain which is tightly coupled with asserting the reset. Hence, it makes sense to group these two together, and in order to avoid any locking contention disrupting this sequence, we avoid the use of syscon or regmap. This patch adds the core PMU driver: power domains must be defined in the DT file in order to make use of them. The reset controller can be referenced in the standard way for reset controllers. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
* | soc: mediatek: Fix SCPSYS compilationMatthias Brugger2015-08-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | SCPSYS driver misses the module.h include which makes it fail when compiling with allmodconf. This patch fixes this. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
* | soc: mediatek: Drop owner assignment from platform_driverKrzysztof Kozlowski2015-07-101-1/+0
| | | | | | | | | | | | | | | | | | platform_driver does not need to set an owner because platform_driver_register() will set it. Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: Mediatek: Add SCPSYS power domain driverSascha Hauer2015-07-063-0/+498
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a power domain driver for the Mediatek SCPSYS unit. The System Control Processor System (SCPSYS) has several power management related tasks in the system. The tasks include thermal measurement, dynamic voltage frequency scaling (DVFS), interrupt filter and lowlevel sleep control. The System Power Manager (SPM) inside the SCPSYS is for the MTCMOS power domain control. For now this driver only adds power domain support, the more advanced features are not yet supported. The driver implements the generic PM domain device tree bindings, the first user will most likely be the Mediatek AFE audio driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* | soc: mediatek: Add infracfg misc driver supportSascha Hauer2015-07-063-0/+101
|/ | | | | | | | | | | This adds support for some miscellaneous bits of the infracfg controller. The mtk_infracfg_set/clear_bus_protection functions are necessary for the scpsys power domain driver to handle the bus protection bits which are contained in the infacfg register space. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
* Merge tag 'armsoc-late' of ↵Linus Torvalds2015-07-021-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC late fixes and dependencies from Kevin Hilman: "This is a collection of a few late fixes and other misc stuff that had dependencies on things being merged from other trees. Other than the fixes, the primary feature being added is the conversion of some OMAP drivers to the new generic wakeirq interface" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: multi_v7_defconfig: Enable BRCMNAND driver ARM: BCM: Do not select CONFIG_MTD_NAND_BRCMNAND ARM: at91/dt: update udc compatible strings ARM: at91/dt: trivial: fix USB udc compatible string arm64: dts: Add APM X-Gene standby GPIO controller DTS entries soc: qcom: spm: Fix idle on THUMB2 kernels ARM: dove: fix legacy dove IRQ numbers ARM: mvebu: fix suspend to RAM on big-endian configurations ARM: mvebu: adjust Armada XP DT spi muxing after pinctrl function rename serial: 8250_omap: Move wake-up interrupt to generic wakeirq serial: omap: Switch wake-up interrupt to generic wakeirq mmc: omap_hsmmc: Change wake-up interrupt to use generic wakeirq
| * soc: qcom: spm: Fix idle on THUMB2 kernelsStephen Boyd2015-07-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ifc6410 firmware always enters the kernel in ARM state from deep idle. Use the cpu_resume_arm() wrapper instead of cpu_resume() to property switch into the THUMB2 state when we wake up from idle. This fixes a problem reported by Kevin Hilman on next-20150601 where the ifc6410 fails to boot a THUMB2 kernel because the platform's firmware always enters the kernel in ARM mode from deep idle states. Reported-by: Kevin Hilman <khilman@linaro.org> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Lina Iyer <lina.iyer@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kevin Hilman <khilman@linaro.org>
| * Merge tag 'armsoc-drivers' into test-mergeKevin Hilman2015-06-249-0/+711
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM: SoC: driver updates for v4.2 Some of these are for drivers/soc, where we're now putting SoC-specific drivers these days. Some are for other driver subsystems where we have received acks from the appropriate maintainers. Some highlights: - simple-mfd: document DT bindings and misc updates - migrate mach-berlin to simple-mfd for clock, pinctrl and reset - memory: support for Tegra132 SoC - memory: introduce tegra EMC driver for scaling memory frequency - misc. updates for ARM CCI and CCN busses Conflicts: arch/arm64/boot/dts/arm/juno-motherboard.dtsi Trivial add/add conflict with our dt branch. Resolution: take both sides. # gpg: Signature made Wed Jun 24 21:32:17 2015 PDT using RSA key ID D3FBC665 # gpg: Good signature from "Kevin Hilman <khilman@deeprootsystems.com>" # gpg: aka "Kevin Hilman <khilman@linaro.org>" # gpg: aka "Kevin Hilman <khilman@kernel.org>" # Conflicts: # arch/arm64/boot/dts/arm/juno-motherboard.dtsi
| * \ Merge tag 'armsoc-soc' into test-mergeKevin Hilman2015-06-242-8/+21
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM: SoC: platform support for v4.2 Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC Conflicts: arch/arm/mach-socfpga/core.h Trivial remove/remove conflict with our cleanup branch. Resolution: remove both sides # gpg: Signature made Wed Jun 24 21:32:12 2015 PDT using RSA key ID D3FBC665 # gpg: Good signature from "Kevin Hilman <khilman@deeprootsystems.com>" # gpg: aka "Kevin Hilman <khilman@linaro.org>" # gpg: aka "Kevin Hilman <khilman@kernel.org>" # Conflicts: # arch/arm/mach-socfpga/core.h
* | \ \ Merge tag 'module-builtin_driver-v4.1-rc8' of ↵Linus Torvalds2015-07-022-2/+2
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux Pull module_platform_driver replacement from Paul Gortmaker: "Replace module_platform_driver with builtin_platform driver in non modules. We see an increasing number of non-modular drivers using modular_driver() type register functions. There are several downsides to letting this continue unchecked: - The code can appear modular to a reader of the code, and they won't know if the code really is modular without checking the Makefile and Kconfig to see if compilation is governed by a bool or tristate. - Coders of drivers may be tempted to code up an __exit function that is never used, just in order to satisfy the required three args of the modular registration function. - Non-modular code ends up including the <module.h> which increases CPP overhead that they don't need. - It hinders us from performing better separation of the module init code and the generic init code. So here we introduce similar macros for builtin drivers. Then we convert builtin drivers (controlled by a bool Kconfig) by making the following type of mapping: module_platform_driver() ---> builtin_platform_driver() module_platform_driver_probe() ---> builtin_platform_driver_probe(). The set of drivers that are converted here are just the ones that showed up as relying on an implicit include of <module.h> during a pending header cleanup. So we convert them here vs adding an include of <module.h> to non-modular code to avoid compile fails. Additonal conversions can be done asynchronously at any time. Once again, an unused module_exit function that is removed here appears in the diffstat as an outlier wrt all the other changes" * tag 'module-builtin_driver-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux: drivers/clk: convert sunxi/clk-mod0.c to use builtin_platform_driver drivers/power: Convert non-modular syscon-reboot to use builtin_platform_driver drivers/soc: Convert non-modular soc-realview to use builtin_platform_driver drivers/soc: Convert non-modular tegra/pmc to use builtin_platform_driver drivers/cpufreq: Convert non-modular s5pv210-cpufreq.c to use builtin_platform_driver drivers/cpuidle: Convert non-modular drivers to use builtin_platform_driver drivers/platform: Convert non-modular pdev_bus to use builtin_platform_driver platform_device: better support builtin boilerplate avoidance
| * | | | drivers/soc: Convert non-modular soc-realview to use builtin_platform_driverPaul Gortmaker2015-06-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This file depends on Kconfig SOC_REALVIEW which is a bool, so we use the appropriate registration function, which avoids us relying on an implicit inclusion of <module.h> which we are doing currently. While this currently works, we really don't want to be including the module.h header in non-modular code, which we'd be forced to do, pending some upcoming code relocation from init.h into module.h. So we fix it now by using the non-modular equivalent. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: Axel Lin <axel.lin@ingics.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
| * | | | drivers/soc: Convert non-modular tegra/pmc to use builtin_platform_driverPaul Gortmaker2015-06-161-1/+1
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This file depends on Kconfig ARCH_TEGRA which is a bool, so we use the appropriate registration function, which avoids us relying on an implicit inclusion of <module.h> which we are doing currently. While this currently works, we really don't want to be including the module.h header in non-modular code, which we'd be forced to do, pending some upcoming code relocation from init.h into module.h. So we fix it now by using the non-modular equivalent. Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: linux-tegra@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
* | | | Merge tag 'armsoc-drivers' of ↵Linus Torvalds2015-06-269-0/+711
|\ \ \ \ | | |_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Kevin Hilman: "Some of these are for drivers/soc, where we're now putting SoC-specific drivers these days. Some are for other driver subsystems where we have received acks from the appropriate maintainers. Some highlights: - simple-mfd: document DT bindings and misc updates - migrate mach-berlin to simple-mfd for clock, pinctrl and reset - memory: support for Tegra132 SoC - memory: introduce tegra EMC driver for scaling memory frequency - misc. updates for ARM CCI and CCN busses" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits) drivers: soc: sunxi: Introduce SoC driver to map SRAMs arm-cci: Add aliases for PMU events arm-cci: Add CCI-500 PMU support arm-cci: Sanitise CCI400 PMU driver specific code arm-cci: Abstract handling for CCI events arm-cci: Abstract out the PMU counter details arm-cci: Cleanup PMU driver code arm-cci: Do not enable CCI-400 PMU by default firmware: qcom: scm: Add HDCP Support ARM: berlin: add an ADC node for the BG2Q ARM: berlin: remove useless chip and system ctrl compatibles clk: berlin: drop direct of_iomap of nodes reg property ARM: berlin: move BG2Q clock node ARM: berlin: move BG2CD clock node ARM: berlin: move BG2 clock node clk: berlin: prepare simple-mfd conversion pinctrl: berlin: drop SoC stub provided regmap ARM: berlin: move pinctrl to simple-mfd nodes pinctrl: berlin: prepare to use regmap provided by syscon reset: berlin: drop arch_initcall initialization ...
| * | | drivers: soc: sunxi: Introduce SoC driver to map SRAMsMaxime Ripard2015-06-015-0/+297
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner SoCs have a handful of SRAM that can be either mapped to be accessible by devices or the CPU. That mapping is controlled by an SRAM controller, and that mapping might not be set by the bootloader, for example if the device wasn't used at all, or if we're using solutions like the U-Boot's Falcon Boot. We could also imagine changing this at runtime for example to change the mapping of these SRAMs to use them for suspend/resume or runtime memory rate change, if that ever happens. These use cases require some API in the kernel to control that mapping, exported through a drivers/soc driver. This driver also implement a debugfs file that shows the SRAM found in the system, the current mapping and the SRAM that have been claimed by some drivers in the kernel. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Tested-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * | | Merge tag 'qcom-soc-for-4.2-1' of ↵Arnd Bergmann2015-05-293-0/+393
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/drivers Merge "Qualcomm ARM Based SoC Updates for v4.2-1" from Kumar Gala: * Added Subsystem Power Manager (SPM) driver * Split out 32-bit specific SCM code * Added HDCP SCM call * tag 'qcom-soc-for-4.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom: firmware: qcom: scm: Add HDCP Support firmware: qcom: scm: Split out 32-bit specific SCM code ARM: qcom: Add Subsystem Power Manager (SPM) driver
| | * | | ARM: qcom: Add Subsystem Power Manager (SPM) driverLina Iyer2015-04-273-0/+393
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPM is a hardware block that controls the peripheral logic surrounding the application cores (cpu/l$). When the core executes WFI instruction, the SPM takes over the putting the core in low power state as configured. The wake up for the SPM is an interrupt at the GIC, which then completes the rest of low power mode sequence and brings the core out of low power mode. The SPM has a set of control registers that configure the SPMs individually based on the type of the core and the runtime conditions. SPM is a finite state machine block to which a sequence is provided and it interprets the bytes and executes them in sequence. Each low power mode that the core can enter into is provided to the SPM as a sequence. Configure the SPM to set the core (cpu or L2) into its low power mode, the index of the first command in the sequence is set in the SPM_CTL register. When the core executes ARM wfi instruction, it triggers the SPM state machine to start executing from that index. The SPM state machine waits until the interrupt occurs and starts executing the rest of the sequence until it hits the end of the sequence. The end of the sequence jumps the core out of its low power mode. Add support for an idle driver to set up the SPM to place the core in Standby or Standalone power collapse mode when the core is idle. Based on work by: Mahesh Sivasubramanian <msivasub@codeaurora.org>, Ai Li <ali@codeaurora.org>, Praveen Chidambaram <pchidamb@codeaurora.org> Original tree available at - git://codeaurora.org/quic/la/kernel/msm-3.10.git Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Kevin Hilman <khilman@linaro.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Lina Iyer <lina.iyer@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Tested-by: Kevin Hilman <khilman@linaro.org> Acked-by: Kumar Gala <galak@codeaurora.org> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
| * | | | Merge tag 'v4.1-next-soc' of https://github.com/mbgg/linux-mediatek into ↵Arnd Bergmann2015-05-292-45/+10
| |\ \ \ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/drivers Merge "ARM: mediatek: soc updates for v4.2" from Matthias Brugger: - pmic wrapper: fix clock handling - pmic wrapper: fix state machine - pmic wrapper: fix compile dependency * tag 'v4.1-next-soc' of https://github.com/mbgg/linux-mediatek: soc: mediatek: Add compile dependency to pmic-wrapper soc: mediatek: PMIC wrap: Fix register state machine handling soc: mediatek: PMIC wrap: Fix clock rate handling
| * | | | soc/tegra: fuse: Add RAM code reader helperMikko Perttunen2015-05-041-0/+21
| | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Needed for the EMC and MC drivers to know what timings from the DT to use. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
* | | | Merge tag 'armsoc-soc' of ↵Linus Torvalds2015-06-262-8/+21
|\ \ \ \ | |_|/ / |/| | / | | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform support updates from Kevin Hilman: "Our SoC branch usually contains expanded support for new SoCs and other core platform code. Some highlights from this round: - sunxi: SMP support for A23 SoC - socpga: big-endian support - pxa: conversion to common clock framework - bcm: SMP support for BCM63138 - imx: support new I.MX7D SoC - zte: basic support for ZX296702 SoC" * tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits) ARM: zx: Add basic defconfig support for ZX296702 ARM: dts: zx: add an initial zx296702 dts and doc clk: zx: add clock support to zx296702 dt-bindings: Add #defines for ZTE ZX296702 clocks ARM: socfpga: fix build error due to secondary_startup MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS ARM: ep93xx: simone: support for SPI-based MMC/SD cards MAINTAINERS: update Shawn's email to use kernel.org one ARM: socfpga: support suspend to ram ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10 ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5 ARM: EXYNOS: register power domain driver from core_initcall ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs ARM: SAMSUNG: Constify platform_device_id ARM: EXYNOS: Constify irq_domain_ops ARM: EXYNOS: add coupled cpuidle support for Exynos3250 ARM: EXYNOS: add exynos_get_boot_addr() helper ARM: EXYNOS: add exynos_set_boot_addr() helper ARM: EXYNOS: make exynos_core_restart() less verbose ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout ...
| * | soc/tegra: pmc: move to using a restart handlerDavid Riley2015-05-041-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pmc driver was previously exporting tegra_pmc_restart, which was assigned to machine_desc.init_machine, taking precedence over the restart handlers registered through register_restart_handler(). Signed-off-by: David Riley <davidriley@chromium.org> [tomeu.vizoso@collabora.com: Rebased] Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> [treding@nvidia.com: minor cleanups] Signed-off-by: Thierry Reding <treding@nvidia.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-10 00:31:17 +0000