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| * | | | soc/tegra: fuse: Add Tegra186 chip ID supportThierry Reding2017-12-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The register region containing chip ID information has been relocated in Tegra186 and changed in backwards-incompatible ways. Add a compatible string to allow the driver to make the distinction. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | | soc/tegra: fuse: Warn if accessing unmapped registersThierry Reding2017-12-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the FUSE registers are accessed but the region is not mapped, warn and return 0. This potentially catches hard to diagnose bugs because the accesses happen before any kernel log output. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | | soc/tegra: fuse: Move register mapping checkThierry Reding2017-12-131-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tegra_read_chipid() function can be called from places other than tegra_get_chip_id(), so the check for a valid mapping of the MISC registers needs to be moved to tegra_read_chipid() to catch all potential accesses. Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | | soc/tegra: fuse: Add Tegra186 supportTimo Alho2017-12-133-2/+26
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra210 and Tegra186 are mostly compatible from a fuses point of view. However, speedo support is implemented in the BPMP firmware, hence the implementation needs to be skipped in the fuses driver. Signed-off-by: Timo Alho <talho@nvidia.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> [treding@nvidia.com: reword commit message] Signed-off-by: Thierry Reding <treding@nvidia.com>
* | | | Merge tag 'renesas-soc-for-v4.16' of ↵Arnd Bergmann2017-12-211-0/+3
|\ \ \ \ | | |/ / | |/| / | |_|/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Renesas ARM Based SoC Updates for v4.16" from Simon Horman: * Identify R-Car M3-W ES1.1 Geert Uytterhoeven says "The Product Register of R-Car M3-W ES1.1 incorrectly identifies the SoC revision as ES2.0. Add a workaround to fix this." It is my understanding that this is likely to be forwards-compatibile. * tag 'renesas-soc-for-v4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas: soc: renesas: Identify R-Car M3-W ES1.1
| * | soc: renesas: Identify R-Car M3-W ES1.1Geert Uytterhoeven2017-11-271-0/+3
| |/ | | | | | | | | | | | | | | The Product Register of R-Car M3-W ES1.1 incorrectly identifies the SoC revision as ES2.0. Add a workaround to fix this. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
* / meson-gx-socinfo: Fix package id parsingArnaud Patard2017-11-301-2/+2
|/ | | | | | | | | | | | | | | | | | | | | | | | | | I've noticed the following message while booting a S905X based board: soc soc0: Amlogic Meson GXL (S905D) Revision 21:82 (b:2) Detected The S905D string is obviously wrong. The vendor code does: ... ver = (readl(assist_hw_rev) >> 8) & 0xff; meson_cpu_version[MESON_CPU_VERSION_LVL_MINOR] = ver; ver = (readl(assist_hw_rev) >> 16) & 0xff; meson_cpu_version[MESON_CPU_VERSION_LVL_PACK] = ver; ... while the current code does: ... ... This means that the current mainline code has package id and minor version reversed. Fixes: a9daaba2965e8 ("soc: Add Amlogic SoC Information driver") Signed-off-by: Arnaud Patard <apatard@hupstream.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
* Merge tag 'armsoc-drivers' of ↵Linus Torvalds2017-11-1649-295/+3728
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver updates from Arnd Bergmann: "This branch contains platform-related driver updates for ARM and ARM64, these are the areas that bring the changes: New drivers: - driver support for Renesas R-Car V3M (R8A77970) - power management support for Amlogic GX - a new driver for the Tegra BPMP thermal sensor - a new bus driver for Technologic Systems NBUS Changes for subsystems that prefer to merge through arm-soc: - the usual updates for reset controller drivers from Philipp Zabel, with five added drivers for SoCs in the arc, meson, socfpa, uniphier and mediatek families - updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla, Heiner Kallweit and Lorenzo Pieralisi Changes specific to some ARM-based SoC - the Freescale/NXP DPAA QBMan drivers from PowerPC can now work on ARM as well - several changes for power management on Broadcom SoCs - various improvements on Qualcomm, Broadcom, Amlogic, Atmel, Mediatek - minor Cleanups for Samsung, TI OMAP SoCs" [ NOTE! This doesn't work without the previous ARM SoC device-tree pull, because the R8A77970 driver is missing a header file that came from that pull. The fact that this got merged afterwards only fixes it at this point, and bisection of that driver will fail if/when you walk into the history of that driver. - Linus ] * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (96 commits) soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader bus: add driver for the Technologic Systems NBUS memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg() soc: qcom: remove unused label soc: amlogic: gx pm domain: add PM and OF dependencies drivers/firmware: psci_checker: Add missing destroy_timer_on_stack() dt-bindings: power: add amlogic meson power domain bindings soc: amlogic: add Meson GX VPU Domains driver soc: qcom: Remote filesystem memory driver dt-binding: soc: qcom: Add binding for rmtfs memory of: reserved_mem: Accessor for acquiring reserved_mem of/platform: Generalize /reserved-memory handling soc: mediatek: pwrap: fix fatal compiler error soc: mediatek: pwrap: fix compiler errors arm64: mediatek: cleanup message for platform selection soc: Allow test-building of MediaTek drivers soc: mediatek: place Kconfig for all SoC drivers under menu soc: mediatek: pwrap: add support for MT7622 SoC soc: mediatek: pwrap: add common way for setup CS timing extenstion soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap ..
| * soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloaderNeil Armstrong2017-11-091-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | In the case the VPU power domain has been powered on by the bootloader and no driver are attached to this power domain, the genpd will power it off after a certain amount of time, but the clocks hasn't been enabled by the kernel itself and the power-off will trigger some faults. This patch enable the clocks to have a coherent state for an eventual poweroff and switches to the pm_domain_always_on_gov governor. Fixes: 75fcb5ca4b46 ("soc: amlogic: add Meson GX VPU Domains driver") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * soc: qcom: remove unused labelArnd Bergmann2017-11-031-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | The newly added driver comes with a harmless warning: drivers/soc/qcom/rmtfs_mem.c: In function 'qcom_rmtfs_mem_probe': drivers/soc/qcom/rmtfs_mem.c:211:1: error: label 'remove_cdev' defined but not used [-Werror=unused-label] This removes the unused label to avoid the warning. Fixes: 702baebb8e00 ("soc: qcom: Remote filesystem memory driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * soc: amlogic: gx pm domain: add PM and OF dependenciesArnd Bergmann2017-11-021-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The new driver introduces harmless warnings: warning: (PM_RMOBILE && ARCH_RCAR_GEN1 && ARCH_RCAR_GEN2 && ARCH_R7S72100 && MESON_GX_PM_DOMAINS) selects PM_GENERIC_DOMAINS which has unmet direct dependencies (PM) warning: (MESON_GX_PM_DOMAINS) selects PM_GENERIC_DOMAINS_OF which has unmet direct dependencies (PM_GENERIC_DOMAINS && OF) This adds CONFIG_OF and CONFIG_PM dependencies to ensure it will only be enabled in valid configurations. Fixes: 75fcb5ca4b46 ("soc: amlogic: add Meson GX VPU Domains driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| * Merge tag 'amlogic-drivers-2' of ↵Arnd Bergmann2017-11-023-0/+245
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/drivers Pull "Amlogic drivers for v4.15, round 2" from Kevin Hilman: - add PM domain driver for GX VPU * tag 'amlogic-drivers-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: dt-bindings: power: add amlogic meson power domain bindings soc: amlogic: add Meson GX VPU Domains driver
| | * soc: amlogic: add Meson GX VPU Domains driverNeil Armstrong2017-10-293-0/+245
| | | | | | | | | | | | | | | | | | | | | | | | The Video Processing Unit needs a specific Power Domain powering scheme this driver handles this as a PM Power Domain driver. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| * | Merge tag 'v4.14-next-soc' of https://github.com/mbgg/linux-mediatek into ↵Arnd Bergmann2017-11-023-84/+437
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/drivers Pull "Mediatek: soc driver updates for v4.15" from Matthias Brugger: - add 32 bit read/write support to pwrap - add mt7622 support to pwrap - test build all mediatek soc drivers - fix compiler issues - clean up Kconfig description * tag 'v4.14-next-soc' of https://github.com/mbgg/linux-mediatek: soc: mediatek: pwrap: fix fatal compiler error soc: mediatek: pwrap: fix compiler errors arm64: mediatek: cleanup message for platform selection soc: Allow test-building of MediaTek drivers soc: mediatek: place Kconfig for all SoC drivers under menu soc: mediatek: pwrap: add support for MT7622 SoC soc: mediatek: pwrap: add common way for setup CS timing extenstion soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap soc: mediatek: pwrap: refactor pwrap_init for the various PMIC types soc: mediatek: pwrap: add pwrap_write32 for writing in 32-bit mode soc: mediatek: pwrap: add pwrap_read32 for reading in 32-bit mode dt-bindings: arm: mediatek: add MT7622 string to the PMIC wrapper doc ARM: mediatek: Cocci spatch "of_table" soc: mediatek: pwrap: fixup warnings from coding style
| | * | soc: mediatek: pwrap: fix fatal compiler errorMatthias Brugger2017-10-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When adding the MT6380 compatible, the sentinel for of_device_id was deleted, which leades to the following compiler error: FATAL: drivers/soc/mediatek/mtk-pmic-wrap: struct of_device_id is not terminated with a NULL entry! Fix this by adding the sentinel again. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | soc: mediatek: pwrap: fix compiler errorsMatthias Brugger2017-10-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When compiling using sparse, we got the following error: drivers/soc/mediatek/mtk-pmic-wrap.c:686:25: error: dubious one-bit signed bitfield Changing the data type to unsigned fixes this. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | soc: Allow test-building of MediaTek driversJean Delvare2017-10-201-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The COMPILE_TEST alternative dependency allows test-building the drivers but only as long as the build system itself will look into the directory where the drivers reside. Signed-off-by: Jean Delvare <jdelvare@suse.de> Cc: Sean Wang <sean.wang@mediatek.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | soc: mediatek: place Kconfig for all SoC drivers under menuSean Wang2017-10-201-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add cleanup for placing all Kconfig for all MediaTek SoC drivers under the independent menu as other SoCs vendor usually did. Since the menu would be shown depending on "ARCH_MEDIATEK || COMPILE_TEST" selected and MTK_PMIC_WRAP is still safe compiling with the case of "COMPILE_TEST" only, the superfluous dependency for those items under the menu also is also being removed for the sake of simplicity. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Jean Delvare <jdelvare@suse.de> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | soc: mediatek: pwrap: add support for MT7622 SoCChenglin Xu2017-10-201-0/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the registers, callbacks and data structures required to make the PMIC wrapper work on MT7622. Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com> Signed-off-by: Chen Zhong <chen.zhong@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | soc: mediatek: pwrap: add common way for setup CS timing extenstionSean Wang2017-10-201-22/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Multiple platforms would always use their own way handling CS timing extension on the bus which leads to a little bit code duplication. Therefore, the patch groups the similar logic to handle CS timing extension into the common function which allows the following SoCs have more reusability for configing CS timing. Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrapSean Wang2017-10-201-3/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave and also add extra new regmap_config of 32-bit mode for MT6380 since old regmap_config of 16-bit mode can't be fit into the need. Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com> Signed-off-by: Chen Zhong <chen.zhong@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | soc: mediatek: pwrap: refactor pwrap_init for the various PMIC typesSean Wang2017-10-201-40/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pwrap initialization is highly associated with the base SoC and the target PMICs, so slight refactorization is made here for allowing pwrap_init to run on those PMICs with different capability from the previous MediaTek PMICs and the determination for the enablement of the pwrap capability depending on PMIC type. Apart from this, the patch makes the driver more extensible especially when more PMICs join into the pwrap driver. Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | soc: mediatek: pwrap: add pwrap_write32 for writing in 32-bit modeSean Wang2017-10-201-16/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some regulators such as MediaTek MT6380 also has to be written in 32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write into pwrap_write16 and one additional function pointer is introduced for increasing flexibility allowing the determination which mode is used by the pwrap slave detection through device tree. Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com> Signed-off-by: Chen Zhong <chen.zhong@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | soc: mediatek: pwrap: add pwrap_read32 for reading in 32-bit modeSean Wang2017-10-201-1/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some regulators such as MediaTek MT6380 has to be read in 32-bit mode. So the patch adds pwrap_read32, rename old pwrap_read into pwrap_read16 and one function pointer is introduced for increasing flexibility allowing the determination which mode is used by the pwrap slave detection through device tree. Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com> Signed-off-by: Chen Zhong <chen.zhong@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| | * | soc: mediatek: pwrap: fixup warnings from coding styleSean Wang2017-10-101-7/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fixup those warnings such as lines over 80 words and parenthesis alignment which would be complained by checkpatch.pl. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
| * | | Merge tag 'at91-ab-4.15-soc' of ↵Arnd Bergmann2017-11-022-0/+12
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/drivers Pull "soc for 4.15" from Alexandre Belloni: - add SoC ids for the sama5d2 SiPs - Improve the AT91 maintainers entry * tag 'at91-ab-4.15-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: MAINTAINERS: Add SoC drivers to AT91 entry drivers: soc: atmel: Add basic support for new sama5d2 SiPs
| | * | | drivers: soc: atmel: Add basic support for new sama5d2 SiPsCristian Birsan2017-09-172-0/+12
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for new sama5d2 System in a Package chips. Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> [claudiu.beznea@microchip.com: use MiB instead of MB] Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
| * | | Merge tag 'amlogic-drivers' of ↵Arnd Bergmann2017-11-023-0/+186
| |\ \ \ | | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/drivers Pull "Amlogic drivers for v4.15" from Kevin Hilman: - add SoC info driver for 32-bit Amlogic SoCs * tag 'amlogic-drivers' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: soc: amlogic: Add Meson6/Meson8/Meson8b/Meson8m2 SoC Information driver
| | * | soc: amlogic: Add Meson6/Meson8/Meson8b/Meson8m2 SoC Information driverMartin Blumenstingl2017-10-063-0/+186
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | Amlogic SoCs have an information register which contains the SoC type and revision information. This patchs adds support for decoding those registers and exposing the resulting information via the SoC bus infrastructure. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
| * | Merge tag 'qcom-drivers-for-4.15-2' of ↵Arnd Bergmann2017-11-023-0/+283
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers Pull "Qualcomm ARM Based Driver Updates for v4.15 Part 2" from Andy Gross: * Add Qualcomm Remote Filesystem Memory driver * Add OF linkage for RMTFS * tag 'qcom-drivers-for-4.15-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux: soc: qcom: Remote filesystem memory driver dt-binding: soc: qcom: Add binding for rmtfs memory of: reserved_mem: Accessor for acquiring reserved_mem of/platform: Generalize /reserved-memory handling
| | * | soc: qcom: Remote filesystem memory driverBjorn Andersson2017-10-223-0/+283
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Qualcomm remote file system protocol is used by certain remoteprocs, in particular the modem, to read and write persistent storage in platforms where only the application CPU has physical storage access. The protocol is based on a set of QMI-encoded control-messages and a shared memory buffer for exchaning the data. This driver implements the latter, providing the user space service access to the carved out chunk of memory. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| * | | Merge tag 'tegra-for-4.15-soc' of ↵Arnd Bergmann2017-11-021-2/+13
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers Pull "soc/tegra: Changes for v4.15-rc1" from Thierry Reding: Contains a fix to the generic power domain driver to properly report errors propagated from BPMP. * tag 'tegra-for-4.15-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: bpmp: Check BPMP response return code
| | * | | soc/tegra: bpmp: Check BPMP response return codeTimo Alho2017-10-191-2/+13
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | Add checks for the return code in BPMP response messages. Signed-off-by: Timo Alho <talho@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
| * | | Merge tag 'soc-fsl-for-4.14' of ↵Arnd Bergmann2017-10-2014-116/+294
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers Pull "FSL/NXP ARM SoC drivers updates for 4.14" from Li Yang: This adds the DPAA QBMan support for ARM SoCs and a few minor fixes/updates. This pull request includes updates to the QMAN/BMAN drivers to make them work on the arm/arm64 architectures in addition to the power architecture and a few minor update/bug-fix to the soc/fsl drivers. We got the Reviewed-by from Catalin on the ARM architecture side. DPAA (Data Path Acceleration Architecture) is a set of hardware components used on some FSL/NXP QorIQ Networking SoCs, it provides the infrastructure to support simplified sharing of networking interfaces and accelerators by multiple CPU cores, and the accelerators themselves. The QMan(Queue Manager) and BMan(Buffer Manager) are infrastructural components within the DPAA framework. They are used to manage queues and buffers for various I/O interfaces, hardware accelerators. * tag 'soc-fsl-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux: soc/fsl/qbman: Enable FSL_LAYERSCAPE config on ARM soc/fsl/qbman: Add missing headers on ARM soc/fsl/qbman: different register offsets on ARM soc/fsl/qbman: add QMAN_REV32 soc/fsl/qbman: Rework portal mapping calls for ARM/PPC soc/fsl/qbman: Fix ARM32 typo soc/fsl/qbman: Drop L1_CACHE_BYTES compile time check soc/fsl/qbman: Drop set/clear_bits usage dt-bindings: soc/fsl: Update reserved memory binding for QBMan soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocations soc/fsl/qbman: Use shared-dma-pool for BMan private memory allocations soc/fsl/qbman: Add common routine for QBMan private allocations soc/fsl/guts: Add compatible string for LS1088 soc/fsl/qman: Sleep instead of stuck hacking jiffies
| | * | | soc/fsl/qbman: Enable FSL_LAYERSCAPE config on ARMMadalin Bucur2017-09-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> [Stuart: changed to use ARCH_LAYERSCAPE] Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qbman: Add missing headers on ARMClaudiu Manoil2017-09-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unlike PPC builds, ARM builds need following headers explicitly: +#include <linux/io.h> for ioread32be() +#include <linux/delay.h> for udelay() Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qbman: different register offsets on ARMMadalin Bucur2017-09-222-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qbman: add QMAN_REV32Madalin Bucur2017-09-222-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add revision 3.2 of the QBMan block. This is the version for LS1043A and LS1046A SoCs. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qbman: Rework portal mapping calls for ARM/PPCRoy Pledge2017-09-227-66/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rework portal mapping for PPC and ARM. The PPC devices require a cacheable coherent mapping while ARM will work with a non-cachable/write combine mapping. This also eliminates the need for manual cache flushes on ARM. This also fixes the code so sparse checking is clean. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qbman: Fix ARM32 typoValentin Rothberg2017-09-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kconfig symbol for 32bit ARM is 'ARM', not 'ARM32'. Signed-off-by: Valentin Rothberg <valentinrothberg@gmail.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qbman: Drop L1_CACHE_BYTES compile time checkClaudiu Manoil2017-09-221-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Not relevant and arch dependent. Overkill for PPC. Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qbman: Drop set/clear_bits usageMadalin Bucur2017-09-222-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace PPC specific set/clear_bits API with standard bit twiddling so driver is portalable outside PPC. Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocationsRoy Pledge2017-09-223-34/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the shared-memory-pool mechanism for frame queue descriptor and packed frame descriptor record area allocations. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qbman: Use shared-dma-pool for BMan private memory allocationsRoy Pledge2017-09-221-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the shared-memory-pool mechanism for free buffer proxy record area allocation. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qbman: Add common routine for QBMan private allocationsRoy Pledge2017-09-223-1/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QBMan device uses several memory regions to manage frame queues and buffers. Add a common routine for extracting and initializing these reserved memory areas. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/guts: Add compatible string for LS1088ashish kumar2017-09-221-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding compatible string "ls1088a-dcfg" so that guts driver can be init for ls1088 Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| | * | | soc/fsl/qman: Sleep instead of stuck hacking jiffiesKarim Eshapa2017-09-221-5/+1
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use msleep() instead of stucking with long delay will be more efficient. Signed-off-by: Karim Eshapa <karim.eshapa@gmail.com> Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Li Yang <leoyang.li@nxp.com>
| * | | Merge tag 'qcom-drivers-for-4.15' of ↵Arnd Bergmann2017-10-201-70/+265
| |\ \ \ | | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers Pull "Qualcomm ARM Based Driver Updates for v4.15" from Andy Gross: * Add SCM firmware APIs for download mode and secure IO service * Add SMEM support for cached entries * Add SMEM support for global partition, dynamic item limit, and more hosts * tag 'qcom-drivers-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux: firmware: qcom: scm: Expose download-mode control firmware: qcom: scm: Expose secure IO service soc: qcom: smem: Increase the number of hosts soc: qcom: smem: Support dynamic item limit soc: qcom: smem: Support global partition soc: qcom: smem: Read version from the smem header soc: qcom: smem: Use le32_to_cpu for comparison soc: qcom: smem: Support getting cached entries soc: qcom: smem: Rename "uncached" accessors
| | * | soc: qcom: smem: Increase the number of hostsChris Lew2017-10-111-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Increase the maximum number of hosts in a system to 10. Signed-off-by: Chris Lew <clew@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
| | * | soc: qcom: smem: Support dynamic item limitChris Lew2017-10-111-6/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In V12 SMEM, SBL writes SMEM parameter information after the TOC. Use the SBL provided item count as the max item number. Signed-off-by: Chris Lew <clew@codeaurora.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 18:07:26 +0000