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path: root/drivers/spi/spi-armada-3700.c
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* spi: a3700: use devm_platform_ioremap_resource() to simplify codeYueHaibing2019-09-041-3/+1
| | | | | | | | | | Use devm_platform_ioremap_resource() to simplify the code a bit. This is detected by coccinelle. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20190904135918.25352-3-yuehaibing@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Remove dev_err() usage after platform_get_irq()Stephen Boyd2019-08-021-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-42-swboyd@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner2019-06-191-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
*-. Merge remote-tracking branches 'spi/topic/a3700', 'spi/topic/atmel', ↵Mark Brown2018-01-261-18/+92
|\ \ | | | | | | | | | 'spi/topic/bcm53xx', 'spi/topic/davinci' and 'spi/topic/dw' into spi-next
| * | spi: a3700: Remove endianness swapping for full-duplex transfersMaxime Chevallier2018-01-241-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the following sparse warnings : line 767: warning: incorrect type in assignment (different base types) line 767: expected unsigned int [unsigned] [assigned] [usertype] val_out line 767: got restricted __le32 [usertype] <noident> line 776: warning: cast to restricted __le32 This takes advantage of readl/writel to do the endianness reordering, and removes an extra variable in the function. Fixes: f68a7dcb91b7 ("spi: a3700: Add full-duplex support") Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: a3700: Remove endianness swapping functions when accessing FIFOsMaxime Chevallier2018-01-241-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes the following sparse warnings : line 504: warning: incorrect type in assignment (different base types) line 504: expected unsigned int [unsigned] [usertype] val line 504: got restricted __le32 [usertype] <noident> line 527: warning: cast to restricted __le32 This is solved by removing endian-converson functions, since the converted values are going through readl/writel anyway, which take care of the conversion. Fixes: 6fd6fd68c9e2 ("spi: armada-3700: Fix padding when sending not 4-byte aligned data") Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: a3700: Add full-duplex supportMaxime Chevallier2018-01-181-12/+73
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The armada 3700 SPI controller has support for full-duplex transfers, but it can only be done without using the hardware FIFOs. A full duplex transfer is done by shifting 4 bytes at a time, or even one byte at a time for transfers less than 4 bytes long. While this method is perfectly suitable for small transfers, it is still slower than using the FIFOs. This commit implement full-duplex support, making sure that half-duplex transfers are still done using the FIFOs with the existing method. Some setup functions were moved around to make sure the controller is properly configured before beginning each transfer. This was tested on EspressoBin with a logical analyser, and a simple setup where MISO is connected on MOSI. Transfers were made from userspace using spidev and spi-pipe from the spi-tools project Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: a3700: Allow to enable or disable FIFO modeMaxime Chevallier2018-01-181-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The armada 3700 SPI controller allows to make transfers without using the 32 bytes RFIFO and WFIFO. This commit enable switching between FIFO and non-FIFO mode, which is necessary to implement full-duplex transfers. Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: a3700: Set frequency limits at startupMaxime Chevallier2018-01-181-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada 3700 SPI controller has an internal clock divider which can divide the parent clock frequency by up to 30. This patch sets the limits in the spi_controller fields so that we can detect when a non-supported frequency is requested by a device for a transfer. Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: a3700: Clear DATA_OUT when performing a readMaxime Chevallier2018-01-181-0/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | When performing a read using FIFO mode, the spi controller shifts out the last 2 bytes that were written in a previous transfer on MOSI. This undocumented behaviour can cause devices to misinterpret the transfer, so we explicitly clear the WFIFO before each read. This behaviour was noticed on EspressoBin. Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
* / spi: a3700: Fix clk prescaling for coefficient over 15Maxime Chevallier2017-11-271-0/+8
|/ | | | | | | | | | | | | | | | The Armada 3700 SPI controller has 2 ranges of prescaler coefficients. One ranging from 0 to 15 by steps of 1, and one ranging from 0 to 30 by steps of 2. This commit fixes the prescaler coefficients that are over 15 so that it uses the correct range of values. The prescaling coefficient is rounded to the upper value if it is odd. This was tested on Espressobin with spidev and a locigal analyser. Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* spi: a3700: Change SPI mode before asserting chip-selectMaxime Chevallier2017-10-101-13/+4
| | | | | | | | | | | | | | | | | The spi device mode should be configured in the controller before the chip-select is asserted, so that a clock polarity configuration change is not interpreted as a clock tick by the device. This patch moves the mode setting to the 'prepare_message' function instead of the 'transfer_one' function. By doing so, this patch also removes redundant code in a3700_spi_clock_set. This was tested on EspressoBin board, with spidev. Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: a3700: Return correct value on timeout detectionMaxime Chevallier2017-10-101-1/+2
| | | | | | | | | | | | | | When waiting for transfer completion, a3700_spi_wait_completion returns a boolean indicating if a timeout occurred. The function was returning 'true' everytime, failing to detect any timeout. This patch makes it return 'false' when a timeout is reached. Signed-off-by: Maxime Chevallier <maxime.chevallier@smile.fr> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* spi: armada-3700: Fix padding when sending not 4-byte aligned dataZachary Zhang2017-09-131-94/+41
| | | | | | | | | | | | | | In 4-byte transfer mode, extra padding/dummy bytes '0xff' would be sent in write operation if TX data is not 4-byte aligned since the SPI data register is always shifted out as whole 4 bytes. Fix this by using the header count feature that allows to transfer 0 to 4 bytes. Use it to actually send the first 1 to 3 bytes of data before the rest of the buffer that will hence be 4-byte aligned. Signed-off-by: Zachary Zhang <zhangzg@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: armada-3700: Fix failing commands with quad-SPIMiquel Raynal2017-09-131-2/+5
| | | | | | | | | | | | | | | | | | | | | A3700 SPI controller datasheet states that only the first line (IO0) is used to receive and send instructions, addresses and dummy bytes, unless for addresses during an RX operation in a quad SPI configuration (see p.821 of the Armada-3720-DB datasheet). Otherwise, some commands such as SPI NOR commands like READ_FROM_CACHE_DUAL_IO(0xeb) and READ_FROM_CACHE_DUAL_IO(0xbb) will fail because these commands must send address bytes through the four pins. Data transfer always use the four bytes with this setup. Thus, in quad SPI configuration, the A3700_SPI_ADDR_PIN bit must be set only in this case to inform the controller that it must use the number of pins indicated in the {A3700_SPI_DATA_PIN1,A3700_SPI_DATA_PIN0} field during the address cycles of an RX operation. Suggested-by: Ken Ma <make@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
*-. Merge remote-tracking branches 'spi/topic/armada', 'spi/topic/ath79', ↵Mark Brown2017-02-191-8/+6
|\ \ | | | | | | | | | 'spi/topic/bcm-qspi' and 'spi/topic/bcm53xx' into spi-next
| * | spi: armada-3700: Remove spi_master_put in a3700_spi_remove()Wei Yongjun2017-02-191-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The call to spi_master_put() in a3700_spi_remove() is redundant since the master is registered using devm_spi_register_master() and no reference hold by using spi_master_get() in a3700_spi_remove(). This is detected by Coccinelle semantic patch. Fixes: 5762ab71eb24 ("spi: Add support for Armada 3700 SPI Controller") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: armada-3700: Remove .owner field for driverWei Yongjun2017-02-091-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove .owner field if calls are used which set it automatically. Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: armada-3700: Coding style fixesRomain Perier2016-12-311-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following warning are reported by checkpatch.pl: CHECK: Alignment should match open parenthesis +static void a3700_spi_transfer_setup(struct spi_device *spi, + struct spi_transfer *xfer) WARNING: Missing a blank line after declarations + u32 data = le32_to_cpu(val); + memcpy(a3700_spi->rx_buf, &data, 4); total: 0 errors, 1 warnings, 1 checks, 923 lines checked Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: armada-3700: Replaced raw values for nbits by the SPI macrosRomain Perier2016-12-311-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, function a3700_spi_pin_mode_set() configures the SPI transfer mode according to the value passed as second argument. This value is detected using the raw values from a switch case. This commit replaces these raw values by the corresponding macro constants in linux/spi/spi.h Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | spi: armada-3700: Remove unnecessary conditionDan Carpenter2016-12-161-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | We checked that "a3700_spi->wait_mask & cause" was set at the beginning of the function so we don't need to check again here. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Romain Perier <romain.perier@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* | | spi: armada-3700: Set mode bits correctlyDan Carpenter2016-12-161-1/+1
|/ / | | | | | | | | | | | | | | | | We set SPI_RX_DUAL twice instead of setting SPI_TX_DUAL. Fixes: 5762ab71eb24 ("spi: Add support for Armada 3700 SPI Controller") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Romain Perier <romain.perier@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* / spi: armada-3700: fix unsigned compare than zero on irqColin Ian King2016-12-141-4/+5
|/ | | | | | | | | | | | spi->irq is an unsigned integer hence the check if status is less than zero has no effect. Fix this by replacing spi->irq with an int irq so the less than zero compare will correctly detect errors. Issue found with static analysis with CoverityScan, CID1388567 Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Romain Perier <romain.perier@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: Add support for Armada 3700 SPI ControllerRomain Perier2016-12-081-0/+923
Marvell Armada 3700 SoC comprises an SPI Controller. This Controller supports up to 4 SPI slave devices, with dedicated chip selects,supports SPI mode 0/1/2 and 3, CPIO or Fifo mode with DMA transfers and different SPI transfer mode (Single, Dual or Quad). This commit adds basic driver support for FIFO mode. In this mode, dedicated registers are used to store the instruction, the address, the read mode and the data. Write and Read FIFO are used to store the outcoming or incoming data. The data FIFOs are accessible via DMA or by the CPU. Only the CPU is supported for now. Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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