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* Merge branch 'mips-for-linux-next' of ↵Linus Torvalds2014-04-021-0/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linux-mips.org/pub/scm/ralf/upstream-sfr Pull MIPS updates from Ralf Baechle: - Support for Imgtec's Aptiv family of MIPS cores. - Improved detection of BCM47xx configurations. - Fix hiberation for certain configurations. - Add support for the Chinese Loongson 3 CPU, a MIPS64 R2 core and systems. - Detection and support for the MIPS P5600 core. - A few more random fixes that didn't make 3.14. - Support for the EVA Extended Virtual Addressing - Switch Alchemy to the platform PATA driver - Complete unification of Alchemy support - Allow availability of I/O cache coherency to be runtime detected - Improvments to multiprocessing support for Imgtec platforms - A few microoptimizations - Cleanups of FPU support - Paul Gortmaker's fixes for the init stuff - Support for seccomp * 'mips-for-linux-next' of git://git.linux-mips.org/pub/scm/ralf/upstream-sfr: (165 commits) MIPS: CPC: Use __raw_ memory access functions MIPS: CM: use __raw_ memory access functions MIPS: Fix warning when including smp-ops.h with CONFIG_SMP=n MIPS: Malta: GIC IPIs may be used without MT MIPS: smp-mt: Use common GIC IPI implementation MIPS: smp-cmp: Remove incorrect core number probe MIPS: Fix gigaton of warning building with microMIPS. MIPS: Fix core number detection for MT cores MIPS: MT: core_nvpes function to retrieve VPE count MIPS: Provide empty mips_mt_set_cpuoptions when CONFIG_MIPS_MT=n MIPS: Lasat: Replace del_timer by del_timer_sync MIPS: Malta: Setup PM I/O region on boot MIPS: Loongson: Add a Loongson-3 default config file MIPS: Loongson 3: Add CPU hotplug support MIPS: Loongson 3: Add Loongson-3 SMP support MIPS: Loongson: Add Loongson-3 Kconfig options MIPS: Loongson: Add swiotlb to support All-Memory DMA MIPS: Loongson 3: Add serial port support MIPS: Loongson 3: Add IRQ init and dispatch support MIPS: Loongson 3: Add HT-linked PCI support ...
| * Merge branch '3.14-fixes' into mips-for-linux-nextRalf Baechle2014-03-316-17/+35
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| * | MIPS: Alchemy: Unify Devboard support.Manuel Lauss2014-03-261-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch merges support for all DB1xxx and PB1xxx boards into a single image, along with a new single defconfig for them. Run-tested on DB1300 and DB1500. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Cc: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/6577/ Patchwork: https://patchwork.linux-mips.org/patch/6659/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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*-. \ \ Merge remote-tracking branches 'spi/topic/xilinx' and 'spi/topic/xtfpga' ↵Mark Brown2014-03-304-20/+190
|\ \ \ \ | | | | | | | | | | | | | | | into spi-next
| | * | | spi: xtensa-xtfpga: Enable driver compilation with COMPILE_TESTAxel Lin2014-03-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This helps increasing build testing coverage. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * | | spi: add xtfpga SPI controller driverMax Filippov2014-03-133-0/+184
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This simple SPI master controller is built into xtfpga bitstreams. It always transfers 16 bit words in SPI mode 0, automatically asserting CS on transfer start and deasserting on end. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | | spi: xilinx: remove unnecessary spacesJingoo Han2014-02-271-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unnecessary space in order to fix the following checkpatch issues. WARNING: Unnecessary space after function pointer name Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | | spi: xilinx: Convert to let spi core validate bits_per_wordAxel Lin2014-02-231-16/+2
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. spi_bitbang requires custom setup_transfer() to be defined if there is a custom txrx_bufs(). Thus keep the empty xilinx_spi_setup_transfer() function in the code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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*-------------. \ \ \ Merge remote-tracking branches 'spi/topic/sunxi', 'spi/topic/tegra114', ↵Mark Brown2014-03-3011-459/+1005
|\ \ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'spi/topic/ti-qspi', 'spi/topic/ti-ssp', 'spi/topic/topcliff-pch', 'spi/topic/txx9', 'spi/topic/xcomm' and 'spi/topic/xfer' into spi-next
| | | | | | | | * | | | spi: Add a timeout when waiting for transfersMark Brown2014-02-031-1/+11
| | | | | | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't wait indefinitely for transfers to complete but time out after 10ms more than we expect the transfer to take on the wire. Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | | * / / / spi: xcomm: Remove duplicate code to set default bits_per_word and max speedAxel Lin2014-03-041-8/+4
| | | | | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the implementation of __spi_validate(), spi core will set transfer bits_per_word and max speed as spi device default if it is not set for this transfer. So we can remove the same logic in spi_xcomm_setup_transfer(). Also remove a redundant code to initialize is_first variable. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | | | spi: txx9: Let spi core handle validating transfer lengthAxel Lin2014-03-011-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi core will handle validating transfer length since commit 4d94bd21b333 "spi: core: Validate length of the transfers in message". So remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | | | spi: txx9: Use devm_ioremap_resource()Jingoo Han2014-02-281-7/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use devm_ioremap_resource() in order to make the code simpler, and remove redundant return value check of platform_get_resource() because the value is checked by devm_ioremap_resource(). Signed-off-by: Jingoo Han <jg1.han@samsung.com> Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | | | spi: txx9: Convert to let spi core handle checking transfer speedAxel Lin2014-02-101-9/+3
| | | | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By setting master->max_speed_hz and master->min_speed_hz, spi core will handle checking transfer speed. Then we can remove the same checking in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | * | | | spi: topcliff-pch: Transform noisy message to dev_vdbgAlexander Stein2014-03-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If during a SPI transfer with len larger than PCH_MAX_FIFO_DEPTH and the IRQ handler happens to be called when the transmit FIFO is already empty, and SPSR_FI_BIT is set consequently, the message "spi_master spi32766: pch_spi_handler_sub : Transfer is not completed" is spammed to the systemlog, because tx_index has already increased further due to the next bytes to be written. This case is uncritical as new bytes have already been written. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | * | | | spi: topcliff-pch: Properly unregister platform devices on probe() error pathsAxel Lin2014-03-241-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure all registered platform devices are unregistered on probe() error paths. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | * | | | spi/topcliff-pch: Fix debug messageAlexander Stein2014-02-191-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | * | | | spi: topcliff-pch: Convert to use master->max_speed_hzAxel Lin2014-02-141-36/+1
| | | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set "master->max_speed_hz = PCH_MAX_BAUDRATE" then we can remove pch_spi_setup. In additional, pspi->max_speed_hz will never be 0 because it's default value will be set to master->max_speed_hz. Also remove list_empty checking in pch_spi_transfer() because the checking is done by spi core. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * / / / spi: remove obsolete spi-ti-ssp driverArnd Bergmann2014-03-183-386/+0
| | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tnetv107x platform is getting removed, so this driver will not be needed any more. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | * / / / spi/ti-qspi: Fix return from mmap pathSourav Poddar2014-03-101-1/+0
| | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mmap resource requirement is only for memory mapped operations. If the user does not populate mmap resource, dont call return, instead we go on for normal spi mode operations. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | * / / / spi: tegra114: Use list_is_last() instead of open-codedAxel Lin2014-02-031-2/+2
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For better readability, and then we can remove the comment for last transfer. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | | spi: sun6i: Set bits_per_word_mask to only support 8 bits word lengthAxel Lin2014-03-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This controller only supports 8 bits word length. Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | | spi: sun4i: Set bits_per_word_mask to only support 8 bits word lengthAxel Lin2014-03-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This controller only supports 8 bits word length. Set bits_per_word_mask so spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | | spi: sunxi: Add Allwinner A10 SPI controller driverMaxime Ripard2014-02-233-0/+484
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The older Allwinner SoCs (A10, A13, A10s and A20) all have the same SPI controller. Unfortunately, this SPI controller, even though quite similar, is significantly different from the recently supported A31 SPI controller (different registers offset, split/merged registers, etc.). Supporting both controllers in a single driver would be unreasonable, hence the addition of a new driver. Like its more recent counterpart, it supports DMA, but the driver only does PIO until we have a dmaengine driver for this platform. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | | spi: sun6i: Fix define for SUN6I_TFR_CTL_CS_MASKAxel Lin2014-02-161-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code in sun6i_spi_set_cs() actually clears CPHA and CPOL bits which is obvious wrong. The define for SUN6I_TFR_CTL_CS_MASK is wrong. Fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | | spi/sunxi: Add missing dependency on RESET_CONTROLLERMark Brown2014-02-061-0/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Mark Brown <broonie@linaro.org>
| * | | | spi: sunxi: Add Allwinner A31 SPI controller driverMaxime Ripard2014-02-053-0/+490
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner A31 has a new SPI controller IP compared to the older Allwinner SoCs. It supports DMA, but the driver only does PIO for now, and DMA will be supported eventually. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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*-----------. \ \ \ Merge remote-tracking branches 'spi/topic/s3c64xx', 'spi/topic/sc18is602', ↵Mark Brown2014-03-308-507/+324
|\ \ \ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'spi/topic/sh-hspi', 'spi/topic/sh-msiof', 'spi/topic/sh-sci', 'spi/topic/sirf' and 'spi/topic/spidev' into spi-next
| | | | | | | * | | | spi: spidev: Add support for Dual/Quad SPI TransfersGeert Uytterhoeven2014-02-271-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Dual/Quad SPI Transfers to the spidev API. As this uses SPI mode bits that don't fit in a single byte, two new ioctls (SPI_IOC_RD_MODE32 and SPI_IOC_WR_MODE32) are introduced. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | | * | | | spi: spidev: Restore all SPI mode flags on ioctl failureGeert Uytterhoeven2014-02-271-2/+2
| | | | | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit f477b7fb13df2b843997559ff34e87d054ba6538 ("spi: DUAL and QUAD support"), spi_device.mode was enlarged from 8 to 16 bits. However, the spidev code still only saved 8 bits of data. If a spidev SPI_IOC_WR_MODE or SPI_IOC_WR_LSB_FIRST request failed, only the lower 8 bits of the SPI mode were restored, inadvertently clearing the upper 8 bits, possibly disabling Quad or Dual SPI transfers for the device. Save up to 32 bits to fix this. For SPI_IOC_WR_MODE this is probably not so important, as it doesn't allow setting Quad or Dual mode anyway, but SPI_IOC_WR_LSB_FIRST is used to just set or clear a single bit. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | | | spi: sirf: Add missing spi_master_{resume,suspend} calls to PM callbacksAxel Lin2014-03-131-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is required since commit 2025172e3280 "spi/bitbang: Use core message pump". spi-bitbang now uses core message pump, so it needs to call spi_master_suspend/ spi_master_resume to stop/start the queue while suspend/resume. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | | | spi: sirf: provide a shortcut for spi command-data modeQipan Li2014-03-031-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | there are many SPI clients which use the following protocal: step 1: send command bytes to clients(rx buffer is empty) step 2: send data bytes to clients or receive data bytes from clients. SiRFprimaII provides a shortcut for this kind of SPI transfer. when tx buf is less or equal than 4 bytes and rx buf is null in a transfer, we think it as 'command' data and use hardware command register for the transfer. here we can save some CPU loading than doing both tx and rx for a normal transfer. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | | | spi: sirf: Use SIMPLE_DEV_PM_OPS macroJingoo Han2014-02-271-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | | | spi: sirf: use SET_SYSTEM_SLEEP_PM_OPS to initialize PM entriesQipan Li2014-02-241-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | use SET_SYSTEM_SLEEP_PM_OPS to initialize PM entries, this makes the codes clean and also enable the ability of hibernation support for sirf SPI. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | | | spi: sirf: move to use generic dma dt-bindingBarry Song2014-02-241-24/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sirf-dma driver enabled generic dt binding for dma channels. see here we remove self-defined dma channel prop and move to use generic dma_request_slave_channel. related changes in dts is something like: dmas = <&dmac1 9>, <&dmac1 4>; dma-names = "rx", "tx"; Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | | * | | | spi: sirf: Avoid duplicate code in various bits_per_word casesAxel Lin2014-02-031-15/+6
| | | | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Trivial cleanup to avoid duplicate code in various bits_per_word cases. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | | * / / / spi: sh-sci: Prevent NULL pointer dereferenceAxel Lin2014-03-131-1/+6
| | | | | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If sp->info is NULL, we will hit NULL pointer dereference in probe() while setting bus_num and num_chipselect for master: sp->bitbang.master->bus_num = sp->info->bus_num; sp->bitbang.master->num_chipselect = sp->info->num_chipselect; Thus add NULL test for sp->info in probe() to prevent NULL pointer dereference. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | spi: sh-msiof: Convert to spi core auto_runtime_pm frameworkGeert Uytterhoeven2014-03-111-24/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | spi: sh-msiof: Kill sh_msiof_spi_bits and sh_msiof_spi_hz functionsAxel Lin2014-03-031-23/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the implementation of __spi_validate(), spi core will set transfer bits_per_word and max speed as spi device default if it is not set for this transfer. So we can remove the same implementation in this driver. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | spi: sh-msiof: Use core message handling instead of spi-bitbangGeert Uytterhoeven2014-02-272-48/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only remaining feature of spi-bitbang used by this driver is the chipselect() callback, which just does conditional GPIO. This is handled fine by the SPI core's spi_set_cs(), hence switch the driver to use the core message handling through our own transfer_one() method. As the (optional) GPIO CS is no longer deasserted at spi_master.setup() time (through spi_bitbang_setup() and the spi_bitbang.chipselect() callback), we now have to take care of that ourselves. Remove the call to spi_master_put() in sh_msiof_spi_remove(), as our SPI master is now registered using devm_spi_register_master() (spi_bitbang_start() uses the non-managed version). Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | spi: sh-msiof: Convert to let spi core validate xfer->bits_per_wordGeert Uytterhoeven2014-02-271-17/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Set bits_per_word_mask so the spi core will reject transfers that attempt to use an unsupported bits_per_word value. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | spi: sh-msiof: Move clock management to (un)prepare_message()Geert Uytterhoeven2014-02-271-23/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move clock management and pin configuration from the bitbang chipselect() method to the SPI core prepare_message() and unprepare_message() methods. As spi_master.{,un}prepare_message() is guaranteed to be called in matching pairs, the clock management synchronization is no longer needed. As sh_msiof_spi_set_pin_regs() is no longer called at spi_master.setup() time (through spi_bitbang_setup() and the spi_bitbang.chipselect() callback), we now have to take care of that ourselves. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | spi: sh-msiof: Add support for R-Car H2 and M2Geert Uytterhoeven2014-02-271-3/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the MSIOF variant in the R-Car H2 (r8a7790) and M2 (r8a7791) SoCs. Binding documentation: - Add future-proof "renesas,msiof-<soctype>" compatible values, - The default for "renesas,rx-fifo-size" is 256 on R-Car H2 and M2, - "renesas,tx-fifo-size" and "renesas,rx-fifo-size" are deprecated for soctype-specific bindings, - Add example bindings. Implementation: - MSIOF on R-Car H2 and M2 requires the transmission of dummy data if data is being received only (cfr. "Set SICTR.TSCKE to 1" and "Write dummy transmission data to SITFDR" in paragraph "Transmit and Receive Procedures" of the Hardware User's Manual). - As RX depends on TX, MSIOF on R-Car H2 and M2 also lacks the RSCR register (Receive Clock Select Register), and some bits in the RMDR1 (Receive Mode Register 1) and TMDR2 (Transmit Mode Register 2) registers. - Use the recently introduced SPI_MASTER_MUST_TX flag to enable support for dummy transmission in the SPI core, and to differentiate from other MSIOF implementations in code paths that need this. - New DT compatible values ("renesas,msiof-r8a7790" and "renesas,msiof-r8a7791") are added, as well as new platform device names ("spi_r8a7790_msiof" and "spi_r8a7791_msiof"). - The default RX FIFO size is 256 words on R-Car H2 and M2. This is loosely based on a set of patches from Takashi Yoshii <takasi-y@ops.dti.ne.jp>. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | spi: sh-msiof: Move default FIFO sizes to device ID dataGeert Uytterhoeven2014-02-271-16/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As different variants of MSIOF have different FIFO sizes, move the default FIFO sizes to a new struct sh_msiof_chipdata, pointed to from the device ID data. [Moved ifdef to fix build -- broonie] Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | spi: sh-msiof: Improve bindingsGeert Uytterhoeven2014-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Documentation: - Add missing "interrupt-parent", "#address-cells", "#size-cells", and "clocks" properties, - Add missing default values for "num-cs", "renesas,tx-fifo-size" and "renesas,rx-fifo-size", - Add a reference to the pinctrl documentation. Implementation: - As "num-cs" is marked optional, provide a sensible default. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Acked-by: Magnus Damm <damm@opensource.se> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | Merge branch 'topic/dma' of ↵Mark Brown2014-02-272-108/+279
| | | | |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into HEAD
| | | | * | | | | spi: sh-msiof: Use the core cs_gpio field, and make it optionalGeert Uytterhoeven2014-02-221-3/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current implementation, CS is controlled by GPIO, which is passed through spi->controller_data. However, the MSIOF HW module has a function to output CS by itself, which is already enabled and actual switch will be done by pinmux. Store the GPIO number in the core cs_gpio field, and ignore it if it is an invalid (negative) GPIO number. Loosely based on a patch from Takashi Yoshii <takasi-y@ops.dti.ne.jp>. Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | | spi: sh-msiof: Add more register documentationGeert Uytterhoeven2014-02-221-52/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | | spi: sh-msiof: Change hz from unsigned long to u32Geert Uytterhoeven2014-02-221-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Both spi_transfer.speed_hz and spi_master.max_speed_hz are u32 Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
| | | | * | | | | spi: sh-msiof: Typo in comment s/tx/rx/Geert Uytterhoeven2014-02-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert+renesas@linux-m68k.org> Signed-off-by: Mark Brown <broonie@linaro.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-07 08:19:12 +0000