summaryrefslogtreecommitdiffstats
path: root/drivers/spi
Commit message (Collapse)AuthorAgeFilesLines
* Merge tag 'dmaengine-4.6-rc1' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2016-03-171-2/+10
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull dmaengine updates from Vinod Koul: "This is smallish update with minor changes to core and new driver and usual updates. Nothing super exciting here.. - We have made slave address as physical to enable driver to do the mapping. - We now expose the maxburst for slave dma as new capability so clients can know this and program accordingly - addition of device synchronize callbacks on omap and edma. - pl330 updates to support DMAFLUSHP for Rockchip platforms. - Updates and improved sg handling in Xilinx VDMA driver. - New hidma qualcomm dma driver, though some bits are still in progress" * tag 'dmaengine-4.6-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (40 commits) dmaengine: IOATDMA: revise channel reset workaround on CB3.3 platforms dmaengine: add Qualcomm Technologies HIDMA channel driver dmaengine: add Qualcomm Technologies HIDMA management driver dmaengine: hidma: Add Device Tree binding dmaengine: qcom_bam_dma: move to qcom directory dmaengine: tegra: Move of_device_id table near to its user dmaengine: xilinx_vdma: Remove unnecessary variable initializations dmaengine: sirf: use __maybe_unused to hide pm functions dmaengine: rcar-dmac: clear pertinence number of channels dmaengine: sh: shdmac: don't open code of_device_get_match_data() dmaengine: tegra: don't open code of_device_get_match_data() dmaengine: qcom_bam_dma: Make driver work for BE dmaengine: sun4i: support module autoloading dma/mic_x100_dma: IS_ERR() vs PTR_ERR() typo dmaengine: xilinx_vdma: Use readl_poll_timeout instead of do while loop's dmaengine: xilinx_vdma: Simplify spin lock handling dmaengine: xilinx_vdma: Fix issues with non-parking mode dmaengine: xilinx_vdma: Improve SG engine handling dmaengine: pl330: fix to support the burst mode dmaengine: make slave address physical ...
| * spi: rockchip: modify DMA max burst to 1Addy Ke2016-02-091-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Generic dma controller on Rockchips' platform cannot support DMAFLUSHP instruction which make dma to flush the req of non-aligned or non-multiple of what we need. That will cause an unrecoverable dma bus error. The saftest way is to set dma max burst to 1. Signed-off-by: Addy ke <addy.ke@rock-chips.com> Fixes: 64e36824b32b06 ("spi/rockchip: add driver for Rockchip...") Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> cc: Heiko Stuebner <heiko@sntech.de> cc: Olof Johansson <olof@lixom.net> cc: Doug Anderson <dianders@chromium.org> cc: Sonny Rao <sonnyrao@chromium.org> Acked-by: Mark Brown <broonie@kernel.org> Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
| |
| \
| \
| \
| \
| \
| \
| \
*-------. | Merge remote-tracking branches 'spi/topic/res', 'spi/topic/rockchip', ↵Mark Brown2016-03-113-53/+148
|\ \ \ \ \| | | | | | | | | | | | | | | | | | | 'spi/topic/sh', 'spi/topic/ti-qspi' and 'spi/topic/xilinx' into spi-next
| | | | * | spi: spi-ti-qspi: add mmap mode read supportVignesh R2016-02-091-29/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ti-qspi controller provides mmap port to read data from SPI flashes. mmap port is enabled in QSPI_SPI_SWITCH_REG. ctrl module register may also need to be accessed for some SoCs. The QSPI_SPI_SETUP_REGx needs to be populated with flash specific information like read opcode, read mode(quad, dual, normal), address width and dummy bytes. Once, controller is in mmap mode, the whole flash memory is available as a memory region at SoC specific address. This region can be accessed using normal memcpy() (or mem-to-mem dma copy). The ti-qspi controller hardware will internally communicate with SPI flash over SPI bus and get the requested data. Implement spi_flash_read() callback to support mmap read over SPI flash devices. With this, the read throughput increases from ~100kB/s to ~2.5 MB/s. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | spi: sh-spi, sh-msiof, rspi: Use ARCH_RENESASSimon Horman2016-02-181-3/+3
| | | | |/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make use of ARCH_RENESAS in place of ARCH_SHMOBILE. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: rockchip: covert rsd_nsecs to u32 typeShawn Lin2016-03-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | rsd_nsecs is defined as u8 memeber of struct rockchip_spi, but using of_property_read_u32. That means we take risk of truncation by type conversion if we pass on big value from dt. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: rockchip: header file cleanupShawn Lin2016-03-101-10/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove some of unused header files and reoder it into alphabetical order. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: rockchip: check requesting dma channel with EPROBE_DEFERShawn Lin2016-03-091-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let's defer probing the driver if the return value of dma_request_slave_channel is ERR_PTR(-EPROBE_DEFER) instead of disabling dma capability directly. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: rockchip: migrate to dmaengine_terminate_asyncShawn Lin2016-03-091-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dmaengine_terminate_all is deprecated, let's use dmaengine_terminate_async for interrupt handling. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: rockchip: check return value of dmaengine_prep_slave_sgShawn Lin2016-03-091-3/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should check return value of dmaengine_prep_slave_sg, otherwise we take risk of null pointer. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi/rockchip: fix endian mode for 16-bit transfersAlexander Kochetkov2016-03-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 16-bit transfers must be in big endian mode on wire. Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi/rockchip: Make sure spi clk is on in rockchip_spi_set_csHuibin Hong2016-03-051-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rockchip_spi_set_cs could be called by spi_setup, but spi_setup may be called by device driver after runtime suspend. Then the spi clock is closed, rockchip_spi_set_cs may access the spi registers, which causes cpu block in some socs. Fixes: 64e36824b32 ("spi/rockchip: add driver for Rockchip RK3xxx") Signed-off-by: Huibin Hong <huibin.hong@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: rockchip: add bindings for rk3399 spiXu Jianqun2016-02-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add devicetree bindings for Rockchip rk3399 spi which found on Rockchip rk3399 SoCs. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | spi: rockchip: remove xfer_completion from rockchip_spiShawn Lin2016-02-161-2/+0
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | xfer_completion isn't been used anywhere, so it can be removed. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | |
| \ \ \
| \ \ \
| \ \ \
| \ \ \
| \ \ \
*-----. \ \ \ Merge remote-tracking branches 'spi/topic/lp8841', 'spi/topic/msg', ↵Mark Brown2016-03-119-96/+730
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | 'spi/topic/pl022' and 'spi/topic/pxa2xx' into spi-next
| | | | * | | | spi: pxa2xx: Use newer more explicit DMAengine terminate APIJarkko Nikula2016-03-041-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit b36f09c3c441 ("dmaengine: Add transfer termination synchronization support") marked dmaengine_terminate_all() as deprecated and is being replaced by explicit synchronous and asynchronous terminate functions. Here DMA termination are done in two cases: FIFO overrun and module removal. FIFO overrun is handled in interrupt context and converting dmaengine_terminate_all() to dmaengine_terminate_async() does the same than before. Using synchronous termination in module removal however adds a bit more robustness as it waits all completion callbacks have finished. Although it looks all known DMA engines used with spi-pxa2xx don't implement device_synchronize() callback so this too appears to be a no-op in practice. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | spi: pxa2xx: Add support for Intel Broxton B-StepJarkko Nikula2016-03-021-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for third Intel Broxton variant and update comment for A-Step variant. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Tested-by: Steve Sakoman <steve.sakoman@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | spi: spi-pxa2xx-pci: Add ID and driver type for WildcatPoint PCHLeif Liddy2016-02-211-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | WildcatPoint PCH as seen on MacBook 12-inch (Early 2015) has a PCI enabled SPI controller. Enable it by adding its ID to the corresponding driver. The ACPI enumerated name for this SPI controller (found in spi-pxa2xx.c) is INT33C1. Therefore, we associate the SPI controller with the corresponding type of LPSS_LPT_SSP. Signed-off-by: Leif Liddy <leif.liddy@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | spi: pxa2xx: Remove unused DMA buffer mappingsJarkko Nikula2016-02-212-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only legacy PXA DMA implementation was using these rx_dma and tx_dma DMA addresses so they are not needed after commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | spi: pxa2xx: Add support for both chip selects on Intel BraswellMika Westerberg2016-02-091-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Intel Braswell LPSS SPI controller actually has two chip selects and there is no capabilities register where this could be found out. These two chip selects are controlled by bits which are in slightly differrent location than Broxton has. Braswell Windows driver also starts chip select (ACPI DeviceSelection) numbering from 1 so translate it to be suitable for Linux as well. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | spi: pxa2xx: Move chip select control bits into lpss_config structureMika Westerberg2016-02-091-24/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Intel LPSS SPI controllers, like the one in Braswell has these bits in a different location so move these bits to be part of the LPSS configuration. Since not all LPSS SPI controllers support multiple native chip selects we refactor selecting chip select to its own function and check control->cs_sel_mask before switching to another chip select. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | spi: pxa2xx: Translate ACPI DeviceSelection to Linux chip select on BaytrailMika Westerberg2016-02-091-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Windows Baytrail SPI host controller driver uses 1 as the first (and only) value for ACPI DeviceSelection like can be seen in DSDT taken from Lenovo Thinkpad 10: Device (FPNT) { ... Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings { Name (UBUF, ResourceTemplate () { SpiSerialBus (0x0001, // DeviceSelection PolarityLow, FourWireMode, 0x08, ControllerInitiated, 0x007A1200, ClockPolarityLow, ClockPhaseFirst, "\\_SB.SPI1", 0x00, ResourceConsumer,,) This will fail to enumerate in Linux with following error: [ 0.241296] pxa2xx-spi 80860F0E:00: cs1 >= max 1 [ 0.241312] spi_master spi32766: failed to add SPI device VFSI6101:00 from ACPI To make the Linux SPI core successfully enumerate the device we provide a custom version of ->fw_translate_cs() that translates DeviceSelection correctly. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | Merge branch 'topic/acpi' of ↵Mark Brown2016-02-0925-198/+1459
| | | | |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-pxa2xx
| | | | * | | | | spi: pxa2xx: Fix too early chipselect deassertJarkko Nikula2016-02-041-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a chance that chipselect is deasserted too early while the last clock cycle is still running. Protocol analyzers will see this as a failed last byte. This is more likely to occur with slow bitrates, for instance at 25 kbps. Reason for this is when using SPI mode 0 that both SPI host controller and SPI slave will drive the data lines at the falling edge of clock signal and sample at the rising edge. Receive FIFO gets the last bit now at the rising edge and code sees transfer to be finished either by the interrupt in PIO mode or by the DMA completion in DMA mode. The SSP Time Out register SSTO should take care of delaying the completion but it does not seems to have effect at least on Intel Skylake and Broxton even when using long enough values. Depending on timing code may get into point where chipselect is deasserted while the last clock cycle is still running at its second half cycle. Fix this by adding a wait loop in giveback() that waits until SSP becomes idle before deasserting the chipselect. Reported-by: Weifeng Voon <weifeng.voon@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | | spi: pxa2xx: Update comment in int_transfer_complete()Jarkko Nikula2016-02-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The register writes here actually don't stop the SSP but clean and disable interrupts and set the receive FIFO inactivity timeout to zero. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | | spi: pxa2xx: Print actual DMA/PIO transfer mode in debug messagesJarkko Nikula2016-01-271-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Transfer debug messages don't actually show is the transfer really using DMA. Driver may fall back to PIO in case transfer size is not within the certain limits or fails to map DMA buffers but debug messages don't reveal that. Move these debug messages further in pump_transfers() where the actual transfer mode is known and use drv_data->dma_mapped flag instead of chip->enable_dma for printing the mode. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | | spi: pxa2xx: Remove CONFIG_SPI_PXA2XX_DMAJarkko Nikula2016-01-153-41/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After removal of legacy PXA DMA code by the commit 6356437e65c2 ("spi: spi-pxa2xx: remove legacy PXA DMA bits") the CONFIG_SPI_PXA2XX_DMA follows the CONFIG_SPI_PXA2XX and cannot be disabled alone. Therefore remove this config symbol and dead definitions from the spi-pxa2xx.h. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | | spi: pl022: Remove obsolete struct pl022 members from kerneldocJarkko Nikula2016-02-171-7/+0
| | | | |_|_|/ / | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These structure members were removed in 2012 by the commit ffbbdd21329f ("spi: create a message queueing infrastructure"). Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | | spi: Add gfp parameter to kernel-doc to fix build warningJavier Martinez Canillas2016-03-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spi_split_transfers_maxsize() gfp parameter is missing in the function kernel-doc so building gives the following warning: .//drivers/spi/spi.c:2359: warning: No description found for parameter 'gfp' Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | | spi: make xmldocs warning caused by spi.cMasanari Iida2016-02-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix following warnings while make xmldocs. .//drivers/spi/spi.c:2354: warning: Excess function parameter 'message' description in 'spi_split_transfers_maxsize' .//drivers/spi/spi.c:2354: warning: Excess function parameter 'max_size' description in 'spi_split_transfers_maxsize' Signed-off-by: Masanari Iida <standby24x7@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | | spi: docbook: add missing parameter documentationMartin Sperl2016-02-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing docbook documentation for the gfp parameter in function spi_replace_transfers. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | | spi: core: Use min_t(size_t,..)Fabio Estevam2016-02-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use min_t(size_t,..) in order to avoid the following build warning on ARM64: include/linux/kernel.h:754:17: warning: comparison of distinct pointer types lacks a cast (void) (&_min1 == &_min2); \ ^ drivers/spi/spi.c:2304:17: note: in expansion of macro 'min' xfers[0].len = min(maxsize, xfer[0].len); Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | | spi: core: Use %zu for printing 'size_t' typeFabio Estevam2016-02-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use %zu for printing 'size_t' type in order to fix the following build warning on ARM64: drivers/spi/spi.c: In function '__spi_split_transfer_maxsize': drivers/spi/spi.c:2278:2: warning: format '%i' expects argument of type 'int', but argument 4 has type 'size_t' [-Wformat=] Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | | spi: core: Staticize __spi_split_transfer_maxsize()Fabio Estevam2016-02-151-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | __spi_split_transfer_maxsize() can be made static as it is only used in this file. This fixes the following sparse warning: drivers/spi/spi.c:2266:5: warning: symbol '__spi_split_transfer_maxsize' was not declared. Should it be static? Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | | spi: checking for NULL instead of IS_ERRDan Carpenter2016-02-121-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_replace_transfers() returns error pointers on error, it never returns NULL. Fixes: d9f121227281 ('spi: core: add spi_split_transfers_maxsize') Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | | spi: core: add spi_split_transfers_maxsizeMartin Sperl2016-02-091-0/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add spi_split_transfers_maxsize method that splits spi_transfers transparently into multiple transfers that are below the given max-size. This makes use of the spi_res framework via spi_replace_transfers to allocate/free the extra transfers as well as reverting back the changes applied while processing the spi_message. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | | spi: core: add spi_replace_transfers methodMartin Sperl2016-02-091-0/+132
| | | |_|_|/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the spi_replace_transfers method that can get used to replace some spi_transfers from a spi_message with other transfers. Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | spi: core: added spi_resource managementMartin Sperl2016-02-091-0/+91
| | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI resource management framework used while processing a spi_message via the spi-core. The basic idea is taken from devres, but as the allocation may happen fairly frequently, some provisioning (in the form of an unused spi_device pointer argument to spi_res_alloc) has been made so that at a later stage we may implement reuse objects allocated earlier avoiding the repeated allocation by keeping a cache of objects that we can reuse. This framework can get used for: * rewriting spi_messages * to fullfill alignment requirements of the spi_master HW * to fullfill transfer length requirements (e.g: transfers need to be less than 64k) * consolidate spi_messages with multiple transfers into a single transfer when the total transfer length is below a threshold. * reimplement spi_unmap_buf without explicitly needing to check if it has been mapped Signed-off-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | | spi: lp-8841: return correct error code from probeArnd Bergmann2016-02-261-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spi_lp8841_rtc_probe() function misses an initialization of the return code when it fails to get its memory resource, as gcc notices: drivers/spi/spi-lp8841-rtc.c: In function 'spi_lp8841_rtc_probe': drivers/spi/spi-lp8841-rtc.c:239:9: error: 'ret' may be used uninitialized in this function [-Werror=maybe-uninitialized] This changes the code to propagate the error from devm_ioremap_resource(). Fixes: 7ecbfff6711f ("spi: master driver to enable RTC on ICPDAS LP-8841") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Sergei Ianovich <ynvich@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | | spi: master driver to enable RTC on ICPDAS LP-8841Sergei Ianovich2016-02-243-0/+266
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ICP DAS LP-8841 contains a DS-1302 RTC. This driver provides an SPI master which makes the RTC usable. The driver is not supposed to work with anything else. The driver uses the standard MicroWire half-duplex transfer timing. Master output is set on low clock and sensed by the RTC on the rising edge. Master input is set by the RTC on the trailing edge and is sensed by the master on low clock. Signed-off-by: Sergei Ianovich <ynvich@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | |
| \ \ \ \
| \ \ \ \
| \ \ \ \
*---. \ \ \ \ Merge remote-tracking branches 'spi/topic/doc', 'spi/topic/dw' and ↵Mark Brown2016-03-113-19/+19
|\ \ \ \ \ \ \ | | |_|/ / / / | |/| | | | | | | | | | | | 'spi/topic/flash' into spi-next
| | | * | | | spi: core: Fix deadlock when sending messagesJon Hunter2016-03-091-12/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function __spi_pump_messages() is called by spi_pump_messages() and __spi_sync(). The function __spi_sync() has an argument 'bus_locked' that indicates if it is called with the SPI bus mutex held or not. If 'bus_locked' is false then __spi_sync() will acquire the mutex itself. Commit 556351f14e74 ("spi: introduce accelerated read support for spi flash devices") made a change to acquire the SPI bus mutex within __spi_pump_messages(). However, this change did not check to see if the mutex is already held. If __spi_sync() is called with the mutex held (ie. 'bus_locked' is true), then a deadlock occurs when __spi_pump_messages() is called. Fix this deadlock by passing the 'bus_locked' state from __spi_sync() to __spi_pump_messages() and only acquire the mutex if not already held. In the case where __spi_pump_messages() is called from spi_pump_messages() it is assumed that the mutex is not held and so call __spi_pump_messages() with 'bus_locked' set to false. Finally, move the unlocking of the mutex to the end of the __spi_pump_messages() function to simplify the code and only call cond_resched() if there are no errors. Fixes: 556351f14e74 ("spi: introduce accelerated read support for spi flash devices") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | spi: dw-mmio: remove message which is handled by coreAndy Shevchenko2016-02-051-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | devm_ioremap_resource() validates its parameters and issues an error message if needed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | | | | spi: dw-mid: switch to new dmaengine_terminate_* APIAndy Shevchenko2016-02-051-2/+2
| |/ / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert dmaengine_terminate_all() calls to synchronous versions. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | |
| \ \ \ \ \
| \ \ \ \ \
| \ \ \ \ \
| \ \ \ \ \
| \ \ \ \ \
*-----. \ \ \ \ \ Merge remote-tracking branches 'spi/topic/acpi', 'spi/topic/axi-engine', ↵Mark Brown2016-03-116-63/+701
|\ \ \ \ \ \ \ \ \ | | |_|_|_|_|_|/ / | |/| | | | | | | | | | | | | | | | 'spi/topic/bcm2835' and 'spi/topic/bcm2835aux' into spi-next
| | | | * | | | | spi: bcm2835aux: fix CPOL/CPHA settingStephan Olbrich2016-02-151-11/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The auxiliary spi supports only CPHA=0 modes as the first bit is always output to the pin before the first clock cycle. In CPHA=1 modes the first clock edge outputs the second bit hence the slave can never read the first bit. Also the CPHA registers switch between clocking data in/out on rising/falling edge hence depend on the CPOL setting. Signed-off-by: Stephan Olbrich <stephanolbrich@gmx.de> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | | spi: bcm2835aux: set up spi-mode before asserting cs-gpioStephan Olbrich2016-02-151-16/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using reverse polarity for clock (spi-cpol) on a device the clock line gets altered after chip-select has been asserted resulting in an additional clock beat, which confuses hardware. This happens due to the fact, the the hardware was initialized and reset at the begin and end of each transfer which results in default state for all lines except chip-select which is handled by the spi-subsystem as gpio-cs is used. To avoid this situation this patch moves the setup of polarity (spi-cpol and spi-cpha) outside of the chip-select into prepare_message, which is run prior to asserting chip-select. Signed-off-by: Stephan Olbrich <stephanolbrich@gmx.de> Reviewed-by: Martin Sperl <kernel@martin.sperl.org> Tested-by: Martin Sperl <kernel@martin.sperl.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | | spi: bcm2835aux: disable tx fifo empty irqStephan Olbrich2016-02-101-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tx empty irq can be disabled when all data was copied. This prevents unnecessary interrupts while the last bytes are sent. Signed-off-by: Stephan Olbrich <stephanolbrich@gmx.de> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | | | spi: Allow compile test of bcm2835aux if !GPIOLIBGeert Uytterhoeven2016-02-081-2/+1
| | | | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GPIO subsystem provides dummy GPIO consumer functions if GPIOLIB is not enabled. Hence drivers that depend on GPIOLIB, but use GPIO consumer functionality only, can still be compiled if GPIOLIB is not enabled. Relax the dependency of SPI_BCM2835AUX on GPIOLIB if COMPILE_TEST is enabled. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | | | spi: bcm2835: Remove unnecessary workaround to call gpio_set_valueAxel Lin2016-02-151-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This should be fixed by commit 4c02cba18cc9 ("pinctrl: bcm2835: Fix initial value for direction_output") Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-04 07:41:50 +0000