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* spi: bcm2835aux: ensure interrupts are enabled for shared handlerRob Herring2018-05-041-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BCM2835 AUX SPI has a shared interrupt line (with AUX UART). Downstream fixes this with an AUX irqchip to demux the IRQ sources and a DT change which breaks compatibility with older kernels. The AUX irqchip was already rejected for upstream[1] and the DT change would break working systems if the DTB is updated to a newer one. The latter issue was brought to my attention by Alex Graf. The root cause however is a bug in the shared handler. Shared handlers must check that interrupts are actually enabled before servicing the interrupt. Add a check that the TXEMPTY or IDLE interrupts are enabled. [1] https://patchwork.kernel.org/patch/9781221/ Cc: Alexander Graf <agraf@suse.de> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Brown <broonie@kernel.org> Cc: Eric Anholt <eric@anholt.net> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: linux-spi@vger.kernel.org Cc: linux-rpi-kernel@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: bcm-qspi: Always read and set BSPI_MAST_N_BOOT_CTRLKamal Dasu2018-05-021-2/+2
| | | | | | | | | | Always confirm the BSPI_MAST_N_BOOT_CTRL bit when enabling or disabling BSPI transfers. Fixes: 4e3b2d236fe00 ("spi: bcm-qspi: Add BSPI spi-nor flash controller driver") Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* spi: bcm-qspi: Avoid setting MSPI_CDRAM_PCS for spi-nor masterKamal Dasu2018-05-021-8/+16
| | | | | | | | | | | | Added fix for probing of spi-nor device non-zero chip selects. Set MSPI_CDRAM_PCS (peripheral chip select) with spi master for MSPI controller and not for MSPI/BSPI spi-nor master controller. Ensure setting of cs bit in chip select register on chip select change. Fixes: fa236a7ef24048 ("spi: bcm-qspi: Add Broadcom MSPI driver") Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* spi: pxa2xx: Allow 64-bit DMAAndy Shevchenko2018-04-241-1/+1
| | | | | | | | | | | | | | Currently the 32-bit device address only is supported for DMA. However, starting from Intel Sunrisepoint PCH the DMA address of the device FIFO can be 64-bit. Change the respective variable to be compatible with DMA engine expectations, i.e. to phys_addr_t. Fixes: 34cadd9c1bcb ("spi: pxa2xx: Add support for Intel Sunrisepoint") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* spi: cadence: Add usleep_range() for cdns_spi_fill_tx_fifo()sxauwsk2018-04-181-0/+8
| | | | | | | | | | | In case of xspi work in busy condition, may send bytes failed. once something wrong, spi controller did't work any more My test found this situation appear in both of read/write process. so when TX FIFO is full, add one byte delay before send data; Signed-off-by: sxauwsk <sxauwsk@163.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: sh-msiof: Fix bit field overflow writes to TSCR/RSCRVladimir Zapolskiy2018-04-161-0/+1
| | | | | | | | | | | | | | | | | | | | | The change fixes a bit field overflow which allows to write to higher bits while calculating SPI transfer clock and setting BRPS and BRDV bit fields, the problem is reproduced if 'parent_rate' to 'spi_hz' ratio is greater than 1024, for instance p->min_div = 2, MSO rate = 33333333, SPI device rate = 10000 results in k = 5, i.e. BRDV = 0b100 or 1/32 prescaler output, BRPS = 105, TSCR value = 0x6804, thus MSSEL and MSIMM bit fields are non-zero. Fixes: 65d5665bb260 ("spi: sh-msiof: Update calculation of frequency dividing") Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@mentor.com> Signed-off-by: Mark Brown <broonie@kernel.org>
* spi: imx: Update MODULE_DESCRIPTION to "SPI Controller driver"wangbo2018-04-131-1/+1
| | | | | | | | Now i.MX SPI controller can work in Slave mode. Update MODULE_DESCRIPTION to "SPI Controller driver". Signed-off-by: wangbo <wang.bo116@zte.com.cn> Signed-off-by: Mark Brown <broonie@kernel.org>
* Merge tag 'spi-v4.17' of ↵Linus Torvalds2018-04-0317-302/+387
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull SPI updates from Mark Brown: "A quiet release for SPI, some fixes and small updates for individual drivers with one bigger change from Linus Walleij which coverts the bitbanging SPI driver to use the GPIO descriptor API from Linus Walleij. Since GPIO descriptors were used by platform data this means there's a few changes in arch/ making relevant updates for a few platforms and one misc driver that are affected" * tag 'spi-v4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (24 commits) MAINTAINERS: update Andi's e-mail spi: spi-atmel: Use correct enum for DMA transfer direction spi: sh-msiof: Document R-Car M3-N support spi: sh-msiof: Use correct enum for DMA transfer direction spi: sprd: Add the support of restarting the system spi: sprd: Simplify the transfer function spi: Fix unregistration of controller with fixed SPI bus number spi: rspi: use correct enum for DMA transfer direction spi: jcore: disable ref_clk after getting its rate spi: bcm-qspi: fIX some error handling paths spi: pxa2xx: Disable runtime PM if controller registration fails spi: tegra20-slink: use true and false for boolean values spi: Fix scatterlist elements size in spi_map_buf spi: atmel: init FIFOs before spi enable spi: orion: Prepare space for per-child options spi: orion: Make the error message greppable spi: orion: Rework GPIO CS handling spi: bcm2835aux: Avoid 64-bit arithmetic in xfer len calc spi: spi-gpio: Augment device tree bindings spi: spi-gpio: Rewrite to use GPIO descriptors ...
| *---. Merge remote-tracking branches 'spi/topic/sh-msiof', 'spi/topic/sprd' and ↵Mark Brown2018-04-023-33/+151
| |\ \ \ | | | | | | | | | | | | | | | 'spi/topic/tegra20-slink' into spi-next
| | | | * spi: tegra20-slink: use true and false for boolean valuesGustavo A. R. Silva2018-03-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Assign true or false to boolean variables instead of an integer value. This issue was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: sprd: Add the support of restarting the systemBaolin Wang2018-03-211-0/+112
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Spreadtrum platform, we use one PMIC watchdog to reset the whole system with loading one suitable timeout value (usually 50ms) for the watchdog. In theory, we should implement the restart function in drivers/power/reset subsystem to access the PMIC watchdog with regmap. When restart the system, other cores will be stopped by IPI, but if other cores were accessing PMIC with holding the regmap mutex lock, that will cause dead-lock issue if we try to access the PMIC watchdog with regmap to restart the whole system. Thus we can implement the restart function in ADI driver to avoid this issue. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | spi: sprd: Simplify the transfer functionBaolin Wang2018-03-211-29/+35
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can move the hardware spinlock protection into the ADI read/write functions to simplify the sprd_adi_transfer_one() function. Moreover this optimization can also help to access PMIC without considering the hardware spinlock using sprd_adi_read/write() functions. Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * / spi: sh-msiof: Use correct enum for DMA transfer directionGeert Uytterhoeven2018-03-221-2/+2
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use enum dma_transfer_direction as required by dmaengine_prep_slave_sg() instead of enum dma_data_direction. This won't change behavior in practice as the enum values are equivalent. This fixes two warnings when building with clang: drivers/spi/spi-sh-msiof.c:755:27: warning: implicit conversion from enumeration type 'enum dma_data_direction' to different enumeration type 'enum dma_transfer_direction' [-Wenum-conversion] rx->sgl, rx->nents, DMA_FROM_DEVICE, ^~~~~~~~~~~~~~~ drivers/spi/spi-sh-msiof.c:772:27: warning: implicit conversion from enumeration type 'enum dma_data_direction' to different enumeration type 'enum dma_transfer_direction' [-Wenum-conversion] tx->sgl, tx->nents, DMA_TO_DEVICE, ^~~~~~~~~~~~~ Based on commit 768d59f5d0139a6f ("spi: rspi: use correct enum for DMA transfer direction"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
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| *-------. \ Merge remote-tracking branches 'spi/topic/jcore', 'spi/topic/kconfig', ↵Mark Brown2018-04-027-48/+96
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | 'spi/topic/orion', 'spi/topic/pxa2xx' and 'spi/topic/rspi' into spi-next
| | | | | | * | spi: rspi: use correct enum for DMA transfer directionStefan Agner2018-03-201-2/+2
| | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use enum dma_transfer_direction as required by dmaengine_prep_slave_sg instead of enum dma_data_direction. This won't change behavior in practice as the enum values are equivalent. This fixes two warnings when building with clang: drivers/spi/spi-rspi.c:538:26: warning: implicit conversion from enumeration type 'enum dma_data_direction' to different enumeration type 'enum dma_transfer_direction' [-Wenum-conversion] rx->sgl, rx->nents, DMA_FROM_DEVICE, ^~~~~~~~~~~~~~~ drivers/spi/spi-rspi.c:558:26: warning: implicit conversion from enumeration type 'enum dma_data_direction' to different enumeration type 'enum dma_transfer_direction' [-Wenum-conversion] tx->sgl, tx->nents, DMA_TO_DEVICE, ^~~~~~~~~~~~~ Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * | spi: pxa2xx: Convert to generalized SPI controller APIJarkko Nikula2018-02-123-21/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert to generalized SPI controller API introduced by the commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller""). Inside driver variable name "master" is still used to indicate the driver is master only. While at it, change "unsigned cs" to "unsigned int cs" in pxa2xx_spi_fw_translate_cs() to suppress checkpatch warning. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * | spi: pxa2xx: Move SSP idle waiting to cs_deassert()Jarkko Nikula2018-02-121-7/+7
| | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move SSP idle waiting before CS deassert from error and end of message handling function giveback() to cs_deassert(). This ensures idle waiting is done also if there is CS change between transfers. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | spi: orion: Prepare space for per-child optionsJan Kundrát2018-02-151-7/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Aggregating all options for a particular child underneath a common struct looks cleaner compared to having a separate array for each per-child option. Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | spi: orion: Make the error message greppableJan Kundrát2018-02-151-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 544248623b95 introduced a new user-visible string which was however split into two chunks. Thanks to Mark Brown for noticing. Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | spi: orion: Rework GPIO CS handlingJan Kundrát2018-02-141-3/+44
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Claim the GPIO from the driver, not via DT bindings or through the platform code - Find an unused HW CS signal because Orion needs to drive one for each SPI transaction The spi-orion.c was the only driver which supported (or cared about) the CS GPIO, while it wasn't actually requesting it. This change means that the DT bindings should stop hogging the GPIO CS pins because it's now being handled by the driver. Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * / spi: kconfig: Remove AVR32 dep. from SPI_ATMELUlf Magnusson2018-02-121-2/+2
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AVR32 symbol was removed in commit 26202873bb51 ("avr32: remove support for AVR32 architecture"). Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * / spi: jcore: disable ref_clk after getting its rateAlexey Khoroshilov2018-03-181-6/+5
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver does not disable ref_clk on remove. According to the comment, the only reason to enable the clock is to get its rate. So, it should be safe to disable clk just after that. By the way, clk_prepare_enable() looks to be more appropriate than clk_enable() here. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by: Mark Brown <broonie@kernel.org>
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| *-------. \ Merge remote-tracking branches 'spi/topic/atmel', 'spi/topic/bcm-qspi', ↵Mark Brown2018-04-027-211/+125
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | 'spi/topic/bcm2835aux', 'spi/topic/dw' and 'spi/topic/gpio' into spi-next
| | | | | | * | spi: spi-gpio: Rewrite to use GPIO descriptorsLinus Walleij2018-02-141-178/+92
| | | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This converts the bit-banged GPIO SPI driver to looking up and using GPIO descriptors to get a handle on GPIO lines for SCK, MOSI, MISO and all CS lines. All existing board files are converted in one go to keep it all consistent. With these conversions I rarely find any interrim steps that makes any sense. Device tree probing and GPIO handling should work like before also after this patch. For board files, we stop using controller data to pass the GPIO line for chip select, instead we pass this as a GPIO descriptor lookup like everything else. In some s3c24xx machines the names of the SPI devices were set to "spi-gpio" rather than "spi_gpio" which can never have worked, I fixed it working (I guess) as part of this patch set. Sometimes I wonder how this code got upstream in the first place, it obviously is not tested. mach-s3c64xx/mach-smartq.c has the same problem and additionally defines the *same* GPIO line for MOSI and MISO which is not going to be accepted by gpiolib. As the lines were number 1,2,2 I assumed it was a typo and use lines 1,2,3. A comment gives awat that line 0 is chip select though no actual SPI device is provided for the LCD supposed to be on this bit-banged SPI bus. I left it intact instead of just deleting the bus though. Kill off board file code that try to initialize the SPI lines to the same values that they will later be set by the spi_gpio driver anyways. Given the huge number of weird things in these board files I do not think this code is very tested or put in with much afterthought anyways. In order to assert that we do not get performance regressions on this crucial bing-banged driver, a ran a script like this dumping the Ilitek ILI9322 regmap 10000 times (it has no caching obviously) on an otherwise idle system in two iterations before and after the patches: #!/bin/sh for run in `seq 10000` do cat /debug/regmap/spi0.0/registers > /dev/null done Before the patch: time test.sh real 3m 41.03s user 0m 29.41s sys 3m 7.22s time test.sh real 3m 44.24s user 0m 32.31s sys 3m 7.60s After the patch: time test.sh real 3m 41.32s user 0m 28.92s sys 3m 8.08s time test.sh real 3m 39.92s user 0m 30.20s sys 3m 5.56s So any performance differences seems to be in the error margin. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * / spi: dw: Convert to generalized SPI controller APIJarkko Nikula2018-02-123-18/+18
| | | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert to generalized SPI controller API introduced by the commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller""). Inside driver variable name "master" is still used to indicate the driver is master only. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * / spi: bcm2835aux: Avoid 64-bit arithmetic in xfer len calcTrent Piepho2018-02-141-9/+9
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We want to check for xfers that are over 30 microseconds. Rather than find how many µs a xfer will take, instead find how many bytes can be transferred in 30 µs. The latter must be less than 32 bits (since our clock speed is limited to 32 bits), while the former involves 64 bit quantities and more arithmetic operations. Signed-off-by: Trent Piepho <tpiepho@impinj.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * / spi: bcm-qspi: fIX some error handling pathsChristophe Jaillet2018-03-141-2/+2
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some reason, commit c0368e4db4a3 ("spi: bcm-qspi: Fix use after free in bcm_qspi_probe() in error path") has updated some gotos, but not all of them. This looks spurious, so fix it. Fixes: fa236a7ef240 ("spi: bcm-qspi: Add Broadcom MSPI driver") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * | spi: spi-atmel: Use correct enum for DMA transfer directionStefan Agner2018-03-281-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use enum dma_transfer_direction as required by the functions dmaengine_prep_slave_(sg|single)() instead of enum dma_data_direction. This won't change behavior in practice as the enum values are equivalent. This fixes two warnings when building with clang: drivers/spi/spi-atmel.c:771:12: warning: implicit conversion from enumeration type 'enum dma_data_direction' to different enumeration type 'enum dma_transfer_direction' [-Wenum-conversion] DMA_FROM_DEVICE, ^~~~~~~~~~~~~~~ ... Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
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| *---. \ \ Merge remote-tracking branches 'spi/fix/atmel', 'spi/fix/pxa2xx' and ↵Mark Brown2018-04-023-10/+9
| |\ \ \ \ \ | | | |_|/ / | | |/| | | | | | | | | 'spi/fix/unregiser' into spi-linus
| | | | * | spi: Fix unregistration of controller with fixed SPI bus numberJarkko Nikula2018-03-201-7/+2
| | | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 9b61e302210e (spi: Pick spi bus number from Linux idr or spi alias) ceased to unregister SPI buses with fixed bus numbers. Moreover this is visible only if CONFIG_SPI_DEBUG=y is set or when trying to re-register the same SPI controller. rmmod spi_pxa2xx_platform (with CONFIG_SPI_DEBUG=y): [ 26.788362] spi_master spi1: attempting to delete unregistered controller [spi1] modprobe spi_pxa2xx_platform: [ 37.883137] sysfs: cannot create duplicate filename '/devices/pci0000:00/0000:00:19.0/pxa2xx-spi.12/spi_master/spi1' [ 37.894984] CPU: 1 PID: 1467 Comm: modprobe Not tainted 4.16.0-rc4+ #21 [ 37.902384] Call Trace: ... [ 38.122680] kobject_add_internal failed for spi1 with -EEXIST, don't try to register things with the same name in the same directory. [ 38.136154] WARNING: CPU: 1 PID: 1467 at lib/kobject.c:238 kobject_add_internal+0x2a5/0x2f0 ... [ 38.513817] pxa2xx-spi pxa2xx-spi.12: problem registering spi master [ 38.521036] pxa2xx-spi: probe of pxa2xx-spi.12 failed with error -17 Fix this by not returning immediately from spi_unregister_controller() if idr_find() doesn't find controller with given ID/bus number. It finds only those controllers that were registered with dynamic SPI bus numbers. Only conditional cleanup between dynamic and fixed bus numbers is to remove allocated IDR. Fixes: 9b61e302210e (spi: Pick spi bus number from Linux idr or spi alias) Cc: stable@vger.kernel.org Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * / spi: pxa2xx: Disable runtime PM if controller registration failsJarkko Nikula2018-03-071-0/+2
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't leave runtime PM enabled in case devm_spi_register_controller() returns with an error. Otherwise runtime PM will complain when driver is reloaded: [ 693.855811] pxa2xx-spi pxa2xx-spi.13: Unbalanced pm_runtime_enable! Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * / spi: atmel: init FIFOs before spi enableEugen Hristev2018-02-271-3/+5
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The datasheet recommends initializing FIFOs before SPI enable. If we do not do it like this, there may be a strange behavior. We noticed that DMA does not work properly with FIFOs if we do not clear them beforehand or enable them before SPIEN. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
| * / spi: Fix scatterlist elements size in spi_map_bufMaxime Chevallier2018-03-021-2/+8
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When SPI transfers can be offloaded using DMA, the SPI core need to build a scatterlist to make sure that the buffer to be transferred is dma-able. This patch fixes the scatterlist entry size computation in the case where the maximum acceptable scatterlist entry supported by the DMA controller is less than PAGE_SIZE, when the buffer is vmalloced. For each entry, the actual size is given by the minimum between the desc_len (which is the max buffer size supported by the DMA controller) and the remaining buffer length until we cross a page boundary. Fixes: 65598c13fd66 ("spi: Fix per-page mapping of unaligned vmalloc-ed buffer") Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
* | spi: remove blackfin related host driversArnd Bergmann2018-03-265-3387/+0
| | | | | | | | | | | | | | | | | | The blackfin architecture is getting removed, so these won't be needed any more. Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Aaron Wu <aaron.wu@analog.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* | treewide: simplify Kconfig dependencies for removed archsArnd Bergmann2018-03-261-2/+2
|/ | | | | | | | | | A lot of Kconfig symbols have architecture specific dependencies. In those cases that depend on architectures we have already removed, they can be omitted. Acked-by: Kalle Valo <kvalo@codeaurora.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Merge remote-tracking branch 'spi/topic/xilinx' into spi-nextMark Brown2018-01-261-0/+1
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| * spi: xilinx: Add support for xlnx,axi-quad-spi-1.00.aRicardo Ribalda2017-11-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver has been successfully tested with Xilinx's core axi-quad-spi-1.0.0a. Documented on DS843: https://www.xilinx.com/support/documentation/ip_documentation/axi_quad_spi/v1_00_a/ds843_axi_quad_spi.pdf Cc: Mark Brown <broonie@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-------. \ Merge remote-tracking branches 'spi/topic/pxa2xx', 'spi/topic/s3c64xx', ↵Mark Brown2018-01-265-41/+103
|\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | 'spi/topic/sh-msiof', 'spi/topic/sirf' and 'spi/topic/sun6i' into spi-next
| | | | | * | spi: sun6i: disable/unprepare clocks on removeTobias Jordan2017-12-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sun6i_spi_probe() uses sun6i_spi_runtime_resume() to prepare/enable clocks, so sun6i_spi_remove() should use sun6i_spi_runtime_suspend() to disable/unprepare them if we're not suspended. Replacing pm_runtime_disable() by pm_runtime_force_suspend() will ensure that sun6i_spi_runtime_suspend() is called if needed. Found by Linux Driver Verification project (linuxtesting.org). Fixes: 3558fe900e8af (spi: sunxi: Add Allwinner A31 SPI controller driver) Signed-off-by: Tobias Jordan <Tobias.Jordan@elektrobit.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | * | | spi: sirf: account for const type of of_device_id.dataJulia Lawall2018-01-031-2/+2
| | | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver creates various const structures that it stores in the data field of an of_device_id array. Adding const to the declaration of the location that receives the const value from the data field ensures that the compiler will continue to check that the value is not modified. Furthermore, the const-discarding cast on the extraction from the data field is no longer needed. Done using Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | spi: sh-msiof: Implement cs-gpios configurationGeert Uytterhoeven2017-12-141-7/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current support for GPIO chip selects assumes the GPIOs have been configured by platform code or the boot loader. This includes pinmux setup and GPIO direction. Hence it does not work as expected when just described in DT using the "cs-gpios" property. Fix this by: 1. using devm_gpiod_get_index() to request the GPIO, and thus configure pinmux, if needed, 2. configuring the GPIO direction is the spi_master.setup() callback. Use gpio_is_valid() instead of a check on positive numbers. Note that when using GPIO chip selects, at least one native chip select must be left unused, as that native chip select will be driven anyway, and (global) native chip select polarity must be taken into account. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | spi: sh-msiof: Extend support to 3 native chip selectsGeert Uytterhoeven2017-12-141-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently only the MSIOF_SYNC signal can be used as a native chip select. Extend support to up to 3 native chipselects using the MSIOF_SS1 and MSIOF_SS2 signals. Inspired by a patch in the BSP by Hiromitsu Yamasaki. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | spi: sh-msiof: Avoid writing to registers from spi_master.setup()Geert Uytterhoeven2017-12-141-11/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spi_master.setup() callback must not change configuration registers, as that could corrupt I/O that is in progress for other SPI slaves. The only exception is the configuration of the native chip select polarity in SPI master mode, as a wrong chip select polarity will cause havoc during all future transfers to any other SPI slave. Hence stop writing to registers in sh_msiof_spi_setup(), unless it is the first call for a controller using a native chip select, or unless native chip select polarity has changed (note that you'll loose anyway if I/O is in progress). Even then, only do what is strictly necessary, instead of calling sh_msiof_spi_set_pin_regs(). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | * | | spi: sh-msiof: Use dev_warn_once() instead of open-codingGeert Uytterhoeven2017-11-301-3/+2
| | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the helper introduced by commit e135303bd5bebcd2 ("device: Add dev_<level>_once variants") instead of open-coding the same functionality. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
| | * / / spi: s3c64xx: add SPDX identifierAndi Shyti2018-01-081-14/+4
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the original license statement with the SPDX identifier. Signed-off-by: Andi Shyti <andi.shyti@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Philippe Ombredanne <pombredanne@nexb.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: pxa2xx: Use gpiod_put() not gpiod_free()Mark Brown2017-12-221-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gpiod_free() is an internal function for gpiolib, gpiod_put() is the correct external function. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Suggested-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | spi: pxa2xx: avoid redundant gpio_to_desc(desc_to_gpio()) round-tripRasmus Villemoes2017-12-211-2/+2
| |/ / | | | | | | | | | | | | | | | | | | | | | gpio_free(gpio) simply does gpiod_free(gpio_to_desc(gpio)), so it's simpler and cleaner to use gpiod_free directly. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Mark Brown <broonie@kernel.org>
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*-------. \ \ Merge remote-tracking branches 'spi/topic/fsl-dspi', 'spi/topic/imx', ↵Mark Brown2018-01-265-14/+32
|\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | 'spi/topic/jcore', 'spi/topic/meson' and 'spi/topic/orion' into spi-next
| | | | | * | | spi: orion: Fix a resource leak if the optional "axi" clk is deferredChristophe Jaillet2018-01-261-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the optional "axi" clk is deferred, we still need to undo some initialisation. Especially 'master' must be released. It will be reallocated the next time 'orion_spi_probe()' is called. Add a new label to clean what needs to be cleaned and rename another label to improve the names used. Fixes: 92ae112e477a ("spi: orion: Fix clock resource by adding an optional bus clock") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| | | | | * | | spi: orion: Fix clock resource by adding an optional bus clockGregory CLEMENT2018-01-121-0/+14
| | | | | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Armada 7K/8K we need to explicitly enable the bus clock. The bus clock is optional because not all the SoCs need them but at least for Armada 7K/8K it is actually mandatory. The binding documentation is updating accordingly as well as mentioning the mandatory clock which was also missing. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-10-30 10:33:58 +0000