| Commit message (Collapse) | Author | Age | Files | Lines |
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson:
"This merge window brings a good size of cleanups on various platforms.
Among the bigger ones:
- Removal of Samsung s5pc100 and s5p64xx platforms. Both of these
have lacked active support for quite a while, and after asking
around nobody showed interest in keeping them around. If needed,
they could be resurrected in the future but it's more likely that
we would prefer reintroduction of them as DT and
multiplatform-enabled platforms instead.
- OMAP4 controller code register define diet. They defined a lot of
registers that were never actually used, etc.
- Move of some of the Tegra platform code (PMC, APBIO, fuse,
powergate) to drivers/soc so it can be shared with 64-bit code.
This also converts them over to traditional driver models where
possible.
- Removal of legacy gpio-samsung driver, since the last users have
been removed (moved to pinctrl)
Plus a bunch of smaller changes for various platforms that sort of
dissapear in the diffstat for the above. clps711x cleanups, shmobile
header file refactoring/moves for multiplatform friendliness, some
misc cleanups, etc"
* tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (117 commits)
drivers: CCI: Correct use of ! and &
video: clcd-versatile: Depend on ARM
video: fix up versatile CLCD helper move
MAINTAINERS: Add sdhci-st file to ARCH/STI architecture
ARM: EXYNOS: Fix build breakge with PM_SLEEP=n
MAINTAINERS: Remove Kirkwood
ARM: tegra: Convert PMC to a driver
soc/tegra: fuse: Set up in early initcall
ARM: tegra: Always lock the CPU reset vector
ARM: tegra: Setup CPU hotplug in a pure initcall
soc/tegra: Implement runtime check for Tegra SoCs
soc/tegra: fuse: fix dummy functions
soc/tegra: fuse: move APB DMA into Tegra20 fuse driver
soc/tegra: Add efuse and apbmisc bindings
soc/tegra: Add efuse driver for Tegra
ARM: tegra: move fuse exports to soc/tegra/fuse.h
ARM: tegra: export apb dma readl/writel
ARM: tegra: Use a function to get the chip ID
ARM: tegra: Sort includes alphabetically
ARM: tegra: Move includes to include/soc/tegra
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git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/cleanup
Merge "Samsung cleanup 2nd version for S5P SoCs for 3.17" from Kukjin Kim:
Cleanup S5P SoCs for 3.17
- removing s5p64x0 SoCs and s5pc100 SoC in mainline because
no more user and if it is required next time, it will be
supported with DT.
* tag 's5p-cleanup-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
video: fbdev: s3c-fb: remove s5pc100 related fimd and fb codes
mtd: onenand: remove s5pc100 related onenand codes
spi: s3c64xx: remove s5pc100 related spi codes
gpio: samsung: remov s5pc100 related gpio codes
ARM: S5PC100: no more support S5PC100 SoC
video: fbdev: s3c-fb: remove s5p64x0 related fimd codes
spi: s3c64xx: remove s5p64x0 related spi codes
gpio: samsung: remove s5p64x0 related gpio codes
ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
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This patch removes sp5c100 related spi because of no more support
s5pc100 SoC.
Cc: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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This patch removes s5p64x0 related spi because of no more support for
s5p64x0 SoCs. Meanwhile, cleanup SPI DT bindings for s5p6440-spi, it
should be s5p64x0-spi instead.
Cc: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Pull MIPS updates from Ralf Baechle:
"This is the main pull request for 3.17. It contains:
- misc Cavium Octeon, BCM47xx, BCM63xx and Alchemy updates
- MIPS ptrace updates and cleanups
- various fixes that will also go to -stable
- a number of cleanups and small non-critical fixes.
- NUMA support for the Loongson 3.
- more support for MSA
- support for MAAR
- various FP enhancements and fixes"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (139 commits)
MIPS: jz4740: remove unnecessary null test before debugfs_remove
MIPS: Octeon: remove unnecessary null test before debugfs_remove_recursive
MIPS: ZBOOT: implement stack protector in compressed boot phase
MIPS: mipsreg: remove duplicate MIPS_CONF4_FTLBSETS_SHIFT
MIPS: Bonito64: remove a duplicate define
MIPS: Malta: initialise MAARs
MIPS: Initialise MAARs
MIPS: detect presence of MAARs
MIPS: define MAAR register accessors & bits
MIPS: mark MSA experimental
MIPS: Don't build MSA support unless it can be used
MIPS: consistently clear MSA flags when starting & copying threads
MIPS: 16 byte align MSA vector context
MIPS: disable preemption whilst initialising MSA
MIPS: ensure MSA gets disabled during boot
MIPS: fix read_msa_* & write_msa_* functions on non-MSA toolchains
MIPS: fix MSA context for tasks which don't use FP first
MIPS: init upper 64b of vector registers when MSA is first used
MIPS: save/disable MSA in lose_fpu
MIPS: preserve scalar FP CSR when switching vector context
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replace au_read/write/sync with __raw_read/write and wmb.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7465/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A quiet release, more bug fixes than anything else. A few things do
stand out though:
- updates to several drivers to move towards the standard GPIO chip
select handling in the core.
- DMA support for the SH MSIOF driver.
- support for Rockchip SPI controllers (their first mainline
submission)"
* tag 'spi-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (64 commits)
spi: davinci: use spi_device.cs_gpio to store gpio cs per spi device
spi: davinci: add support to configure gpio cs through dt
spi/pl022: Explicitly truncate large bitmask
spi/atmel: Fix pointer to int conversion warnings on 64 bit builds
spi: davinci: fix to support more than 2 chip selects
spi: topcliff-pch: don't hardcode PCI slot to get DMA device
spi: orion: fix incorrect handling of cell-index DT property
spi: orion: Fix error return code in orion_spi_probe()
spi/rockchip: fix error return code in rockchip_spi_probe()
spi/rockchip: remove redundant dev_err call in rockchip_spi_probe()
spi/rockchip: remove duplicated include from spi-rockchip.c
ARM: dts: fix the chip select gpios definition in the SPI nodes
spi: s3c64xx: Update binding documentation
spi: s3c64xx: use the generic SPI "cs-gpios" property
spi: s3c64xx: Revert "spi: s3c64xx: Added provision for dedicated cs pin"
spi: atmel: Use dmaengine_prep_slave_sg() API
spi: topcliff-pch: Update error messages for dmaengine_prep_slave_sg() API
spi: sh-msiof: Use correct device for DMA mapping with IOMMU
spi: sh-msiof: Handle dmaengine_prep_slave_single() failures gracefully
spi: rspi: Handle dmaengine_prep_slave_sg() failures gracefully
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'spi/topic/topcliff-pch' into spi-next
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The DMA is a function 0 of the multifunction device where SPI host is attached.
Thus, we may avoid to hardcode PCI slot number.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Commit 16052827d98fbc13c31ebad560af4bd53e2b4dd5 ("dmaengine/dma_slave:
introduce inline wrappers") changed the code to use the new API, but forgot
to update the error messages.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
--
v2:
- New
Signed-off-by: Mark Brown <broonie@linaro.org>
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To function correctly in the presence of an IOMMU, the DMA buffers must be
mapped using the DMA channel's device instead of the MSIOF platform
device's device.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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As typically a shmobile SoC has less DMA channels than devices that can use
DMA, we may want to prioritize access to the DMA channels in the future.
This means that dmaengine_prep_slave_single() may start failing
arbitrarily.
Handle dmaengine_prep_slave_single() failures gracefully by falling back to
PIO. This requires moving DMA-specific configuration of the MSIOF device
after the call(s) to dmaengine_prep_slave_single().
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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If NO_DMA=y:
drivers/built-in.o: In function `sh_msiof_release_dma':
spi-sh-msiof.c:(.text+0x23cbfe): undefined reference to `dma_unmap_single'
drivers/built-in.o: In function `sh_msiof_request_dma':
spi-sh-msiof.c:(.text+0x23cd5e): undefined reference to `dma_map_single'
spi-sh-msiof.c:(.text+0x23cd70): undefined reference to `dma_mapping_error'
spi-sh-msiof.c:(.text+0x23cdca): undefined reference to `dma_unmap_single'
drivers/built-in.o: In function `sh_msiof_dma_once':
spi-sh-msiof.c:(.text+0x23d450): undefined reference to `dma_sync_single_for_cpu'
spi-sh-msiof.c:(.text+0x23d5ea): undefined reference to `dma_sync_single_for_cpu'
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Linux 3.16-rc3
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Conflicts:
drivers/spi/spi-sh-msiof.c
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Add DMA support to the MSIOF driver using platform data.
As MSIOF DMA is limited to 32-bit words (requiring byte/wordswapping for
smaller wordsizes), and the group length is limited to 256 words, DMA is
performed on two fixed pages, allocated and mapped at driver initialization
time.
Performance figures (in Mbps) on r8a7791/koelsch at different SPI clock
frequencies for 1024-byte and 4096-byte transfers:
1024 bytes 4096 bytes
- 3.25 MHz: PIO 2.1, DMA 2.6 | PIO 2.8, DMA 3.1
- 6.5 MHz: PIO 3.2, DMA 4.4 | PIO 5.0, DMA 5.9
- 13 MHz: PIO 4.2, DMA 6.6 | PIO 8.2, DMA 10.7
- 26 MHz: PIO 5.9, DMA 10.4 | PIO 12.4, DMA 18.4
Note that DMA is only faster than PIO for transfers that exceed the FIFO
size (typically 64 words / 256 bytes).
Also note that large transfers (larger than the group length for DMA, or
larger than the FIFO size for PIO), should use cs-gpio (with the
appropriate pinmux setup), as the hardware chipselect will be deasserted in
between chunks.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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- Move buffer pointer and length setup to the top,
- Make unsigned values unsigned,
- Loop over words and increment pointers instead of recalculating them,
which allows to kill bytes_done.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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- Add a timeout when waiting for the transfer complete interrupt,
- If sh_msiof_spi_stop() fails, there's no need to clear IER, as the
interrupt handler has already done that,
- Propagate transfer failures in sh_msiof_transfer_one().
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Based on an old patch by Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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This patch introduces the use of devm_ioremap and removes the iounmaps
in the probe and remove functions. Also, the labels are renamed to
preserve ordering.
Signed-off-by: Himangi Saraogi <himangi774@gmail.com>
Acked-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Mark Brown <broonie@linaro.org>
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'spi/topic/qup', 'spi/topic/rockchip' and 'spi/topic/rspi' into spi-next
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As typically a shmobile SoC has less DMA channels than devices that can use
DMA, we may want to prioritize access to the DMA channels in the future.
This means that dmaengine_prep_slave_sg() may start failing arbitrarily.
Handle dmaengine_prep_slave_sg() failures gracefully by falling back to
PIO.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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As of commit ab116a4df4942c78c189d9b0744dd940ab9e00b9 ("dmaengine:
shdma: fix a build failure on platforms with no DMA support"), the DMA
filter function shdma_chan_filter() is sufficiently abstracted to allow
building without DMA support. Hence drop the SH_DMAE_BASE dependency on
SUPERH.
Also increase build coverage by allowing the driver to be enabled if
COMPILE_TEST=y.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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rspi_release_dma() doesn't need access to any fields in the driver private
data, except for the pointer to the SPI master object. Hence just pass the
needed pointer.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Introduced by commit 8b983e90ea1a3dd82070f96c062ad521a06b7cc0 ("spi: rspi:
Extract rspi_common_transfer()"), which removed its users.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Fix to return -EINVAL from the error handling case instead of 0 when
failed to get fifo length.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
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There is a error message within devm_ioremap_resource
already, so remove the dev_err call to avoid redundant
error message.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Remove duplicated include.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Suggested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Addy Ke <addy.ke@rockchip.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Suggested-by: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Addy Ke <addy.ke@rockchip.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Suggested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Addy Ke <addy.ke@rockchip.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Suggested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Addy Ke <addy.ke@rockchip.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Without the dependencies for the accessors the driver can be enabled on
architectures where it will fail to build.
Signed-off-by: Mark Brown <broonie@linaro.org>
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In order to facilitate understanding, rockchip SPI controller IP design
looks similar in its registers to designware. But IC implementation
is different from designware, So we need a dedicated driver for Rockchip
RK3XXX SoCs integrated SPI. The main differences:
- dma request line: rockchip SPI controller have two DMA request line
for tx and rx.
- Register offset:
RK3288 dw
SPI_CTRLR0 0x0000 0x0000
SPI_CTRLR1 0x0004 0x0004
SPI_SSIENR 0x0008 0x0008
SPI_MWCR NONE 0x000c
SPI_SER 0x000c 0x0010
SPI_BAUDR 0x0010 0x0014
SPI_TXFTLR 0x0014 0x0018
SPI_RXFTLR 0x0018 0x001c
SPI_TXFLR 0x001c 0x0020
SPI_RXFLR 0x0020 0x0024
SPI_SR 0x0024 0x0028
SPI_IPR 0x0028 NONE
SPI_IMR 0x002c 0x002c
SPI_ISR 0x0030 0x0030
SPI_RISR 0x0034 0x0034
SPI_TXOICR NONE 0x0038
SPI_RXOICR NONE 0x003c
SPI_RXUICR NONE 0x0040
SPI_MSTICR NONE 0x0044
SPI_ICR 0x0038 0x0048
SPI_DMACR 0x003c 0x004c
SPI_DMATDLR 0x0040 0x0050
SPI_DMARDLR 0x0044 0x0054
SPI_TXDR 0x0400 NONE
SPI_RXDR 0x0800 NONE
SPI_IDR NONE 0x0058
SPI_VERSION NONE 0x005c
SPI_DR NONE 0x0060
- register configuration:
such as SPI_CTRLRO in rockchip SPI controller:
cr0 = (CR0_BHT_8BIT << CR0_BHT_OFFSET)
| (CR0_SSD_ONE << CR0_SSD_OFFSET);
cr0 |= (rs->n_bytes << CR0_DFS_OFFSET);
cr0 |= ((rs->mode & 0x3) << CR0_SCPH_OFFSET);
cr0 |= (rs->tmode << CR0_XFM_OFFSET);
cr0 |= (rs->type << CR0_FRF_OFFSET);
For more information, see RK3288 chip manual.
- Wait for idle: Must ensure that the FIFO data has been sent out
before the next transfer.
Signed-off-by: addy ke <addy.ke@rock-chips.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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This patch adds support for v1.1.1 of the SPI QUP controller.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
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When building on 64 bit architectures the use of bitwise negation generates
constants larger than 32 bits which won't fit in u32s used to represent
32 bit register values on the device. Explicitly cast to let the compiler
know that the higher bits are not significant and can be discarded.
Signed-off-by: Mark Brown <broonie@linaro.org>
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Fix to return a negative error code from the error handling case of
orion_spi_reset() instead of 0, as done elsewhere in this function.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Add trivial runtime PM support. This will only be of benefit on SoCs
where the clock to the SPI interface can be shut down.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Mark Brown <broonie@linaro.org>
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clk_prepare()/clk_enable() can fail, and it's return value should
be checked. Add the proper checking, and while we're here, convert
to clk_prepare_enable().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Mark Brown <broonie@linaro.org>
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'spi/topic/fsl' and 'spi/topic/omap-uwire' into spi-next
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Fixes the following build error introduced by commit b3f6a57506
("spi: omap-uwire: use devm_ functions"):
drivers/spi/spi-omap-uwire.c:465:2: error: implicit declaration of function ‘devm_ioremap’
Since we are including <linux/io.h>, <asm/io.h> is no longer
needed. Remove it.
Signed-off-by: Sachin Kamat <sachin.kamat@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Signed-off-by: Mark Brown <broonie@linaro.org>
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This patch introduces the use of devm_clk_get and devm_ioremap instead
of the unmanaged interfaces and removes the corresponding free function
calls.
Signed-off-by: Himangi Saraogi <himangi774@gmail.com>
Acked-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Mark Brown <broonie@linaro.org>
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ret is unused when CONFIG_FSL_SOC defined,
so return ret instead of -ENOMEM when the
kzalloc fails to avoid it.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Olof Johansson pointed out that usually the company name is picked as
namespace prefix to specific properties. So expect "energymicro,location"
but fall back to the previously introduced name "efm32,location".
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Allow probing the dw-mmio from devicetree.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
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'spi/topic/cleanup' and 'spi/topic/davinci' into spi-next
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Rework Davinci SPI driver to store GPIO CS number in cs_gpio field
of SPI device structure (spi_device) for both DT and non-DT cases.
This will make Davinci SPI driver code simpler and allows to reuse
more SPI core functionality.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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Currently driver supports only configuration of GPIO CS through
platform data. This patch enhances the driver to configure GPIO
CS through DT. Also update the DT binding documentation to
reflect the availability of cs-gpios.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
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