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* Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds2023-02-2213-489/+2282
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull SCSI updates from James Bottomley: "Updates to the usual drivers (ufs, lpfc, qla2xxx, libsas). The major core change is a rework to remove the two helpers around scsi_execute_cmd and use it as the only submission interface along with other minor fixes and updates" * tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (142 commits) scsi: ufs: core: Fix an error handling path in ufshcd_read_desc_param() scsi: ufs: core: Fix device management cmd timeout flow scsi: aic94xx: Add missing check for dma_map_single() scsi: smartpqi: Replace one-element array with flexible-array member scsi: mpt3sas: Fix a memory leak scsi: qla2xxx: Remove the unused variable wwn scsi: ufs: core: Fix kernel-doc syntax scsi: ufs: core: Add hibernation callbacks scsi: snic: Fix memory leak with using debugfs_lookup() scsi: ufs: core: Limit DMA alignment check scsi: Documentation: Correct spelling scsi: Documentation: Correct spelling scsi: target: Documentation: Correct spelling scsi: aacraid: Allocate cmd_priv with scsicmd scsi: ufs: qcom: dt-bindings: Add SM8550 compatible string scsi: ufs: ufs-qcom: Clear qunipro_g4_sel for HW version major 5 scsi: ufs: qcom: fix platform_msi_domain_free_irqs() reference scsi: ufs: core: Enable DMA clustering scsi: ufs: exynos: Fix the maximum segment size scsi: ufs: exynos: Fix DMA alignment for PAGE_SIZE != 4096 ...
| * scsi: ufs: core: Fix an error handling path in ufshcd_read_desc_param()Christophe JAILLET2023-02-081-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | If an error occurs, some memory may need to be freed, as in the other error handling paths. Before the commit in the Fixes tag, this test was done before the memory allocation, so there was no issue. Fixes: 16ed9d312b42 ("scsi: ufs: core: Remove ufshcd_map_desc_id_to_length()") Link: https://lore.kernel.org/r/2c6e42205e5ec22e5e8c7c85c6deb8fde31c74da.1673781835.git.christophe.jaillet@wanadoo.fr Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Fix device management cmd timeout flowMason Zhang2023-02-081-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the UFS error handling flow, the host will send a device management cmd (NOP OUT) to the device for link recovery. If this cmd times out and clearing the doorbell fails, ufshcd_wait_for_dev_cmd() will do nothing and return. hba->dev_cmd.complete struct is not set to NULL. When this happens, if cmd has been completed by device, then we will call complete() in __ufshcd_transfer_req_compl(). Because the complete struct is allocated on the stack, the following crash will occur: ipanic_die+0x24/0x38 [mrdump] die+0x344/0x748 arm64_notify_die+0x44/0x104 do_debug_exception+0x104/0x1e0 el1_dbg+0x38/0x54 el1_sync_handler+0x40/0x88 el1_sync+0x8c/0x140 queued_spin_lock_slowpath+0x2e4/0x3c0 __ufshcd_transfer_req_compl+0x3b0/0x1164 ufshcd_trc_handler+0x15c/0x308 ufshcd_host_reset_and_restore+0x54/0x260 ufshcd_reset_and_restore+0x28c/0x57c ufshcd_err_handler+0xeb8/0x1b6c process_one_work+0x288/0x964 worker_thread+0x4bc/0xc7c kthread+0x15c/0x264 ret_from_fork+0x10/0x30 Link: https://lore.kernel.org/r/20221216032532.1280-1-mason.zhang@mediatek.com Signed-off-by: Mason Zhang <Mason.Zhang@mediatek.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Fix kernel-doc syntaxBart Van Assche2023-02-081-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following kernel-doc warnings: drivers/ufs/core/ufs-mcq.c:87: warning: Function parameter or member 'hba' not described in 'ufshcd_mcq_config_mac' drivers/ufs/core/ufs-mcq.c:87: warning: Function parameter or member 'max_active_cmds' not described in 'ufshcd_mcq_config_mac' drivers/ufs/core/ufs-mcq.c:107: warning: Function parameter or member 'hba' not described in 'ufshcd_mcq_req_to_hwq' drivers/ufs/core/ufs-mcq.c:107: warning: Function parameter or member 'req' not described in 'ufshcd_mcq_req_to_hwq' drivers/ufs/core/ufs-mcq.c:128: warning: Function parameter or member 'hba' not described in 'ufshcd_mcq_decide_queue_depth' Link: https://lore.kernel.org/r/20230202220155.561115-1-bvanassche@acm.org Fixes: 854f84e7feeb ("scsi: ufs: core: mcq: Find hardware queue to queue request") Fixes: 2468da61ea09 ("scsi: ufs: core: mcq: Configure operation and runtime interface") Fixes: 7224c806876e ("scsi: ufs: core: mcq: Calculate queue depth") Cc: Asutosh Das <quic_asutoshd@quicinc.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Asutosh Das <quic_asutoshd@quicinc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Add hibernation callbacksAnjana Hari2023-02-082-1/+58
| | | | | | | | | | | | | | | | | | | | Add freeze, thaw, and restore callbacks for hibernate and restore functionality. Link: https://lore.kernel.org/r/20230202161045.3956-2-quic_ahari@quicinc.com Signed-off-by: Anjana Hari <quic_ahari@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Limit DMA alignment checkBjorn Andersson2023-02-081-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The three DMA memory regions allocated for the host memory space are documented to require alignment of 128, 1024, and 1024 respectively, but the returned address is checked for PAGE_SIZE alignment. In the case where these allocations are serviced by e.g. the Arm SMMU, the size and alignment will be determined by its supported page sizes. In most cases SZ_4K and a few larger sizes are available. In the typical configuration this does not cause problems, but in the event that the system PAGE_SIZE is increased beyond 4k, it's no longer reasonable to expect that the allocation will be PAGE_SIZE aligned. Limit the DMA alignment check to the actual alignment requirements written in the comments in the code, to avoid the UFS core refusing to initialize with such configuration. Link: https://lore.kernel.org/r/20230201034917.1902330-1-quic_bjorande@quicinc.com Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Asutosh Das <quic_asutoshd@quicinc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: ufs-qcom: Clear qunipro_g4_sel for HW version major 5Abel Vesa2023-02-082-3/+11
| | | | | | | | | | | | | | | | | | On SM8550, depending on the Qunipro, we can run with G5 or G4. For now, when the major version is 5 or above, we go with G5. Therefore, we need to specifically tell UFS HC that. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: qcom: fix platform_msi_domain_free_irqs() referenceArnd Bergmann2023-02-032-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The newly added MSI support is mostly hidden inside of an #ifdef, except for one line that now causes a build failure when MSI is disabled: drivers/ufs/host/ufs-qcom.c: In function 'ufs_qcom_remove': drivers/ufs/host/ufs-qcom.c:1698:9: error: implicit declaration of function 'platform_msi_domain_free_irqs' [-Werror=i] 1698 | platform_msi_domain_free_irqs(hba->dev); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Above that, the symbol that guards the other call was recently removed, so that is all dead code at the moment. Remove the incorrect #ifdef and instead of a Kconfig dependency to only allow building the driver when CONFIG_GENERIC_MSI_IRQ is enabled. This symbol is always present when PCI_MSI or ARM_GIC_V3_ITS are enabled, both of which should be present on kernels that can run on Qualcomm SoCs. The 'select RESET_CONTROLLER' in combination with this dependency unfortunately causes a dependency loop and this is a user-visible symbol, so it's better to change both to 'depends on'. Link: https://lore.kernel.org/r/20230126211831.2274211-1-arnd@kernel.org Fixes: 519b6274a777 ("scsi: ufs: qcom: Add MCQ ESI config vendor specific ops") Fixes: 13e7accb81d6 ("genirq: Get rid of GENERIC_MSI_IRQ_DOMAIN") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Enable DMA clusteringBart Van Assche2023-01-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All UFS host controllers support DMA clustering. Hence enable DMA clustering. Notes: - The max_segment_size parameter implements the 256 KiB limit for the PRDT. The dma_boundary parameter represents a boundary that must not be crossed by DMA scatter/gather lists. I'm not aware of any restrictions on DMA scatter/gather lists in the UFSHCI specification other than the 256 KiB limit for the PRDT and the 32-bit address restriction for controllers that only support 32-bits DMA. The latter restriction is already handled by ufshcd_set_dma_mask(). - Without patch "scsi: ufs: exynos: Fix the maximum segment size", this patch breaks support for the Exynos controller. The history of the dma_boundary parameter in the UFS driver is as follows: * The initial UFS driver did not set the dma_boundary parameter. * Commit 4dd4130a722f ("scsi: make sure all drivers set the use_clustering flag") set the .use_clustering flag. * Commit 4af14d113bcf ("scsi: remove the use_clustering flag") removed the use_clustering flag and set the dma_boundary parameter instead. Cc: Avri Altman <avri.altman@wdc.com> Cc: Alim Akhtar <alim.akhtar@samsung.com> Cc: Kiwoong Kim <kwmad.kim@samsung.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: exynos: Fix the maximum segment sizeBart Van Assche2023-01-231-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prepare for enabling DMA clustering and also for supporting PAGE_SIZE != 4096 by declaring explicitly that the maximum segment size is 4096 bytes for Exynos UFS host controllers. Add this code in exynos_ufs_hce_enable_notify() such that it happens after scsi_host_alloc() and before __scsi_init_queue() is called by the LUN scanning code. Cc: Alim Akhtar <alim.akhtar@samsung.com> Cc: Kiwoong Kim <kwmad.kim@samsung.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: exynos: Fix DMA alignment for PAGE_SIZE != 4096Bart Van Assche2023-01-232-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Exynos UFS controller only supports scatter/gather list elements that are aligned on a 4 KiB boundary. Fix DMA alignment in case PAGE_SIZE != 4096. Rename UFSHCD_QUIRK_ALIGN_SG_WITH_PAGE_SIZE into UFSHCD_QUIRK_4KB_DMA_ALIGNMENT. Cc: Kiwoong Kim <kwmad.kim@samsung.com> Fixes: 2b2bfc8aa519 ("scsi: ufs: Introduce a quirk to allow only page-aligned sg entries") Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: qcom: Add MCQ ESI config vendor specific opsCan Guo2023-01-132-0/+102
| | | | | | | | | | | | | | | | | | | | Add MCQ ESI config vendor specific ops. Co-developed-by: Asutosh Das <quic_asutoshd@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: mcq: Add Event Specific Interrupt enable and config functionsCan Guo2023-01-131-0/+16
| | | | | | | | | | | | | | | | | | | | Add and export two functions to enable ESI and config ESI base addresses. The calls to these exported functions will be added by the next patch in this series. Signed-off-by: Can Guo <quic_cang@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Add Event Specific Interrupt configuration vendor specific opsCan Guo2023-01-132-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | As Event Specific Interrupt message format is not defined in UFSHCI JEDEC specs, and the ESI handling highly depends on how the format is designed, hence add a vendor specific ops such that SoC vendors can configure their own ESI handlers. If ESI vops is not provided or returning error, go with the legacy (central) interrupt way. Signed-off-by: Can Guo <quic_cang@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: mcq: Enable multi-circular queueAsutosh Das2023-01-131-0/+6
| | | | | | | | | | | | | | | | | | | | Enable MCQ in the Host Controller. Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: mcq: Add completion support in pollAsutosh Das2023-01-133-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Complete CQE requests in poll. Assumption is that several poll completion may happen in different CPUs for the same completion queue. Hence a spin lock protection is added. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: mcq: Add completion support of a CQEAsutosh Das2023-01-135-0/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for completing requests from Completion Queue. Some host controllers support vendor specific registers that provide a bitmap of all CQs which have at least one completed CQE. Add this support. The MCQ specification doesn't provide the Task Tag or its equivalent in the Completion Queue Entry. So use an indirect method to find the Task Tag from the Completion Queue Entry. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Prepare for completion in MCQAsutosh Das2023-01-132-31/+51
| | | | | | | | | | | | | | | | | | | | | | | | Modify completion path APIs and add completion queue entry. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: mcq: Find hardware queue to queue requestAsutosh Das2023-01-133-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support to find the hardware queue on which the request would be queued. Since the very first queue is to serve device commands, an offset of 1 is added to the index of the hardware queue. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Prepare ufshcd_send_command() for MCQAsutosh Das2023-01-133-11/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support to send commands using multiple submission queues in MCQ mode. Modify the functions that use ufshcd_send_command(). Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: mcq: Use shared tags for MCQ modeAsutosh Das2023-01-132-12/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable shared tags for MCQ. For UFS, this should not have a huge performance impact. It however simplifies the MCQ implementation and reuses most of the existing code in the issue and completion path. Also add multiple queue mapping to map_queue(). Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: mcq: Configure operation and runtime interfaceAsutosh Das2023-01-134-0/+164
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Runtime and operation registers are defined per Submission and Completion queue. The location of these registers is not defined in the spec; meaning the offsets and stride may vary for different HC vendors. Establish the stride, base address, and doorbell address offsets from vendor host driver and program it. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: mcq: Allocate memory for MCQ modeAsutosh Das2023-01-133-5/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To read the bqueuedepth, the device descriptor is fetched in Single Doorbell Mode. This allocated memory may not be enough for MCQ mode because the number of tags supported in MCQ mode may be larger than in SDB mode. Hence, release the memory allocated in SDB mode and allocate memory for MCQ mode operation. Define the UFS hardware queue and Completion Queue Entry. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: mcq: Calculate queue depthAsutosh Das2023-01-135-1/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UFS device defines the supported queuedepth by bqueuedepth which has a max value of 256. The HC defines MAC (Max Active Commands) that defines the max number of commands that in flight to the UFS device. Calculate and configure the nutrs based on both these values. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: mcq: Configure resource regionsAsutosh Das2023-01-133-0/+112
| | | | | | | | | | | | | | | | | | | | | | | | Define the MCQ resources and add support to ioremap the resource regions. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: mcq: Add support to allocate multiple queuesAsutosh Das2023-01-134-1/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Multi-circular queue (MCQ) has been added in UFSHC v4.0 standard in addition to the Single Doorbell mode. The MCQ mode supports multiple submission and completion queues. Add support to allocate and configure the queues. Add module parameters support to configure the queues. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Defer adding host to SCSI if MCQ is supportedAsutosh Das2023-01-131-4/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | If MCQ support is present, enabling it after MCQ support has been configured would require reallocating tags and memory. It would also free up the already allocated memory in Single Doorbell Mode. So defer invoking scsi_add_host() until MCQ is configured. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Introduce multi-circular queue capabilityAsutosh Das2023-01-131-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | Add support to check for MCQ capability in the UFSHC. Add a module parameter to disable MCQ if needed. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: Probe for EXT_IID supportAsutosh Das2023-01-131-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Task Tag is limited to 8 bits and this restricts the number of active I/Os to 255. In multi-circular queue mode, this may not be enough. The specification provides EXT_IID which can be used to increase the number of I/Os if the UFS device and UFSHC support it. This patch adds support to probe for EXT_IID support in UFS device and UFSHC. Co-developed-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Can Guo <quic_cang@quicinc.com> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Avri Altman <avri.altman@wdc.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * scsi: ufs: core: bsg: Fix sometimes-uninitialized warningsBean Huo2023-01-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compilation complains that two possible variables are used without initialization: drivers/ufs/core/ufs_bsg.c:112:6: warning: variable 'sg_cnt' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized] drivers/ufs/core/ufs_bsg.c:112:6: warning: variable 'sg_list' is used uninitialized whenever 'if' condition is false [-Wsometimes-uninitialized] Fix both warnings by adding initialization with sg_cnt = 0, sg_list = NULL. Fixes: 6ff265fc5ef6 ("scsi: ufs: core: bsg: Add advanced RPMB support in ufs_bsg") Signed-off-by: Bean Huo <beanhuo@micron.com> Reported-by: kernel test robot <lkp@intel.com> Reported-by: Xiaosen He <quic_xiaosenh@quicinc.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * Merge patch series "ufs: qcom: Add HS-G4 support"Martin K. Petersen2023-01-114-130/+181
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> says: This series adds HS-G4 support to the Qcom UFS driver and PHY driver. The newer Qcom platforms support configuring the UFS controller and PHY in dual gears (i.e., controller/PHY can be configured to run in two gear speeds). This is accomplished by adding two different PHY init sequences to the PHY driver and the UFS driver requesting the one that's required based on the platform configuration. Initially the ufs-qcom driver will use the default gear G2 for enumerating the UFS device. Afer enumeration, the max gear supported by both the controller and device would be found out and that will be used thereafter. But for using the max gear after enumeration, the ufs-qcom driver requires the UFS device to be reinitialized. For this purpose, a separate quirk has been introduced in the UFS core along with a callback and those will be used by the ufs-qcom driver. This series has been tested on following platforms: * Qcom RB5 development platform powered by SM8250 SoC * SM8450 based dev board * Qdrive3/sa8540p-ride board based on SC8280XP (derivative) Link: https://lore.kernel.org/r/20221222141001.54849-1-manivannan.sadhasivam@linaro.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: ufs-qcom: Add support for finding max gear on new platformsManivannan Sadhasivam2023-01-112-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting from Qcom UFS version 4.0, vendor specific REG_UFS_PARAM0 register can be used to determine the maximum gear supported by the controller. Suggested-by: Can Guo <quic_cang@quicinc.com> Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: ufs-qcom: Add support for reinitializing the UFS deviceManivannan Sadhasivam2023-01-112-4/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting from Qualcomm UFS version 4, the UFS device needs to be reinitialized after switching to maximum gear by the UFS core. Hence, add support for it by enabling the UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH quirk, implementing reinit_notify() callback and using the agreed gear speed for setting the PHY mode. Suggested-by: Can Guo <quic_cang@quicinc.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: ufs-qcom: Factor out the logic finding the HS GearManivannan Sadhasivam2023-01-111-13/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the preparation of adding support for new gears, move the logic that finds the gear for each platform to a new function. This helps with code readability and also allows the logic to be used in other places of the driver in future. While at it, make it clear that this driver only supports symmetric gear setting (hs_tx_gear == hs_rx_gear). Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: core: Add support for reinitializing the UFS deviceManivannan Sadhasivam2023-01-111-16/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some platforms like Qcom, requires the UFS device to be reinitialized after switching to maximum gear speed. So add support for that in UFS core by introducing a new quirk (UFSHCD_CAP_REINIT_AFTER_MAX_GEAR_SWITCH) and doing the reinitialization, if the quirk is enabled by the controller driver. Suggested-by: Can Guo <quic_cang@quicinc.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: core: Add reinit_notify() callbackManivannan Sadhasivam2023-01-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | reinit_notify() callback can be used by the UFS controller drivers to perform changes required for UFSHCD reinit that can happen during max gear switch. Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: ufs-qcom: Fix the Qcom register name for offset 0xD0Manivannan Sadhasivam2023-01-111-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On newer UFS revisions, the register at offset 0xD0 is called, REG_UFS_PARAM0. Since the existing register, RETRY_TIMER_REG is not used anywhere, it is safe to use the new name. Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Asutosh Das <quic_asutoshd@quicinc.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: ufs-qcom: Use dev_err_probe() for printing probe errorManivannan Sadhasivam2023-01-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make use of dev_err_probe() for printing the probe error. Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Asutosh Das <quic_asutoshd@quicinc.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: ufs-qcom: Use bitfields where appropriateManivannan Sadhasivam2023-01-111-33/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use bitfield macros where appropriate to simplify the driver. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Asutosh Das <quic_asutoshd@quicinc.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: ufs-qcom: Remove unnecessary WARN_ON()Manivannan Sadhasivam2023-01-111-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the reset assert and deassert callbacks, the supplied "id" is not used at all and only the HBA reset is performed all the time. So there is no reason to use a WARN_ON() on the "id". Reviewed-by: Andrew Halaney <ahalaney@redhat.com> Reviewed-by: Asutosh Das <quic_asutoshd@quicinc.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: ufs-qcom: Remove unnecessary goto statementsManivannan Sadhasivam2023-01-111-57/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A goto statement in an error path is useful if the function needs to do cleanup other than returning the error code. But in this driver, goto statements are used for just returning the error code in many places. This really makes it hard to read the code. Get rid of those goto statements and just return the error code directly. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Asutosh Das <quic_asutoshd@quicinc.com> Tested-by: Andrew Halaney <ahalaney@redhat.com> # Qdrive3/sa8540p-ride Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * | scsi: ufs: ufs-unisoc: Add support for Unisoc UFS host controllerZhe Wang2023-01-114-0/+556
| |/ | | | | | | | | | | | | | | | | Add driver code for Unisoc UFS host controller, along with UFS initialization. Signed-off-by: Zhe Wang <zhe.wang1@unisoc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * Merge patch series "scsi: ufs: core: Always read the descriptors with max ↵Martin K. Petersen2022-12-304-90/+27
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | length" Arthur Simchaev <Arthur.Simchaev@wdc.com> says: Read any descriptor with a maximum size of QUERY_DESC_MAX_SIZE. According to the spec the device returns the actual size. Thus can improve code readability and save CPU cycles. While at it, clean up few leftovers around the descriptor size parameter. Link: https://lore.kernel.org/r/1670763911-8695-1-git-send-email-Arthur.Simchaev@wdc.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: core: Remove ufshcd_map_desc_id_to_length()Arthur Simchaev2022-12-302-13/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There shouldn't be any restriction of the descriptor size (not the descriptor id for that matter) up to QUERY_DESC_MAX_SIZE. According to the spec, the caller can use any descriptor size, and it is up to the device to return the actual size. Therefore there shouldn't be any sizes hardcoded in the kernel, nor any need to cache it, hence the ufshcd_map_desc_id_to_length() function is redundant. Always read the descriptors with QUERY_DESC_MAX_SIZE size. Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Bean Huo <beanhuo@micron.com> Suggested-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Arthur Simchaev <Arthur.Simchaev@wdc.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: core: Remove len parameter from ufshcd_set_active_icc_lvl()Arthur Simchaev2022-12-301-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | len argument is not used anymore in ufshcd_set_active_icc_lvl() function. Signed-off-by: Arthur Simchaev <Arthur.Simchaev@wdc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Bean Huo <beanhuo@micron.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: core: Remove redundant desc_size variable from hbaArthur Simchaev2022-12-304-70/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Always read the descriptor with QUERY_DESC_MAX_SIZE. According to the spec, the device returns the actual size. Signed-off-by: Arthur Simchaev <Arthur.Simchaev@wdc.com> Reviewed-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * scsi: ufs: core: Remove redundant wb checkArthur Simchaev2022-12-301-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We used to use the extended-feature field in the device descriptor as an indication that the device supported UFS 2.2 or later. Remove that as this check is specifically done few lines above. Signed-off-by: Arthur Simchaev <Arthur.Simchaev@wdc.com> Reviewed-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Bean Huo <beanhuo@micron.com> Reviewed-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| * | Merge patch series "Prepare for upstreaming Pixel 6 and 7 UFS support"Martin K. Petersen2022-12-302-25/+38
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bart Van Assche <bvanassche@acm.org> says: The patches in this series are a first step towards integrating support in the upstream kernel for the UFS controller in the Pixel 6 and 7. [mkp: resolve conflict with RPMB series] Link: https://lore.kernel.org/r/20221208234358.252031-1-bvanassche@acm.org Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * | scsi: ufs: core: Allow UFS host drivers to override the sg entry sizeEric Biggers2022-12-302-21/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify the UFSHCD core to allow 'struct ufshcd_sg_entry' to be variable-length. The default is the standard length, but variants can override ufs_hba::sg_entry_size with a larger value if there are vendor-specific fields following the standard ones. This is needed to support inline encryption with ufs-exynos (FMP). Cc: Eric Biggers <ebiggers@google.com> Reviewed-by: Avri Altman <avri.altman@wdc.com> Signed-off-by: Eric Biggers <ebiggers@google.com> [ bvanassche: edited commit message and introduced CONFIG_SCSI_UFS_VARIABLE_SG_ENTRY_SIZE ] Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
| | * | scsi: ufs: core: Pass the clock scaling timeout as an argumentBart Van Assche2022-12-301-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prepare for adding an additional ufshcd_clock_scaling_prepare() call with a different timeout. Reviewed-by: Avri Altman <avri.altman@wdc.com> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-15 18:46:25 +0000