Commit message (Collapse) | Author | Age | Files | Lines | |
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* | usb: dwc3: drop HAVE_CLK dependency from Exynos glue layer | Felipe Balbi | 2012-10-19 | 1 | -13/+1 |
| | | | | | | | | | | commit 93abe8e (clk: add non CONFIG_HAVE_CLK routines) added clk API stubs when !defined(CONFIG_HAVE_CLK). This allows us to remove the HAVE_CLK dependency from Exynos' glue layer and let it compile always. Signed-off-by: Felipe Balbi <balbi@ti.com> | ||||
* | usb: dwc3: Add Exynos Specific Glue layer | Anton Tikhomirov | 2012-03-02 | 1 | -0/+13 |
| | | | | | | | | | | | Adds Exynos Specific Glue layer to support USB peripherals on Samsung Exynos5 chips. [ balbi@ti.com : prevent compilation of Exynos glue layer on platforms which don't provide clk API implementation ] Signed-off-by: Anton Tikhomirov <av.tikhomirov@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com> | ||||
* | usb: dwc3: always compile gadget side too | Felipe Balbi | 2011-12-12 | 1 | -5/+1 |
| | | | | | | | We can decide in runtime if that will be used or not. Signed-off-by: Felipe Balbi <balbi@ti.com> | ||||
* | usb: dwc3: add xHCI Host support | Felipe Balbi | 2011-12-12 | 1 | -0/+2 |
| | | | | | | | | The Designware USB3 IP can be configured with an internal xHCI. If we're running on such a version, let's start the xHCI stack. Signed-off-by: Felipe Balbi <balbi@ti.com> | ||||
* | usb: Introduce DesignWare USB3 DRD Driver | Felipe Balbi | 2011-08-22 | 1 | -0/+36 |
The DesignWare USB3 is a highly configurable IP Core which can be instantiated as Dual-Role Device (DRD), Peripheral Only and Host Only (XHCI) configurations. Several other parameters can be configured like amount of FIFO space, amount of TX and RX endpoints, amount of Host Interrupters, etc. The current driver has been validated with a virtual model of version 1.73a of that core and with an FPGA burned with version 1.83a of the DRD core. We have support for PCIe bus, which is used on FPGA prototyping, and for the OMAP5, more adaptation (or glue) layers can be easily added and the driver is half prepared to handle any possible configuration the HW engineer has chosen considering we have the information on one of the GHWPARAMS registers to do runtime checking of certain features. More runtime checks can, and should, be added in order to make this driver even more flexible with regards to number of endpoints, FIFO sizes, transfer types, etc. While this supports only the device side, for now, we will add support for Host side (xHCI - see the updated series Sebastian has sent [1]) and OTG after we have it all stabilized. [1] http://marc.info/?l=linux-usb&m=131341992020339&w=2 Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> |