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path: root/drivers/usb/dwc3/core.c
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* usb: dwc3: core: remove unnecessary dev_warn()Felipe Balbi2015-07-291-2/+0
| | | | | | | | | | | | | | | | When a SoC supports both PHY interfaces but doesn't define HSPHY in DT/pdata, we will get an unnecessary dev_warn() which can mislead users into thinking that they're missing something. Instead, let's just silently rely on a correct default. If the HW default is wrong, then HSPHY is required and USB won't work, this will be motivation enough for engineers to patch their way into a working setup. Reported-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: core: avoid NULL pointer dereferenceFelipe Balbi2015-07-061-2/+4
| | | | | | | | | | | | | | commit 3e10a2ce98d1 ("usb: dwc3: add hsphy_interface property") introduced a possible NULL pointer dereference because dwc->hsphy_interface can be NULL. In order to fix it, all we have to do is guard strncmp() against a NULL argument. Fixes: 3e10a2ce98d1 ("usb: dwc3: add hsphy_interface property") Tested-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add ULPI interface supportHeikki Krogerus2015-05-131-3/+31
| | | | | | | | | Registers DWC3's ULPI interface with the ULPI bus when it's available. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add hsphy_interface propertyHeikki Krogerus2015-05-131-0/+20
| | | | | | | | | | | Platforms that have configured DWC_USB3_HSPHY_INTERFACE with value 3, i.e. UTMI+ and ULPI, need to inform the driver of the actual HSPHY interface type with the property. "utmi" if the interface is UTMI+ or "ulpi" if the interface is ULPI. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: setup phys earlierHeikki Krogerus2015-05-131-6/+2
| | | | | | | | | | | | | | | | | | | | This allows dwc3_phy_setup() to be more useful later. There is nothing preventing the PHY configuration registers from being programmed early. They do not loose their context in soft reset. There are however other PHY related operations that should be executed before the driver request handles to the PHYs, such as registering DWC3's ULPI interface, which can now be done in dwc3_phy_setup(). Also, if there ever was need for the two 100ms delays in dwc3_phy_setup() there isn't anymore. The PHYs are now reset after the PHY interfaces are setup. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: soft reset to it's own functionHeikki Krogerus2015-05-131-16/+30
| | | | | | | | So it can be called from other places later. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: cache hwparams earlierHeikki Krogerus2015-05-131-2/+1
| | | | | | | | So they are available when ULPI interface support is added. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: store driver data earlierHeikki Krogerus2015-05-131-1/+2
| | | | | | | | | We need to store it before phys are handled, so we can later use it in ULPI interface support code. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: make LPM configurable in DTRobert Baldyga2015-03-101-0/+3
| | | | | | | | | | | | This patch removes "Enable USB3 LPM Capability" option from Kconfig and adds snps,usb3_lpm_capable devicetree property instead of it. USB3 LPM (Link Power Management) capability is hardware property, and it's platform dependent, so if our hardware supports this feature, we want rather to configure it in devicetree than having it as Kconfig option. Signed-off-by: Robert Baldyga <r.baldyga@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: core: only reset res->start in case of errorFelipe Balbi2015-03-091-22/+34
| | | | | | | | | | | That trick is only needed if we end up with an error, so there's no point in messing that outside of an error path. In fact doing so causes problems when removing dwc3.ko, problems which commit c5a1fbc (usb: dwc3: dwc3-omap: Fix the crash on module removal) mistakenly tried to fix. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: remove reliance on dev_vdbg()Felipe Balbi2015-01-271-1/+1
| | | | | | | | By moving all dev_vdbg() to tracepoints, we can finally get rid of dev_vdbg() usage from dwc3. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: core: enable phy suspend quirk on non-FPGAFelipe Balbi2014-11-061-2/+2
| | | | | | | | | as it turns out, at least AM437x silicon (non-FPGA) needs to enable PHY suspend quirk. So let's allow for PHY suspend quirk to be used with non-FPGA builds too. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: make HIRD threshold configurableHuang Rui2014-11-031-0/+17
| | | | | | | | | | | | | | | HIRD threshold should be configurable by different platforms. From DesignWare databook: When HIRD_Threshold[4] is set to 1b1 and HIRD value is greater than or equal to the value in HIRD_Threshold[3:0], dwc3 asserts output signals utmi_l1_suspend_n to put PHY into Deep Low-Power mode in L1. When HIRD_Threshold[4] is set to 1b0 or the HIRD value is less than HIRD_Threshold[3:0], dwc3 asserts output signals utmi_sleep_n on L1. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add disable usb2 suspend phy quirkHuang Rui2014-11-031-0/+6
| | | | | | | | This patch adds disable usb2 suspend phy quirk, and some special platforms can configure that if it is needed. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add disable usb3 suspend phy quirkHuang Rui2014-11-031-0/+6
| | | | | | | | This patch adds disable usb3 suspend phy quirk, and some special platforms can configure that if it is needed. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add Tx de-emphasis quirkHuang Rui2014-11-031-0/+17
| | | | | | | | | | | | | | | | This patch adds Tx de-emphasis quirk, and the Tx de-emphasis value is configurable according to PIPE3 specification. Value Description 0 -6dB de-emphasis 1 -3.5dB de-emphasis 2 No de-emphasis 3 Reserved It can be configured on DT or platform data. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: set SUSPHY bit for all coresHuang Rui2014-11-031-0/+24
| | | | | | | | It is recommended to set USB3 and USB2 SUSPHY bits to '1' after the core initialization is completed above the dwc3 revision 1.94a. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add rx_detect to polling lfps quirkHuang Rui2014-11-031-0/+6
| | | | | | | | | | This patch adds RX_DETECT to Polling.LFPS control quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add lfps filter quirkHuang Rui2014-11-031-0/+6
| | | | | | | | | | This patch adds LFPS filter quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add delay phy power change quirkHuang Rui2014-11-031-0/+6
| | | | | | | | | | | This patch adds delay PHY power change from P0 to P1/P2/P3 when link state changing from U0 to U1/U2/U3 respectively, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add delay p1p2p3 quirkHuang Rui2014-11-031-0/+6
| | | | | | | | | | This patch adds delay P0 to P1/P2/P3 quirk for U2/U2/U3, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add request p1p2p3 quirkHuang Rui2014-11-031-0/+6
| | | | | | | | | | This patch adds request P1/P2/P3 quirk for U2/U2/U3, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add P3 in U2 SS inactive quirkHuang Rui2014-11-031-0/+23
| | | | | | | | | | This patch adds P3 in U2 SS inactive quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add u2exit lfps quirkHuang Rui2014-11-031-0/+6
| | | | | | | | | | This patch adds u2exit lfps quirk, and some special platforms can configure that if it is needed. [ balbi@ti.com : added DeviceTree binding documentation ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add lpm erratum supportHuang Rui2014-11-031-1/+15
| | | | | | | | | | | | | | | | | | When parameter DWC_USB3_LPM_ERRATA_ENABLE is enabled in Andvanced Configuration of coreConsultant, it supports of xHCI BESL Errata Dated 10/19/2011 is enabled in host mode. In device mode it adds the capability to send NYET response threshold based on the BESL value received in the LPM token, and the threhold is configurable for each soc platform. This patch adds an entry that soc platform is able to define the lpm capacity with their own device tree or bus glue layer. [ balbi@ti.com : added devicetree documentation, spelled threshold completely, made sure threshold is only applied to proper core revisions. ] Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add disscramble quirkHuang Rui2014-11-031-1/+13
| | | | | | | | This patch adds disscramble quirk, and it only needs to be enabled at fpga board on some vendor platforms. Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add a flag to check if it is fpga boardHuang Rui2014-11-031-0/+6
| | | | | | | | | | | | | | | | | | | | Some chip vendor is on pre-silicon phase, which needs to use the simulation board. It should have the same product and vendor id with the true soc, but might have some minor different configurations. Below thread discussion proposes to find a method to distinguish between simulation board and soc. http://marc.info/?l=linux-usb&m=141194772206369&w=2 In Andvanced Configuration of coreConsultant, there is the parameter of DWC_USB_EN_FPGA. This bit has the function we need. And it would response as 7 bit of GHWPARAMS6 register. So it's able to check this functional bit to confirm if works on FPGA board. Reported-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: enable hibernation if to be supportedHuang Rui2014-11-031-0/+6
| | | | | | | | It enables hibernation if the function is set in coreConsultant. Suggested-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: get rid of ->prepare()/->complete()Felipe Balbi2014-11-031-48/+2
| | | | | | | | | | | Using ->prepare()/->complete() to mask/unmask IRQs is wrong at least for dwc3. We need to make sure that by the end of ->resume(), IRQs are working and ready to fire because a child device may need working IRQs for its own ->resume() method. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add ACPI supportHeikki Krogerus2014-11-031-0/+13
| | | | | | | Adding ACPI ID used on newer Intel SoCs. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: core: only setting the dma_mask when neededHeikki Krogerus2014-11-031-3/+5
| | | | | | | | If the probe drivers have already set the dma_mask, not replacing the value. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: core: write LINUX_VERSION_CODE to our GUID registerFelipe Balbi2014-11-031-0/+7
| | | | | | | | | | | | | | | DWC3's GUID register is supposed to be used to write any sort of version we might want. It helps when getting bug reports for platforms you don't have HW to know which kernel version of the driver was running on the platform. Because we don't really track driver version, but we _do_ track the kernel version, let's write LINUX_VERSION_CODE to that register and use it for debugging. Reviewed-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* Merge tag 'v3.17-rc5' into nextFelipe Balbi2014-09-161-6/+7
|\ | | | | | | | | | | | | | | | | | | Linux 3.17-rc5 Signed-off-by: Felipe Balbi <balbi@ti.com> Conflicts: Documentation/devicetree/bindings/usb/mxs-phy.txt drivers/usb/phy/phy-mxs-usb.c
| * usb: dwc3: core: fix ordering for PHY suspendFelipe Balbi2014-09-031-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | We can't suspend the PHYs before dwc3_core_exit_mode() has been called, that's because the host and/or device sides might still need to communicate with the far end link partner. Fixes: 8ba007a (usb: dwc3: core: enable the USB2 and USB3 phy in probe) Cc: <stable@vger.kernel.org> # v3.9+ Suggested-by: Alan Stern <stern@rowland.harvard.edu> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * usb: dwc3: core: fix order of PM runtime callsFelipe Balbi2014-09-031-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, we disable pm_runtime before all register accesses are done, this is dangerous and might lead to abort exceptions due to the driver trying to access a register which is clocked by a clock which was long gated. Fix that by moving pm_runtime_put_sync() and pm_runtime_disable() as the last thing we do before returning from our ->remove() method. Fixes: 72246da (usb: Introduce DesignWare USB3 DRD Driver) Cc: <stable@vger.kernel.org> # v3.2+ Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: remove unnecessary OOM messagesJingoo Han2014-08-201-6/+3
|/ | | | | | | | The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: add support for USB 2.0-only core configurationPaul Zimmerman2014-06-301-0/+7
| | | | | | | | | | | | | | | Newer DWC3 controllers can be built for USB 2.0-only mode, where most of the USB 3.0 circuitry is left out. To support this mode, the driver must limit the speed programmed into the DCFG register to Hi-Speed or lower. Reads and writes to the PIPECTL register are left as-is, since they should be no-ops in USB 2.0-only mode. Calls to phy_init() etc. for the USB3 phy are also left as-is, since the no-op USB3 phy should be used for USB 2.0-only mode controllers. Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: Keeping 'resource' related code togetherVivek Gautam2014-06-301-19/+25
| | | | | | | | | Putting together the code related to getting the 'IORESOURCE_MEM' and assigning the same to dwc->xhci_resources, for increasing the readability. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* Merge tag 'usb-for-v3.16' of ↵Greg Kroah-Hartman2014-05-231-120/+133
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next Felipe writes: usb: patches for v3.16 merge window Not a lot here during this merge window. Mostly we just have the usual miscellaneous patches (removal of unnecessary prints, proper dependencies being added to Kconfig, build warning fixes, new device ID, etc. Other than those, the only important new features are the new support for OS Strings which should help Linux Gadget Drivers behave better under MS Windows. Also Babble Recovery implementation for MUSB on AM335x. Lastly, we also have ARCH_QCOM PHY support though phy-msm. Signed-of-by: Felipe Balbi <balbi@ti.com> Conflicts: drivers/usb/phy/phy-mv-u3d-usb.c
| * usb: dwc3: no need to initialize ret variableAndy Shevchenko2014-05-151-1/+1
| | | | | | | | | | | | | | | | First usage of ret variable will re-write initial value. Thus, there is no need to initialize it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
| * usb: dwc3: core: refactor mode initialization to its own functionFelipe Balbi2014-04-211-66/+67
| | | | | | | | | | | | | | | | Move mode (Host, Peripheral, OTG) initialization to its own function in order to decrease the size of our probe() routine. Signed-off-by: Felipe Balbi <balbi@ti.com>
| * usb: dwc3: core: refactor PHY initializationFelipe Balbi2014-04-161-54/+66
| | | | | | | | | | | | | | | | our probe() routine is too large and we can easily refactor PHY-related code out to another function to make it slightly less painful to read. Signed-off-by: Felipe Balbi <balbi@ti.com>
* | usb: dwc3: core: Fix gadget for system suspend/resumeRoger Quadros2014-04-161-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During system resume, if the event buffers are not setup before the gadget controller starts then we start with invalid context and this can lead to bus access errors. This is especially true for platforms that loose the controller context during system suspend. e.g. AM437x. The following backtrace was found when the system is suspended and resumed with g_zero loaded on AM437x-evm (USB cable connected to host all the while). [ 120.981506] WARNING: CPU: 0 PID: 1656 at drivers/bus/omap_l3_noc.c:137 l3_interrupt_handler+0x198/0x28c() [ 120.981514] L3 custom error: MASTER:USB0 WR TARGET:GPMC [ 120.981638] Modules linked in: g_mass_storage usb_f_mass_storage libcomposite configfs bufferclass_ti(O) omaplfb(O) cryptodev(O) dwc3 snd_soc_evm snd_soc_omap snd_pe [ 120.981659] CPU: 0 PID: 1656 Comm: sh Tainted: G O 3.12.10-gc559824 #1 [ 120.981669] Backtrace: [ 120.981705] [<c0017880>] (dump_backtrace+0x0/0x10c) from [<c0017a1c>] (show_stack+0x18/0x1c) [ 120.981730] r6:c02819ac r5:00000009 r4:ec137cb8 r3:00000000 [ 120.981767] [<c0017a04>] (show_stack+0x0/0x1c) from [<c056c0b0>] (dump_stack+0x20/0x28) [ 120.981802] [<c056c090>] (dump_stack+0x0/0x28) from [<c0046d08>] (warn_slowpath_common+0x70/0x90) [ 120.981830] [<c0046c98>] (warn_slowpath_common+0x0/0x90) from [<c0046dcc>] (warn_slowpath_fmt+0x38/0x40) [ 120.981856] r8:c0855eb0 r7:00000002 r6:f1000700 r5:00000007 r4:80080003 [ 120.981886] [<c0046d94>] (warn_slowpath_fmt+0x0/0x40) from [<c02819ac>] (l3_interrupt_handler+0x198/0x28c) [ 120.981900] r3:c0801ab8 r2:c06cb354 [ 120.981936] [<c0281814>] (l3_interrupt_handler+0x0/0x28c) from [<c007162c>] (handle_irq_event_percpu+0x54/0x1b8) [ 120.981962] [<c00715d8>] (handle_irq_event_percpu+0x0/0x1b8) from [<c00717c0>] (handle_irq_event+0x30/0x40) [ 120.981993] [<c0071790>] (handle_irq_event+0x0/0x40) from [<c0074058>] (handle_fasteoi_irq+0x74/0x128) [ 120.982006] r4:ed0056c0 r3:00000000 [ 120.982033] [<c0073fe4>] (handle_fasteoi_irq+0x0/0x128) from [<c0070f34>] (generic_handle_irq+0x28/0x38) [ 120.982046] r4:0000002a r3:c0073fe4 [ 120.982085] [<c0070f0c>] (generic_handle_irq+0x0/0x38) from [<c0015560>] (handle_IRQ+0x38/0x8c) [ 120.982098] r4:c080137c r3:00000182 [ 120.982124] [<c0015528>] (handle_IRQ+0x0/0x8c) from [<c00087e0>] (gic_handle_irq+0x30/0x5c) [ 120.982145] r6:ec137dd0 r5:c07ac480 r4:fa24010c r3:00000100 [ 120.982169] [<c00087b0>] (gic_handle_irq+0x0/0x5c) from [<c056fcc0>] (__irq_svc+0x40/0x54) [ 120.982179] Exception stack(0xec137dd0 to 0xec137e18) [ 120.982195] 7dc0: 00000000 a00001d3 00000000 00000004 [ 120.982216] 7de0: a0000153 ec1d9010 c080de90 ec137e30 c080debc 00000000 ed756e44 ec137e2c [ 120.982232] 7e00: ec137de0 ec137e18 bf1150e4 bf115474 60000153 ffffffff [ 120.982253] r7:ec137e04 r6:ffffffff r5:60000153 r4:bf115474 [ 120.982327] [<bf115438>] (dwc3_complete+0x0/0x40 [dwc3]) from [<c0338f50>] (dpm_complete+0xd4/0x19c) [ 120.982341] r5:ed756e10 r4:ed756e64 [ 120.982370] [<c0338e7c>] (dpm_complete+0x0/0x19c) from [<c0339034>] (dpm_resume_end+0x1c/0x20) [ 120.982400] [<c0339018>] (dpm_resume_end+0x0/0x20) from [<c006d4ec>] (suspend_devices_and_enter+0x118/0x33c) [ 120.982412] r4:c0833da4 r3:00000000 [ 120.982436] [<c006d3d4>] (suspend_devices_and_enter+0x0/0x33c) from [<c006d928>] (pm_suspend+0x218/0x254) [ 120.982458] [<c006d710>] (pm_suspend+0x0/0x254) from [<c006c594>] (state_store+0x70/0xc0) [ 120.982478] r6:c057a6cc r5:c06a8320 r4:00000003 r3:0000006d [ 120.982515] [<c006c524>] (state_store+0x0/0xc0) from [<c0264cc0>] (kobj_attr_store+0x1c/0x28) [ 120.982546] [<c0264ca4>] (kobj_attr_store+0x0/0x28) from [<c012ccb8>] (sysfs_write_file+0x170/0x1a4) [ 120.982583] [<c012cb48>] (sysfs_write_file+0x0/0x1a4) from [<c00d17e4>] (vfs_write+0xb8/0x190) [ 120.982611] [<c00d172c>] (vfs_write+0x0/0x190) from [<c00d1bf8>] (SyS_write+0x44/0x78) [ 120.982641] [<c00d1bb4>] (SyS_write+0x0/0x78) from [<c0014660>] (ret_fast_syscall+0x0/0x30) Signed-off-by: Roger Quadros <rogerq@ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: adapt dwc3 core to use Generic PHY FrameworkKishon Vijay Abraham I2014-03-051-3/+77
| | | | | | | | | | | | Adapted dwc3 core to use the Generic PHY Framework. So for init, exit, power_on and power_off the following APIs are used phy_init(), phy_exit(), phy_power_on() and phy_power_off(). However using the old USB phy library wont be removed till the PHYs of all other SoC's using dwc3 core is adapted to the Generic PHY Framework. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: core: support optional PHYsKishon Vijay Abraham I2014-03-051-20/+14
| | | | | | | | | | | | | | | Since PHYs for dwc3 is optional (not all SoCs having PHYs for DWC3 should be programmed), do not return from probe if the USB PHY library returns -ENODEV as that indicates the platform does not have a programmable PHY. While this can be considered as a temporary fix, a long term solution would be to add 'nop' PHY for platforms that does not have programmable PHY. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: core: allocate scratch buffersFelipe Balbi2014-03-051-0/+105
| | | | | | | | | | | We must read HWPARAMS4 register to figure out how many scratch buffers we should allocate. Later patch will use "Set Scratchpad Buffer Array" command to pass the pointer to the IP so it can be used during hibernation. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: workaround: clock gating issuesFelipe Balbi2014-03-051-9/+27
| | | | | | | | | | | | | | | | | Revisions between 2.10a and 2.50a (included) have a known issue which may cause xHCI compliance tests to fail and/or quality issues with Isochronous transactions. Note that this issue only impacts certain configurations of those revisions, namely the ones which have clock gating enabled. The suggested workaround is to disable clock gating in known broken revisions, make sure HW LPM is disabled and set GCTL.SOFITPSYNC to 1. Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: power off usb phy in error pathKishon Vijay Abraham I2013-11-251-0/+2
| | | | | | | | usb phy was power'ed on but was never power'ed off in the error path. Fix it. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: invoke phy_resume after phy_initKishon Vijay Abraham I2013-11-251-3/+3
| | | | | | | | usb_phy_set_suspend(phy, 0) is called before usb_phy_init. Fix it. Reported-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
* usb: dwc3: core: use pm_runtime_put_sync() on removeFelipe Balbi2013-10-111-1/+1
| | | | | | | | We are going to disable runtime_pm and we're removing the driver, we must disable the device now. Signed-off-by: Felipe Balbi <balbi@ti.com>
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