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* Merge branch 'master' of ↵Linus Torvalds2007-07-1612-69/+665
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6 * 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: (26 commits) [SPARC64]: Fix UP build. [SPARC64]: dr-cpu unconfigure support. [SERIAL]: Fix console write locking in sparc drivers. [SPARC64]: Give more accurate errors in dr_cpu_configure(). [SPARC64]: Clear cpu_{core,sibling}_map[] in smp_fill_in_sib_core_maps() [SPARC64]: Fix leak when DR added cpu does not bootup. [SPARC64]: Add ->set_affinity IRQ handlers. [SPARC64]: Process dr-cpu events in a kthread instead of workqueue. [SPARC64]: More sensible udelay implementation. [SPARC64]: SMP build fixes. [SPARC64]: mdesc.c needs linux/mm.h [SPARC64]: Fix build regressions added by dr-cpu changes. [SPARC64]: Unconditionally register vio_bus_type. [SPARC64]: Initial LDOM cpu hotplug support. [SPARC64]: Fix setting of variables in LDOM guest. [SPARC64]: Fix MD property lifetime bugs. [SPARC64]: Abstract out mdesc accesses for better MD update handling. [SPARC64]: Use more mearningful names for IRQ registry. [SPARC64]: Initial domain-services driver. [SPARC64]: Export powerd facilities for external entities. ...
| * [SPARC64]: dr-cpu unconfigure support.David S. Miller2007-07-163-2/+6
| | | | | | | | Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: More sensible udelay implementation.David S. Miller2007-07-163-32/+7
| | | | | | | | | | | | | | | | | | | | Take a page from the powerpc folks and just calculate the delay factor directly. Since frequency scaling chips use a system-tick register, the value is going to be the same system-wide. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Fix build regressions added by dr-cpu changes.David S. Miller2007-07-161-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not select HOTPLUG_CPU from SUN_LDOMS, that causes HOTPLUG_CPU to be selected even on non-SMP which is illegal. Only build hvtramp.o when SMP, just like trampoline.o Protect dr-cpu code in ds.c with HOTPLUG_CPU. Likewise move ldom_startcpu_cpuid() to smp.c and protect it and the call site with SUN_LDOMS && HOTPLUG_CPU. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Initial LDOM cpu hotplug support.David S. Miller2007-07-166-5/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Only adding cpus is supports at the moment, removal will come next. When new cpus are configured, the machine description is updated. When we get the configure request we pass in a cpu mask of to-be-added cpus to the mdesc CPU node parser so it only fetches information for those cpus. That code also proceeds to update the SMT/multi-core scheduling bitmaps. cpu_up() does all the work and we return the status back over the DS channel. CPUs via dr-cpu need to be booted straight out of the hypervisor, and this requires: 1) A new trampoline mechanism. CPUs are booted straight out of the hypervisor with MMU disabled and running in physical addresses with no mappings installed in the TLB. The new hvtramp.S code sets up the critical cpu state, installs the locked TLB mappings for the kernel, and turns the MMU on. It then proceeds to follow the logic of the existing trampoline.S SMP cpu bringup code. 2) All calls into OBP have to be disallowed when domaining is enabled. Since cpus boot straight into the kernel from the hypervisor, OBP has no state about that cpu and therefore cannot handle being invoked on that cpu. Luckily it's only a handful of interfaces which can be called after the OBP device tree is obtained. For example, rebooting, halting, powering-off, and setting options node variables. CPU removal support will require some infrastructure changes here. Namely we'll have to process the requests via a true kernel thread instead of in a workqueue. workqueues run on a per-cpu thread, but when unconfiguring we might need to force the thread to execute on another cpu if the current cpu is the one being removed. Removal of a cpu also causes the kernel to destroy that cpu's workqueue running thread. Another issue on removal is that we may have interrupts still pointing to the cpu-to-be-removed. So new code will be needed to walk the active INO list and retarget those cpus as-needed. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Fix setting of variables in LDOM guest.David S. Miller2007-07-161-0/+2
| | | | | | | | | | | | | | | | | | There is a special domain services capability for setting variables in the OBP options node. Guests don't have permanent store for the OBP variables like a normal system, so they are instead maintained in the LDOM control node or in the SC. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Fix MD property lifetime bugs.David S. Miller2007-07-162-4/+25
| | | | | | | | | | | | | | | | | | | | Property values cannot be referenced outside of mdesc_grab()/mdesc_release() pairs. The only major offender was the VIO bus layer, easily fixed. Add some commentary to mdesc.h describing these rules. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Abstract out mdesc accesses for better MD update handling.David S. Miller2007-07-162-42/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we have to be able to handle MD updates, having an in-tree set of data structures representing the MD objects actually makes things more painful. The MD itself is easy to parse, and we can implement the existing interfaces using direct parsing of the MD binary image. The MD is now reference counted, so accesses have to now take the form: handle = mdesc_grab(); ... operations on MD ... mdesc_release(handle); The only remaining issue are cases where code holds on to references to MD property values. mdesc_get_property() returns a direct pointer to the property value, most cases just pull in the information they need and discard the pointer, but there are few that use the pointer directly over a long lifetime. Those will be fixed up in a subsequent changeset. A preliminary handler for MD update events from domain services is there, it is rudimentry but it works and handles all of the reference counting. It does not check the generation number of the MDs, and it does not generate a "add/delete" list for notification to interesting parties about MD changes but that will be forthcoming. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Use more mearningful names for IRQ registry.David S. Miller2007-07-161-1/+1
| | | | | | | | | | | | | | | | | | All of the interrupts say "LDX RX" and "LDX TX" currently which is next to useless. Put a device specific prefix before "RX" and "TX" instead which makes it much more useful. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Export powerd facilities for external entities.David S. Miller2007-07-161-0/+7
| | | | | | | | | | | | | | | | Besides the existing usage for power-button interrupts, we'll want to make use of this code for domain-services where the LDOM manager can send reboot requests to the guest node. Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Assorted LDC bug cures.David S. Miller2007-07-161-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1) LDC_MODE_RELIABLE is deprecated an unused by anything, plus it and LDC_MODE_STREAM were mis-numbered. 2) read_stream() should try to read as much as possible into the per-LDC stream buffer area, so do not trim the read_nonraw() length by the caller's size parameter. 3) Send data ACKs when necessary in read_nonraw(). 4) In read_nonraw() when we get a pure ACK, advance the RX head unconditionally past it. 5) Provide the ACKID field in the ldcdgb() packet dump in read_nonraw(). This helps debugging stream mode LDC channel problems. 6) Decrease verbosity of rx_data_wait() so that it is more useful. A debugging message each loop iteration is too much. 7) In process_data_ack() stop the loop checking when we hit lp->tx_tail not lp->tx_head. 8) Set the seqid field properly in send_data_nack(). Signed-off-by: David S. Miller <davem@davemloft.net>
| * [SPARC64]: Add LDOM virtual channel driver and VIO device layer.David S. Miller2007-07-162-0/+538
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Virtual devices on Sun Logical Domains are built on top of a virtual channel framework. This, with help of hypervisor interfaces, provides a link layer protocol with basic handshaking over which virtual device clients and servers communicate. Built on top of this is a VIO device protocol which has it's own handshaking and message types. At this layer attributes are exchanged (disk size, network device addresses, etc.) descriptor rings are registered, and data transfers are triggers and replied to. Signed-off-by: David S. Miller <davem@davemloft.net>
* | Introduce compat_u64 and compat_s64 typesArnd Bergmann2007-07-161-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | One common problem with 32 bit system call and ioctl emulation is the different alignment rules between i386 and 64 bit machines. A number of drivers work around this by marking the compat structures as 'attribute((packed))', which is not the right solution because it breaks all the non-x86 architectures that want to use the same compat code. Hopefully, this patch improves the situation, it introduces two new types, compat_u64 and compat_s64. These are defined on all architectures to have the same size and alignment as the 32 bit version of u64 and s64. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: David S. Miller <davem@davemloft.net> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Andi Kleen <ak@suse.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Vasily Tarasov <vtaras@openvz.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | page table handling cleanupJan Beulich2007-07-161-18/+0
|/ | | | | | | | | | | | Kill pte_rdprotect(), pte_exprotect(), pte_mkread(), pte_mkexec(), pte_read(), pte_exec(), and pte_user() except where arch-specific code is making use of them. Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Christoph Hellwig <hch@infradead.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* PCI: remove pci_dac_dma_... APIsJan Beulich2007-07-111-43/+0
| | | | | | | | | | | | | | | | | | Based on replies to a respective query, remove the pci_dac_dma_...() APIs (except for pci_dac_dma_supported() on Alpha, where this function is used in non-DAC PCI DMA code). Signed-off-by: Jan Beulich <jbeulich@novell.com> Cc: Andi Kleen <ak@suse.de> Cc: Jesse Barnes <jesse.barnes@intel.com> Cc: Christoph Hellwig <hch@infradead.org> Acked-by: David Miller <davem@davemloft.net> Cc: Jeff Garzik <jeff@garzik.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* PCI: Use a weak symbol for the empty version of pcibios_add_platform_entries()Michael Ellerman2007-07-111-4/+0
| | | | | | | | | | | | | | | I'm not sure if this is going to fly, weak symbols work on the compilers I'm using, but whether they work for all of the affected architectures I can't say. I've cc'ed as many arch maintainers/lists as I could find. But assuming they do, we can use a weak empty definition of pcibios_add_platform_entries() to avoid having an empty definition on every arch. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [SPARC64]: Add linux/pagemap.h to asm/tlb.hAlexey Dobriyan2007-06-281-0/+1
| | | | | | | | | | | | | | As seen on sparc64-allnoconfig: CC arch/sparc64/mm/tlb.o In file included from arch/sparc64/mm/tlb.c:19: include/asm/tlb.h: In function 'tlb_flush_mmu': include/asm/tlb.h:60: warning: implicit declaration of function 'release_pages' include/asm/tlb.h: In function 'tlb_remove_page': include/asm/tlb.h:92: warning: implicit declaration of function 'page_cache_release' Signed-off-by: Alexey Dobriyan <adobriyan@sw.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Add irqs to mdesc_node.David S. Miller2007-06-261-0/+1
| | | | | | Will be used to store translated LDC rx-ino and tx-ino. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix args to sun4v_ldc_revoke().David S. Miller2007-06-131-3/+5
| | | | | | | First argument is LDC channel ID, then mapping cookie, then the MTE revoke cookie. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Really fix parport.David S. Miller2007-06-132-30/+17
| | | | | | | | | | | We were passing a "struct pci_dev *" instead of a "struct device *" to the parport registry routines. No wonder things exploded. The ebus_bus_type hacks can be backed out from asm-sparc64/dma-mapping.h, those were wrong. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Wire up cookie based sun4v interrupt registry.David S. Miller2007-06-131-0/+1
| | | | | | This will be used for logical domain channel interrupts. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fill in gaps in non-PCI dma_*() NOP implementation.David S. Miller2007-06-041-0/+83
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix {mc,smt}_capable().David S. Miller2007-06-042-4/+3
| | | | | | | It's not just sun4v hypervisor platforms that should return true for this, sun4u with UltraSPARC-IV should return true too. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Proper multi-core scheduling support.David S. Miller2007-06-043-4/+12
| | | | | | | | | | The scheduling domain hierarchy is: all cpus --> cpus that share an instruction cache --> cpus that share an integer execution unit Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Provide mmu statistics via sysfs.David Miller2007-06-041-0/+5
| | | | | | | | | | | | | | | If the system supports hypervisor based statistics, allow them to be fetched, enabled, and disabled via sysfs. Enable and disable via the boolean: /sys/devices/systems/cpu/cpuN/mmustat_enable Statistic values are provided under: /sys/devices/systems/cpu/cpuN/mmu_status/ Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Add missing NCS and SVC hypervisor interfaces.David S. Miller2007-05-311-0/+168
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fill holes in hypervisor APIs and fix KTSB registry.David S. Miller2007-05-291-47/+593
| | | | | | | | | | | Several interfaces were missing and others misnumbered or improperly documented. Also, make sure to check the return value when registering the kernel TSBs with the hypervisor. This helped to find the 4MB kernel TSB alignment bug fixed in a previous changeset. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Fix two bugs wrt. kernel 4MB TSB.David S. Miller2007-05-291-1/+1
| | | | | | | | | | | | 1) The TSB lookup was not using the correct hash mask. 2) It was not aligned on a boundary equal to it's size, which is required by the sun4v Hypervisor. wasn't having it's return value checked, and that bug will be fixed up as well in a subsequent changeset. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Eliminate NR_CPUS limitations.David S. Miller2007-05-292-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | Cheetah systems can have cpuids as large as 1023, although physical systems don't have that many cpus. Only three limitations existed in the kernel preventing arbitrary NR_CPUS values: 1) dcache dirty cpu state stored in page->flags on D-cache aliasing platforms. With some build time calculations and some build-time BUG checks on page->flags layout, this one was easily solved. 2) The cheetah XCALL delivery code could only handle a cpumask with up to 32 cpus set. Some simple looping logic clears that up too. 3) thread_info->cpu was a u8, easily changed to a u16. There are a few spots in the kernel that still put NR_CPUS sized arrays on the kernel stack, but that's not a sparc64 specific problem. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Use machine description and OBP properly for cpu probing.David S. Miller2007-05-298-14/+69
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Report proper system soft state to the hypervisor.David S. Miller2007-05-294-6/+27
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Kill unused DIE_PAGE_FAULT enum value.Christoph Hellwig2007-05-291-1/+0
| | | | | | | | sparc64 got rid of the pagefault notifiers, so the enum value for them can go away aswell. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Add hypervisor API negotiation and fix console bugs.David S. Miller2007-05-151-1/+82
| | | | | | | | | | | | | | | | | | | | | | | Hypervisor interfaces need to be negotiated in order to use some API calls reliably. So add a small set of interfaces to request API versions and query current settings. This allows us to fix some bugs in the hypervisor console: 1) If we can negotiate API group CORE of at least major 1 minor 1 we can use con_read and con_write which can improve console performance quite a bit. 2) When we do a console write request, we should hold the spinlock around the whole request, not a byte at a time. What would happen is that it's easy for output from different cpus to get mixed with each other. 3) Use consistent udelay() based polling, udelay(1) each loop with a limit of 1000 polls to handle stuck hypervisor console. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Accept ebus_bus_type for generic DMA ops.David S. Miller2007-05-141-14/+30
| | | | | | Based upon a bug report by Meelis Roos. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC]: Wire up signalfd/timerfd/eventfd syscalls.David S. Miller2007-05-111-1/+4
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* Consolidate asm/poll.hStephen Rothwell2007-05-111-13/+1
| | | | | | | | | | | | | These files are almost all the same. This patch could be made even simpler if we don't mind POLLREMOVE turning up in a few architectures that didn't have it previously (which should be OK as POLLREMOVE is not used anywhere in the current tree). Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Cc: <linux-arch@vger.kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6Linus Torvalds2007-05-101-1/+1
|\ | | | | | | | | | | | | | | | | * master.kernel.org:/pub/scm/linux/kernel/git/davem/sparc-2.6: [SPARC64]: Use alloc_pci_dev() in PCI bus probes. [SPARC64]: Bump PROMINTR_MAX to 32. [SPARC64]: Fix recursion in PROM tree building. [SERIAL] sunzilog: Interrupt enable before ISR handler installed [SPARC64] PCI: Consolidate PCI access code into pci_common.c
| * [SPARC64]: Bump PROMINTR_MAX to 32.David S. Miller2007-05-101-1/+1
| | | | | | | | | | | | | | Some devices have more than 15 which was the previous setting. Signed-off-by: David S. Miller <davem@davemloft.net>
* | Remove hardcoding of hard_smp_processor_id on UP systemsFernando Luis Vazquez Cao2007-05-091-0/+1
|/ | | | | | | | | | | | | | | | | | | | With the advent of kdump, the assumption that the boot CPU when booting an UP kernel is always the CPU with a particular hardware ID (often 0) (usually referred to as BSP on some architectures) is not valid anymore. The reason being that the dump capture kernel boots on the crashed CPU (the CPU that invoked crash_kexec), which may be or may not be that particular CPU. Move definition of hard_smp_processor_id for the UP case to architecture-specific code ("asm/smp.h") where it belongs, so that each architecture can provide its own implementation. Signed-off-by: Fernando Luis Vazquez Cao <fernando@oss.ntt.co.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Acked-by: Andi Kleen <ak@suse.de> Cc: "Eric W. Biederman" <ebiederm@xmission.com> Cc: Vivek Goyal <vgoyal@in.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* [SPARC64]: Optimize fault kprobe handling just like powerpc.David S. Miller2007-05-082-3/+14
| | | | | | And eliminate DIE_GPF while we're at it. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC]: Wire up utimensat syscall.David S. Miller2007-05-081-1/+2
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Kill asm-sparc64/pbm.hDavid S. Miller2007-05-081-132/+0
| | | | | | Everything it contains can be hidden in pci_impl.h Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Move index info pci_pbm_info.David S. Miller2007-05-081-5/+1
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Move {setup,teardown}_msi_irq into pci_pbm_info.David S. Miller2007-05-081-7/+3
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64]: Move pci_ops into pci_pbm_info.David S. Miller2007-05-081-3/+1
| | | | Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64] PCI: Use root list of pbm's instead of pci_controller_info'sDavid S. Miller2007-05-081-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The idea is to move more and more things into the pbm, with the eventual goal of eliminating the pci_controller_info entirely as there really isn't any need for it. This stage of the transformations requires some reworking of the PCI error interrupt handling. It might be tricky to get rid of the pci_controller_info parenting for a few reasons: 1) When we get an uncorrectable or correctable error we want to interrogate the IOMMU and streaming cache of both PBMs for error status. These errors come from the UPA front-end which is shared between the two PBM PCI bus segments. Historically speaking this is why I choose the datastructure hierarchy of pci_controller_info-->pci_pbm_info 2) The probing does a portid/devhandle match to look for the 'other' pbm, but this is entirely an artifact and can be eliminated trivially. What we could do to solve #1 is to have a "buddy" pointer from one pbm to another. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64] PCI: Kill PROM_PCIRNG_MAX and PROM_PCIIMAP_MAX.David S. Miller2007-05-081-6/+0
| | | | | | They are totally unused. Signed-off-by: David S. Miller <davem@davemloft.net>
* [SPARC64] PCI: Use common routine to fetch PBM properties.David S. Miller2007-05-081-2/+0
| | | | | | | | | | Namely bus-range and ino-bitmap. This allows us also to eliminate pci_controller_info's pci_{first,last}_busno fields as only the pbm ones are used now. Signed-off-by: David S. Miller <davem@davemloft.net>
* Remove tas()Jeff Dike2007-05-081-1/+0
| | | | | | | | | | tas() has no users, so get rid of it. Signed-off-by: Jeff Dike <jdike@linux.intel.com> Cc: <linux-arch@vger.kernel.org> Cc: Paolo 'Blaisorblade' Giarrusso <blaisorblade@yahoo.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* local_t: sparc64 cleanupMathieu Desnoyers2007-05-081-40/+1
| | | | | | | | | sparc64 local_t cleanup : simply use asm-generic/local.h. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca> Cc: "David S. Miller" <davem@davemloft.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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