| Commit message (Collapse) | Author | Age | Files | Lines |
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Modify license to include dual licensing as GPL-2.0-only OR MIT
license for TI specific phy header files. This allows for Linux
kernel files to be used in other Operating System ecosystems
such as Zephyr or FreeBSD.
While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync
with latest SPDX conventions (GPL-2.0 is deprecated).
While at this, update the TI copyright year to sync with current year
to indicate license change.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Trent Piepho <tpiepho@impinj.com>
Cc: Wadim Egorov <w.egorov@phytec.de>
Cc: Kip Broadhurst <kbroadhurst@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
Acked-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
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git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds
Pull LED updates from Lee Jones:
"Core Frameworks:
- Ensure seldom updated triggers have a brightness value before first
update
New Device Support:
- Add support for Simatic IPC Device BX_59A to IPC LEDs Core
- Add support for Qualcomm PMI8950 PWM to LPG Core
New Functionality:
- Add a bunch of new LED function identifiers
- Add support for High Resolution Timers in LED Trigger Patten
Fix-ups:
- Shift out Audio Trigger to the Sound subsystem
- Convert suitable calls to devm_* managed resources
- Device Tree binding adaptions/conversions/creation
- Remove superfluous code/variables/attributes and simplify overall
- Use/convert to new/better APIs/helpers/MACROs instead of
hand-rolling implementations
Bug Fixes:
- Repair enabling Torch Mode from V4L2 on the second LED
- Ensure PWM is disabled when suspending"
* tag 'leds-next-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds: (28 commits)
leds: mt6370: Remove unused field 'reg_cfgs' from 'struct mt6370_priv'
leds: lp50xx: Remove unused field 'num_of_banked_leds' from 'struct lp50xx'
leds: lp50xx: Remove unused field 'bank_modules' from 'struct lp50xx_led'
leds: aat1290: Remove unused field 'torch_brightness' from 'struct aat1290_led'
leds: sun50i-a100: Use match_string() helper to simplify the code
leds: pwm: Disable PWM when going to suspend
leds: trigger: pattern: Add support for hrtimer
leds: mt6360: Fix the second LED can not enable torch mode by V4L2
dt-bindings: leds: leds-qcom-lpg: Add support for PMI8950 PWM
leds: qcom-lpg: Add support for PMI8950 PWM
leds: apu: Remove duplicate DMI lookup data
leds: trigger: netdev: Remove not needed call to led_set_brightness in deactivate
dt-bindings: leds: Add LED_FUNCTION_SPEED_* for link speed on LAN/WAN
dt-bindings: leds: Add LED_FUNCTION_MOBILE for mobile network
leds: simatic-ipc-leds-gpio: Add support for module BX-59A
dt-bindings: leds: qcom-lpg: Document PM6150L compatible
dt-bindings: leds: pca963x: Convert text bindings to YAML
leds: an30259a: Use devm_mutex_init() for mutex initialization
leds: mlxreg: Use devm_mutex_init() for mutex initialization
leds: nic78bx: Use devm API to cleanup module's resources
...
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Add LED_FUNCTION_SPEED_LAN and LED_FUNCTION_SPEED_WAN for LEDs that
indicate link speed of ethernet ports on LAN/WAN. This is useful to
distinguish those LEDs from LEDs that indicate link status (up/down).
example:
Fortinet FortiGate 30E/50E have LEDs that indicate link speed on each
of the ethernet ports in addition to LEDs that indicate link status
(up/down).
- 1000 Mbps: green:speed-(lan|wan)-N
- 100 Mbps: amber:speed-(lan|wan)-N
- 10 Mbps: (none, turned off)
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240323074326.1428-3-musashino.open@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
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Add LED_FUNCTION_MOBILE for LEDs that indicate status of mobile network
connection. This is useful to distinguish those LEDs from LEDs that
indicates status of wired "wan" connection.
example (on stock fw):
IIJ SA-W2 has "Mobile" LEDs that indicate status (no signal, too low,
low, good) of mobile network connection via dongle connected to USB
port.
- no signal: (none, turned off)
- too low: green:mobile & red:mobile (amber, blink)
- low: green:mobile & red:mobile (amber, turned on)
- good: green:mobile (turned on)
Suggested-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240323074326.1428-2-musashino.open@gmail.com
Signed-off-by: Lee Jones <lee@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull generic phy updates from Vinod Koul:
"New HW Support:
- Support for Embedded DisplayPort and DisplayPort submodes and
driver support on Qualcomm X1E80100 edp driver
- Qualcomm QMP UFS PHY for SM8475, QMP USB phy for QDU1000/QRU1000
and eusb2-repeater for SMB2360
- Samsung HDMI PHY for i.MX8MP, gs101 UFS phy
- Mediatek XFI T-PHY support for mt7988
- Rockchip usbdp combo phy driver
Updates:
- Qualcomm x4 lane EP support for sa8775p, v4 ad v6 support for
X1E80100, SM8650 tables for UFS Gear 4 & 5 and correct voltage
swing tables
- Freescale imx8m-pci pcie link-up updates
- Rockchip rx-common-refclk-mode support
- More platform remove callback returning void conversions"
* tag 'phy-for-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (43 commits)
dt-bindings: phy: qcom,usb-snps-femto-v2: use correct fallback for sc8180x
dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: fix msm899[68] power-domains
dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: fix x1e80100-gen3x2 schema
phy: qcpm-qmp-usb: Add support for QDU1000/QRU1000
dt-bindings: phy: qcom,qmp-usb: Add QDU1000 USB3 PHY
dt-bindings: phy: qcom,usb-snps-femto-v2: Add bindings for QDU1000
phy: qcom-qmp-pcie: add x4 lane EP support for sa8775p
phy: samsung-ufs: ufs: exit on first reported error
phy: samsung-ufs: ufs: remove superfluous mfd/syscon.h header
phy: rockchip: fix CONFIG_TYPEC dependency
phy: rockchip: usbdp: fix uninitialized variable
phy: rockchip-snps-pcie3: add support for rockchip,rx-common-refclk-mode
dt-bindings: phy: rockchip,pcie3-phy: add rockchip,rx-common-refclk-mode
phy: rockchip: add usbdp combo phy driver
dt-bindings: phy: add rockchip usbdp combo phy document
phy: add driver for MediaTek XFI T-PHY
dt-bindings: phy: mediatek,mt7988-xfi-tphy: add new bindings
phy: freescale: fsl-samsung-hdmi: Convert to platform remove callback returning void
phy: qcom: qmp-ufs: update SM8650 tables for Gear 4 & 5
MAINTAINERS: Add phy-gs101-ufs file to Tensor GS101.
...
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SM8[456]50 SoCs
The PCIe Gen4x2 PHY found in the SM8[456]50 SoCs have a second clock named
"PHY_AUX_CLK" which is an input of the Global Clock Controller (GCC) which
is muxed & gated then returned to the PHY as an input.
Document the clock IDs to select the PIPE clock or the AUX clock,
also enforce a second clock-output-names and a #clock-cells value of 1
for the PCIe Gen4x2 PHY found in the SM8[456]50 SoCs.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240322-topic-sm8x50-upstream-pcie-1-phy-aux-clk-v2-1-3ec0a966d52f@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox
Pull mailbox updates from Jassi Brar:
- redo the omap driver from legacy to mailbox api
- enable bufferless IPI for zynqmp
- add mhu-v3 driver
- convert from tasklet to BH workqueue
- add qcom MSM8974 APCS compatible IDs
* tag 'mailbox-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox: (24 commits)
dt-bindings: mailbox: qcom-ipcc: Document the SDX75 IPCC
dt-bindings: mailbox: qcom: Add MSM8974 APCS compatible
mailbox: Convert from tasklet to BH workqueue
mailbox: mtk-cmdq: Fix pm_runtime_get_sync() warning in mbox shutdown
mailbox: mtk-cmdq-mailbox: fix module autoloading
mailbox: zynqmp: handle SGI for shared IPI
mailbox: arm_mhuv3: Add driver
dt-bindings: mailbox: arm,mhuv3: Add bindings
mailbox: omap: Remove kernel FIFO message queuing
mailbox: omap: Reverse FIFO busy check logic
mailbox: omap: Remove mbox_chan_to_omap_mbox()
mailbox: omap: Use mbox_controller channel list directly
mailbox: omap: Use function local struct mbox_controller
mailbox: omap: Merge mailbox child node setup loops
mailbox: omap: Use devm_pm_runtime_enable() helper
mailbox: omap: Remove device class
mailbox: omap: Remove unneeded header omap-mailbox.h
mailbox: omap: Move fifo size check to point of use
mailbox: omap: Move omap_mbox_irq_t into driver
mailbox: omap: Remove unused omap_mbox_request_channel() function
...
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Add bindings for the ARM MHUv3 Mailbox controller.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"Core changes:
- Use DEFINE_SHOW_STORE_ATTRIBUTE() in debugfs entries
New drivers:
- Qualcomm PMIH0108, PMD8028, PMXR2230 and PM6450 pin control support
Improvements:
- Serious cleanup of the recently merged aw9523 driver
- Fix PIN_CONFIG_BIAS_DISABLE handling in pinctrl-single
- A slew of device tree binding cleanups
- Support a bus clock in the Samsung driver"
* tag 'pinctrl-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits)
pinctrl: bcm2835: Make pin freeing behavior configurable
dt-bindings: pinctrl: qcom,pmic-gpio: Fix "comptaible" typo for PMIH0108
pinctrl: qcom: pinctrl-sm7150: Fix sdc1 and ufs special pins regs
dt-bindings: pinctrl: mediatek: mt7622: add "antsel" function
dt-bindings: pinctrl: mediatek: mt7622: fix array properties
pinctrl: samsung: drop redundant drvdata assignment
pinctrl: samsung: support a bus clock
dt-bindings: pinctrl: samsung: google,gs101-pinctrl needs a clock
pinctrl: renesas: rzg2l: Limit 2.5V power supply to Ethernet interfaces
pinctrl: renesas: r8a779h0: Add INTC-EX pins, groups, and function
pinctrl: renesas: r8a779h0: Fix IRQ suffixes
pinctrl: renesas: rzg2l: Remove extra space in function parameter
dt-bindings: pinctrl: qcom,pmic-mpp: add support for PM8901
pinctrl: pinconf-generic: print hex value
pinctrl: realtek: fix module autoloading
pinctrl: qcom: sm7150: fix module autoloading
pinctrl: loongson2: fix module autoloading
pinctrl: mediatek: fix module autoloading
pinctrl: freescale: imx8ulp: fix module autoloading
dt-bindings: pinctrl: qcom,pmic-gpio: Allow gpio-hog nodes
...
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The bindings header for Samsung pin controller DTS pin values (holding
register values in fact) was deprecated in v6.1 kernel in
commit 9d9292576810 ("dt-bindings: pinctrl: samsung: deprecate header
with register constants"). This was enough of time for users to switch
to in-DTS headers, so drop the bindings header.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240312164428.692552-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"I'm actually surprised this time. There aren't any new Qualcomm SoC
clk drivers. And there's zero diff in the core clk framework.
Instead we have new clk drivers for STM and Sophgo, with
Samsung^WGoogle in third for the diffstat because they introduced HSI0
and HSI2 clk drivers for Google's GS101 SoC (high speed interface
things like PCIe, UFS, and MMC).
Beyond those big diffs there's the usual updates to various clk
drivers for incorrect parent descriptions or mising
MODULE_DEVICE_TABLE()s, etc. Nothing in particular stands out as super
interesting here.
New Drivers:
- STM32MP257 SoC clk driver
- Airoha EN7581 SoC clk driver
- Sophgo CV1800B, CV1812H and SG2000 SoC clk driver
- Loongson-2k0500 and Loongson-2k2000 SoC clk driver
- Add HSI0 and HSI2 clock controllers for Google GS101
- Add i.MX95 BLK CTL clock driver
Updates:
- Allocate clk_ops dynamically for SCMI clk driver
- Add support in qcom RCG and RCG2 for multiple configurations for
the same frequency
- Use above support for IPQ8074 NSS port 5 and 6 clocks to resolve
issues
- Fix the Qualcomm APSS IPQ5018 PLL to fix boot failures of some
boards
- Cleanups and fixes for Qualcomm Stromer PLLs
- Reduce max CPU frequency on Qualcomm APSS IPQ5018
- Fix Kconfig dependencies of Qualcomm SM8650 GPU and SC8280XP camera
clk drivers
- Make Qualcomm MSM8998 Venus clocks functional
- Cleanup downstream remnants related to DisplayPort across Qualcomm
SM8450, SM6350, SM8550, and SM8650
- Reuse the Huayra APSS register map on Qualcomm MSM8996 CBF PLL
- Use a specific Qualcomm QCS404 compatible for the otherwise generic
HFPLL
- Remove Qualcomm SM8150 CPUSS AHB clk as it is unused
- Remove an unused field in the Qualcomm RPM clk driver
- Add missing MODULE_DEVICE_TABLE to Qualcomm MSM8917 and MSM8953
global clock controller drivers
- Allow choice of manual or firmware-driven control over PLLs, needed
to fully implement CPU clock controllers on Exynos850
- Correct PLL clock IDs on ExynosAutov9
- Propagate certain clock rates to allow setting proper SPI clock
rates on Google GS101
- Mark certain Google GS101 clocks critical
- Convert old S3C64xx clock controller bindings to DT schema
- Add new PLL rate and missing mux on Rockchip rk3568
- Add missing reset line on Rockchip rk3588
- Removal of an unused field in struct rockchip_mmc_clock
- Amlogic s4/a1: add regmap maximum register for proper debugfs dump
- Amlogic s4: add MODULE_DEVICE_TABLE() on pll and periph controllers
- Amlogic pll driver: print clock name on lock error to help debug
- Amlogic vclk: finish dsi clock path support
- Amlogic license: fix occurence "GPL v2" as reported by checkpatch
- Add PM runtime support to i.MX8MP Audiomix
- Add DT schema for i.MX95 Display Master Block Control
- Convert to platform remove callback returning void for i.MX8MP
Audiomix
- Add SPI (MSIOF) and external interrupt (INTC-EX) clocks on Renesas
R-Car V4M
- Add interrupt controller (PLIC) clock and reset on Renesas RZ/Five
- Prepare power domain support for Renesas RZ/G2L family members, and
add actual support on Renesas RZ/G3S SoC
- Add thermal, serial (SCIF), and timer (CMT/TMU) clocks on Renesas
R-Car V4M
- Add additional constraints to Allwinner A64 PLL MIPI clock
- Fix autoloading sunxi-ng clocks when build as a module"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (118 commits)
clk: samsung: Don't register clkdev lookup for the fixed rate clocks
clk, reset: microchip: mpfs: fix incorrect preprocessor conditions
clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs
clk: qcom: apss-ipq-pll: fix PLL rate for IPQ5018
clk: qcom: Fix SM_GPUCC_8650 dependencies
clk: qcom: Fix SC_CAMCC_8280XP dependencies
dt-bindings: clocks: stm32mp25: add access-controllers description
clock, reset: microchip: move all mpfs reset code to the reset subsystem
clk: samsung: gs101: drop unused HSI2 clock parent data
clk: rockchip: rk3568: Add PLL rate for 724 MHz
clk: rockchip: Remove an unused field in struct rockchip_mmc_clock
dt-bindings: clock: fixed: Define a preferred node name
clk: meson: s4: fix module autoloading
clk: samsung: gs101: mark some apm UASC and XIU clocks critical
clk: imx: imx8mp: Convert to platform remove callback returning void
clk: imx: imx8mp: Switch to RUNTIME_PM_OPS()
clk: bcm: rpi: Assign ->num before accessing ->hws
clk: bcm: dvp: Assign ->num before accessing ->hws
clk: samsung: gs101: add support for cmu_hsi2
clk: samsung: gs101: add support for cmu_hsi0
...
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* clk-microchip:
clk, reset: microchip: mpfs: fix incorrect preprocessor conditions
clock, reset: microchip: move all mpfs reset code to the reset subsystem
* clk-samsung:
clk: samsung: Don't register clkdev lookup for the fixed rate clocks
clk: samsung: gs101: drop unused HSI2 clock parent data
clk: samsung: gs101: mark some apm UASC and XIU clocks critical
clk: samsung: gs101: add support for cmu_hsi2
clk: samsung: gs101: add support for cmu_hsi0
dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit
dt-bindings: clock: google,gs101-clock: add HSI0 clock management unit
clk: samsung: gs101: propagate PERIC1 USI SPI clock rate
clk: samsung: gs101: propagate PERIC0 USI SPI clock rate
clk: samsung: exynosautov9: fix wrong pll clock id value
dt-bindings: clock: samsung,s3c6400-clock: convert to DT Schema
clk: samsung: exynos850: Add CMU_CPUCL0 and CMU_CPUCL1
clk: samsung: Implement manual PLL control for ARM64 SoCs
* clk-qcom: (27 commits)
clk: qcom: clk-alpha-pll: fix rate setting for Stromer PLLs
clk: qcom: apss-ipq-pll: fix PLL rate for IPQ5018
clk: qcom: Fix SM_GPUCC_8650 dependencies
clk: qcom: Fix SC_CAMCC_8280XP dependencies
clk: qcom: mmcc-msm8998: fix venus clock issue
clk: qcom: dispcc-sm8650: fix DisplayPort clocks
clk: qcom: dispcc-sm8550: fix DisplayPort clocks
clk: qcom: dispcc-sm6350: fix DisplayPort clocks
clk: qcom: dispcc-sm8450: fix DisplayPort clocks
clk: qcom: clk-cbf-8996: use HUAYRA_APSS register map for cbf_pll
clk: qcom: apss-ipq-pll: constify clk_init_data structures
clk: qcom: apss-ipq-pll: constify match data structures
clk: qcom: apss-ipq-pll: move Huayra register map to 'clk_alpha_pll_regs'
clk: qcom: apss-ipq-pll: reuse Stromer reg offsets from 'clk_alpha_pll_regs'
clk: qcom: apss-ipq-pll: use stromer ops for IPQ5018 to fix boot failure
clk: qcom: gcc-ipq8074: rework nss_port5/6 clock to multiple conf
clk: qcom: clk-rcg2: add support for rcg2 freq multi ops
clk: qcom: clk-rcg: introduce support for multiple conf for same freq
clk: qcom: hfpll: Add QCS404-specific compatible
dt-bindings: clock: qcom,hfpll: Convert to YAML
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'clk-rockchip' into clk-next
* clk-counted:
clk: bcm: rpi: Assign ->num before accessing ->hws
clk: bcm: dvp: Assign ->num before accessing ->hws
* clk-imx:
clk: imx: imx8mp: Convert to platform remove callback returning void
clk: imx: imx8mp: Switch to RUNTIME_PM_OPS()
clk: imx: add i.MX95 BLK CTL clk driver
dt-bindings: clock: support i.MX95 Display Master CSR module
dt-bindings: clock: support i.MX95 BLK CTL module
dt-bindings: clock: add i.MX95 clock header
clk: imx: imx8mp: Add pm_runtime support for power saving
* clk-amlogic:
clk: meson: s4: fix module autoloading
clk: meson: fix module license to GPL only
clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
clk: meson: add vclk driver
clk: meson: pll: print out pll name when unable to lock it
clk: meson: s4: pll: determine maximum register in regmap config
clk: meson: s4: peripherals: determine maximum register in regmap config
clk: meson: a1: pll: determine maximum register in regmap config
clk: meson: a1: peripherals: determine maximum register in regmap config
* clk-binding:
dt-bindings: clock: fixed: Define a preferred node name
* clk-rockchip:
clk: rockchip: rk3568: Add PLL rate for 724 MHz
clk: rockchip: Remove an unused field in struct rockchip_mmc_clock
clk: rockchip: rk3588: Add reset line for HDMI Receiver
clk: rockchip: rk3568: Add missing USB480M_PHY mux
dt-bindings: reset: Define reset id used for HDMI Receiver
dt-bindings: clock: rockchip: add USB480M_PHY mux
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Add reset id used for HDMI Receiver in RK3588 SoCs
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com>
Link: https://lore.kernel.org/r/20240327225057.672304-2-shreeya.patel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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The USB480M clock can source from a MUX that selects the clock to come
from either of the USB-phy internal 480MHz PLLs. These clocks are
provided by the USB phy driver. This adds the define for it.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405-clk-rk3568-usb480m-phy-mux-v1-1-6c89de20a6ff@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Add clock header for i.MX95 BLK CTL modules
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240401-imx95-blk-ctl-v6-1-84d4eca1e759@nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
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clk-next
- STM32MP257 SoC clk driver
- Allocate clk_ops dynamically for SCMI clk driver
* clk-stm:
dt-bindings: clocks: stm32mp25: add access-controllers description
clk: stm32: introduce clocks for STM32MP257 platform
dt-bindings: clocks: stm32mp25: add description of all parents
clk: stm32mp13: use platform device APIs
* clk-renesas:
clk: renesas: r9a08g045: Add support for power domains
clk: renesas: rzg2l: Extend power domain support
dt-bindings: clock: renesas,rzg2l-cpg: Update #power-domain-cells = <1> for RZ/G3S
dt-bindings: clock: r9a08g045-cpg: Add power domain IDs
dt-bindings: clock: r9a07g054-cpg: Add power domain IDs
dt-bindings: clock: r9a07g044-cpg: Add power domain IDs
dt-bindings: clock: r9a07g043-cpg: Add power domain IDs
clk: renesas: shmobile: Remove unused CLK_ENABLE_ON_INIT
clk: renesas: r8a7740: Remove unused div4_clk.flags field
clk: renesas: r9a07g043: Add clock and reset entry for PLIC
clk: renesas: r8a779h0: Add INTC-EX clock
clk: renesas: r8a779h0: Add MSIOF clocks
clk: renesas: r8a779a0: Fix CANFD parent clock
clk: rs9: fix wrong default value for clock amplitude
clk: renesas: r8a779h0: Add timer clocks
clk: renesas: r8a779h0: Add SCIF clocks
clk: renesas: r9a07g044: Mark resets array as const
clk: renesas: r9a07g043: Mark mod_clks and resets arrays as const
clk: renesas: r8a779h0: Add thermal clock
dt-bindings: clock: r9a07g043-cpg: Annotate RZ/G2UL-only core clocks
* clk-scmi:
clk: scmi: Add support for get/set duty_cycle operations
clk: scmi: Add support for re-parenting restricted clocks
clk: scmi: Add support for rate change restricted clocks
clk: scmi: Add support for state control restricted clocks
clk: scmi: Allocate CLK operations dynamically
* clk-allwinner:
clk: sunxi-ng: fix module autoloading
clk: sunxi-ng: a64: Add constraints on PLL-MIPI's n/m ratio and parent rate
clk: sunxi-ng: nkm: Support constraints on m/n ratio and parent rate
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Add power domain IDs for the RZ/G3S (R9A08G045) SoC.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20240422105355.1622177-5-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add power domain IDs for the RZ/V2L (R9A07G054) SoC.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20240422105355.1622177-4-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add power domain IDs for the RZ/G2L (R9A07G044) SoC.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20240422105355.1622177-3-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Add power domain IDs for the RZ/G2UL (R9A07G043) SoC.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20240422105355.1622177-2-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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The M2 (CRU main clock), M3 (LCDC Video Clock), and AT (Cortex-A55 Debug
clock) core clocks are only present on RZ/G2UL, not on RZ/Five.
Annotate this in the comments, like is already done for module clocks
and resets.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/ffcdcd479c76b92f67481836a33ec86e97f85634.1708944903.git.geert+renesas@glider.be
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RCC driver uses '.index' to define all parent clocks instead '.names'
because the use of a name to define a parent clock is discouraged. This
is an ABI change, but the RCC driver has not yet merged, unlike all
others drivers besides Linux.
Fixes: b5be49db3d47 ("dt-bindings: stm32: add clocks and reset binding for stm32mp25 platform")
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240411092453.243633-3-gabriel.fernandez@foss.st.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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In the new Loongson-2K family of SoCs, more clock indexes are needed,
such as clock gates.
The patch adds these clock indexes
Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/76844e0e4dae290425f7c8025f7f36810cb3a3a8.1712731524.git.zhoubinbin@loongson.cn
Acked-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86
Pull x86 platform driver updates from Hans de Goede:
- New drivers/platform/arm64 directory for arm64 embedded-controller
drivers
- New drivers:
- Acer Aspire 1 embedded controllers (for arm64 models)
- ACPI quickstart PNP0C32 buttons
- Dell All-In-One backlight support (dell-uart-backlight)
- Lenovo WMI camera buttons
- Lenovo Yoga Tablet 2 Pro 1380F/L fast charging
- MeeGoPad ANX7428 Type-C Cross Switch (power sequencing only)
- MSI WMI sensors (fan speed sensors only for now)
- Asus WMI:
- 2024 ROG Mini-LED support
- MCU powersave support
- Vivobook GPU MUX support
- Misc. other improvements
- Ideapad laptop:
- Export FnLock LED as LED class device
- Switch platform profiles using thermal management key
- Intel drivers:
- IFS: various improvements
- PMC: Lunar Lake support
- SDSI: various improvements
- TPMI/ISST: various improvements
- tools: intel-speed-select: various improvements
- MS Surface drivers:
- Fan profile switching support
- Surface Pro thermal sensors support
- ThinkPad ACPI:
- Reworked hotkey support to use sparse keymaps
- Add support for new trackpoint-doubletap, Fn+N and Fn+G hotkeys
- WMI core:
- New WMI driver development guide
- x86 Android tablets:
- Lenovo Yoga Tablet 2 Pro 1380F/L support
- Xiaomi MiPad 2 status LED and bezel touch buttons backlight
support
- Miscellaneous cleanups / fixes / improvements
* tag 'platform-drivers-x86-v6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (128 commits)
platform/x86: Add new MeeGoPad ANX7428 Type-C Cross Switch driver
devm-helpers: Fix a misspelled cancellation in the comments
tools arch x86: Add dell-uart-backlight-emulator
platform/x86: Add new Dell UART backlight driver
platform/x86: x86-android-tablets: Create LED device for Xiaomi Pad 2 bottom bezel touch buttons
platform/x86: x86-android-tablets: Xiaomi pad2 RGB LED fwnode updates
platform/x86: x86-android-tablets: Pass struct device to init()
platform/x86/amd: pmc: Add new ACPI ID AMDI000B
platform/x86/amd: pmf: Add new ACPI ID AMDI0105
platform/x86: p2sb: Don't init until unassigned resources have been assigned
platform/surface: aggregator: Log critical errors during SAM probing
platform/x86: ISST: Support SST-BF and SST-TF per level
platform/x86/fujitsu-laptop: Replace sprintf() with sysfs_emit()
tools/power/x86/intel-speed-select: v1.19 release
tools/power/x86/intel-speed-select: Display CPU as None for -1
tools/power/x86/intel-speed-select: SST BF/TF support per level
tools/power/x86/intel-speed-select: Increase number of CPUs displayed
tools/power/x86/intel-speed-select: Present all TRL levels for turbo-freq
tools/power/x86/intel-speed-select: Fix display for unsupported levels
tools/power/x86/intel-speed-select: Support multiple dies
...
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Newer laptops have FnLock LED.
Add a define for this very common function.
Signed-off-by: Gergo Koteles <soyer@irl.hu>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/8ac95e85a53dc0b8cce1e27fc1cab6d19221543b.1712063200.git.soyer@irl.hu
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull thermal control updates from Rafael Wysocki:
"The most significant part of this is a rework of thermal governors,
including a redesign of the thermal governor interface and changes to
make some of them take trip point hysteresis into account properly, as
well as some related cleanups of the thermal governors and thermal
core.
The above is based on preliminary changes refactoring thermal data
structures and moving the definitions of some of them into the thermal
core which also ensure that trip point crossing notifications will be
sent to user space via netlink and recorded in the debug statistics in
temperature order.
In addition, netlink bind/unbind notifications are added to the
thermal core and the Intel HFI driver is modified to use them to avoid
sending netlink messages until there are subscribers.
Apart from that, multiple thermal drivers are updated which includes
new hardware support (MediaTek MT8188 and MT8186, Amlogic A1 thermal
sensor, Loongson-2K2000, Lmh QCM2290), fixes, cleanups and
documentation updates, and the recently added thermal debug code is
fixed and cleaned up.
Specifics:
- Redesign the thermal governor interface to allow the governors to
work in a more straightforward way (Rafael Wysocki)
- Make thermal governors take the current trip point thresholds into
account in their computations which allows trip hysteresis to be
observed more accurately (Rafael Wysocki)
- Make the thermal core manage passive polling for thermal zones and
remove passive polling management from thermal governors (Rafael
Wysocki)
- Refactor trip point representation and move the definition of
thermal governor and thermal zone device structures to the thermal
core (Rafael Wysocki)
- Sort trip point crossing notifications and debug recording of trip
point crossing events by temperature (Rafael Wysocki)
- Improve the handling of cooling device states and thermal
mitigation episodes in progress in the thermal debug code (Rafael
Wysocki)
- Avoid excessive updates of trip point statistics and clean up the
printing of thermal mitigation episode information (Rafael Wysocki)
- Clean up thermal governors and thermal core (Rafael Wysocki)
- Allow thermal drivers to register notifiers that will be invoked on
netlink events like BIND and UNBIND, so that they can adjust their
activity depending on whether or not there are any subscribers of
netlink messages coming from them, and make the Intel HFI driver
use this mechanism (Stanislaw Gruszka)
- Adjust the update delay and capabilities-per-event values in the
Intel HFI thermal driver to prevent it from missing events and
allow it to process more data in one go (Ricardo Neri)
- Add missing MODULE_DESCRIPTION() to multiple files in the
int340x_thermal and intel_soc_dts_iosf drivers (Srinivas
Pandruvada)
- Replace deprecated strncpy() with strscpy() in the int340x_thermal
driver (Justin Stitt)
- Add QCM2290 compatible DT bindings for Lmh and fix a NULL pointer
dereference in the lmh driver when the SCM is not present (Konrad
Dybcio)
- Use the strreplace() function instead of doing it manually in the
Armada driver (Rasmus Villemoes)
- Convert st,stih407-thermal to DT schema and fix up missing
properties (Raphael Gallais-Pou)
- Add suspend/resume by restoring the context of the tsens sensor
(Priyansh Jain)
- Support A1 SoC family Thermal Sensor controller and add the DT
bindings (Dmitry Rokosov)
- Improve the temperature approximation calculation and consolidate
the Tj constant into a shared area of the structure instead of
duplicating it on the Rcar Gen3 (Niklas Söderlund)
- Fix the Mediatek LVTS sensor coefficient for the MT8192 in order to
support it correctly (Hsin-Te Yuan)
- Fix a NULL pointer dereference in the tsens driver when the
function compute_intercept_slope() is called with a NULL parameter
(Aleksandr Mishin)
- Remove some unused fields in struct qpnp_tm_chip and k3_bandgap
(Christophe Jaillet)
- Fix up calibration efuse data decoding, consolidate the code by
checking boundaries and refactor some part of the LVTS Mediatek
driver. After setting the scene, add MT8186 and MT8188 along with
the DT bindings (Nicolas Pitre)
- Add Loongson-2K2000 support after some minor code adjustements and
providing the DT bindings definition (Binbin Zhou)"
* tag 'thermal-6.10-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (72 commits)
thermal: intel: hfi: Increase the number of CPU capabilities per netlink event
thermal: intel: hfi: Rename HFI_MAX_THERM_NOTIFY_COUNT
thermal: intel: hfi: Shorten the thermal netlink event delay to 100ms
thermal: intel: hfi: Rename HFI_UPDATE_INTERVAL
thermal: intel: Add missing module description
thermal: core: Move passive polling management to the core
thermal: core: Do not call handle_thermal_trip() if zone temperature is invalid
thermal: trip: Add missing empty code line
thermal/debugfs: Avoid printing zero duration for mitigation events in progress
thermal/debugfs: Pass cooling device state to thermal_debug_cdev_add()
thermal/debugfs: Create records for cdev states as they get used
thermal: core: Introduce thermal_governor_trip_crossed()
thermal/debugfs: Make tze_seq_show() skip invalid trips and trips with no stats
thermal/debugfs: Rename thermal_debug_update_temp() to thermal_debug_update_trip_stats()
thermal/debugfs: Clean up thermal_debug_update_temp()
thermal/debugfs: Avoid excessive updates of trip point statistics
thermal: core: Relocate critical and hot trip handling
thermal: core: Drop the .throttle() governor callback
thermal: gov_user_space: Use .trip_crossed() instead of .throttle()
thermal: gov_fair_share: Eliminate unnecessary integer divisions
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MT8188
Add LVTS thermal controller definition for MT8188.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20240402032729.2736685-13-nico@fluxnic.net
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MT8186
Add LVTS thermal controller definition for MT8186.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20240402032729.2736685-7-nico@fluxnic.net
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC driver updates from Arnd Bergmann:
"As usual, these are updates for drivers that are specific to certain
SoCs or firmware running on them.
Notable updates include
- The new STMicroelectronics STM32 "firewall" bus driver that is used
to provide a barrier between different parts of an SoC
- Lots of updates for the Qualcomm platform drivers, in particular
SCM, which gets a rewrite of its initialization code
- Firmware driver updates for Arm FF-A notification interrupts and
indirect messaging, SCMI firmware support for pin control and
vendor specific interfaces, and TEE firmware interface changes
across multiple TEE drivers
- A larger cleanup of the Mediatek CMDQ driver and some related bits
- Kconfig changes for riscv drivers to prepare for adding Kanaan k230
support
- Multiple minor updates for the TI sysc bus driver, memory
controllers, hisilicon hccs and more"
* tag 'soc-drivers-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (103 commits)
firmware: qcom: uefisecapp: Allow on sc8180x Primus and Flex 5G
soc: qcom: pmic_glink: Make client-lock non-sleeping
dt-bindings: soc: qcom,wcnss: fix bluetooth address example
soc/tegra: pmc: Add EQOS wake event for Tegra194 and Tegra234
bus: stm32_firewall: fix off by one in stm32_firewall_get_firewall()
bus: etzpc: introduce ETZPC firewall controller driver
firmware: arm_ffa: Avoid queuing work when running on the worker queue
bus: ti-sysc: Drop legacy idle quirk handling
bus: ti-sysc: Drop legacy quirk handling for smartreflex
bus: ti-sysc: Drop legacy quirk handling for uarts
bus: ti-sysc: Add a description and copyrights
bus: ti-sysc: Move check for no-reset-on-init
soc: hisilicon: kunpeng_hccs: replace MAILBOX dependency with PCC
soc: hisilicon: kunpeng_hccs: Add the check for obtaining complete port attribute
firmware: arm_ffa: Fix memory corruption in ffa_msg_send2()
bus: rifsc: introduce RIFSC firewall controller driver
of: property: fw_devlink: Add support for "access-controller"
soc: mediatek: mtk-socinfo: Correct the marketing name for MT8188GV
soc: mediatek: mtk-socinfo: Add entry for MT8395AV/ZA Genio 1200
soc: mediatek: mtk-mutex: Add support for MT8188 VPPSYS
...
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Merge the patches that was picked up for v6.10 before v6.9-rc1 became
available onto v6.9-rc1 to reduce the risk for conflicts etc.
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Add the ID for the Qualcomm X1E80100 SoC.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240223-x1e80100-socinfo-v1-1-be581ca60f27@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.10, part two
Few changes exclusively for Google GS101:
1. Add HSI0 and HSI2 clock controllers (CMUs).
2. Add USB 3.1 Dual Role Device (DRD) support.
3. Add UFS (Universal Flash Storage) support.
4. Document bus clocks in pin controllers necessary for accessing
registers.
* tag 'samsung-dt64-6.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: gs101: specify empty clocks for remaining pinctrl
arm64: dts: exynos: gs101: specify bus clock for pinctrl_hsi2
arm64: dts: exynos: gs101: specify bus clock for pinctrl_peric[01]
arm64: dts: exynos: gs101: specify bus clock for pinctrl (far) alive
arm64: dts: exynos: gs101: enable ufs, phy on oriole & define ufs regulator
arm64: dts: exynos: gs101: Add ufs and ufs-phy dt nodes
arm64: dts: exynos: gs101: Add the hsi2 sysreg node
dt-bindings: soc: google: exynos-sysreg: add dedicated hsi2 sysreg compatible
arm64: dts: exynos: gs101-oriole: enable USB on this board
arm64: dts: exynos: gs101: add USB & USB-phy nodes
arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller
arm64: dts: exynos: gs101: enable cmu-hsi0 clock controller
dt-bindings: clock: google,gs101-clock: add HSI2 clock management unit
dt-bindings: clock: google,gs101-clock: add HSI0 clock management unit
Link: https://lore.kernel.org/r/20240504121233.7589-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add dt schema documentation and clock IDs for the High Speed Interface
2 (HSI2) clock management unit. This CMU feeds high speed interfaces
such as PCIe and UFS.
[AD: * keep CMUs in google,gs101.h sorted alphabetically
* resolve minor merge conflicts in google,gs101-clock.yaml
* s/ufs_embd/ufs s/mmc_card/mmc
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Link: https://lore.kernel.org/r/20240429-hsi0-gs101-v3-1-f233be0a2455@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Add dt-schema documentation and clock IDs for the high speed interface
0 HSI0 clock management unit. This is used (amongst others) for USB.
While the usual (sed) script has been used to derive the linux clock
IDs from the data sheet, one manual tweak was applied to fix a typo
which we don't want to carry:
HSI0_USPDPDBG_USER -> HSI0_USBDPDBG_USER (note USB vs USP).
Signed-off-by: André Draszik <andre.draszik@linaro.org>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240423-hsi0-gs101-v1-1-2c3ddb50c720@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Add device nodes for the Timer Units (TMU) on the R-Mobile APE6 SoC,
and the clocks serving them.
Note that TMU channels 1 and 2 are not added, as their interrupts are
not wired to the interrupt controller for the AP-System Core (INTC-SYS),
only to the interrupt controller for the AP-Realtime Core (INTC-RT).
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/1a60832f3ba37afb4a5791f4e5db4610ab31beb3.1710864964.git.geert+renesas@glider.be
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git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc and other driver subsystem updates from Greg KH:
"Here is the big set of char/misc and a number of other driver
subsystem updates for 6.9-rc1. Included in here are:
- IIO driver updates, loads of new ones and evolution of existing ones
- coresight driver updates
- const cleanups for many driver subsystems
- speakup driver additions
- platform remove callback void cleanups
- mei driver updates
- mhi driver updates
- cdx driver updates for MSI interrupt handling
- nvmem driver updates
- other smaller driver updates and cleanups, full details in the
shortlog
All of these have been in linux-next for a long time with no reported
issue, other than a build warning for the speakup driver"
The build warning hits clang and is a gcc (and C23) extension, and is
fixed up in the merge.
Link: https://lore.kernel.org/all/20240321134831.GA2762840@dev-arch.thelio-3990X/
* tag 'char-misc-6.9-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (279 commits)
binder: remove redundant variable page_addr
uio_dmem_genirq: UIO_MEM_DMA_COHERENT conversion
uio_pruss: UIO_MEM_DMA_COHERENT conversion
cnic,bnx2,bnx2x: use UIO_MEM_DMA_COHERENT
uio: introduce UIO_MEM_DMA_COHERENT type
cdx: add MSI support for CDX bus
pps: use cflags-y instead of EXTRA_CFLAGS
speakup: Add /dev/synthu device
speakup: Fix 8bit characters from direct synth
parport: sunbpp: Convert to platform remove callback returning void
parport: amiga: Convert to platform remove callback returning void
char: xillybus: Convert to platform remove callback returning void
vmw_balloon: change maintainership
MAINTAINERS: change the maintainer for hpilo driver
char: xilinx_hwicap: Fix NULL vs IS_ERR() bug
hpet: remove hpets::hp_clocksource
platform: goldfish: move the separate 'default' propery for CONFIG_GOLDFISH
char: xilinx_hwicap: drop casting to void in dev_set_drvdata
greybus: move is_gb_* functions out of greybus.h
greybus: Remove usage of the deprecated ida_simple_xx() API
...
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Add dt-bindings and interconnect driver support for the Qualcomm SM7150 SoC.
* icc-sm7150
dt-bindings: interconnect: Add Qualcomm SM7150 DT bindings
interconnect: qcom: Add SM7150 driver support
Link: https://lore.kernel.org/r/20240222174250.80493-1-danila@jiaxyga.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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The Qualcomm SM7150 platform has several bus fabrics that could be
controlled and tuned dynamically according to the bandwidth demand.
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240222174250.80493-2-danila@jiaxyga.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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* icc-cleanup
interconnect: qcom: sm8550: Remove bogus per-RSC BCMs and nodes
dt-bindings: interconnect: Remove bogus interconnect nodes
interconnect: qcom: x1e80100: Remove bogus per-RSC BCMs and nodes
interconnect: qcom: sa8775p: constify pointer to qcom_icc_node
interconnect: qcom: sm8250: constify pointer to qcom_icc_node
interconnect: qcom: sm6115: constify pointer to qcom_icc_node
interconnect: qcom: sa8775p: constify pointer to qcom_icc_bcm
interconnect: qcom: x1e80100: constify pointer to qcom_icc_bcm
dt-bindings: interconnect: qcom,rpmh: Fix bouncing @codeaurora address
interconnect: constify of_phandle_args in xlate
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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The downstream kernel has infrastructure for passing votes from different
interconnect nodes onto different RPMh RSCs. This neither implemented, not
is going to be implemented upstream (in favor of a different solution
using ICC tags through the same node).
Unfortunately, as it happens, meaningless (in the upstream context) parts
of the vendor driver were copied, ending up causing havoc - since all
"per-RSC" (in quotes because they all point to the main APPS one) BCMs
defined within the driver overwrite the value in RPMh on every
aggregation.
To both avoid keeping bogus code around and possibly introducing
impossible-to-track-down bugs (busses shutting down for no reason), get
rid of the duplicated ICC node definitions.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240102-topic-x1e_fixes-v1-2-70723e08d5f6@linaro.org
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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Add bindings for Qualcomm MSM8909 Network-On-Chip interconnect devices.
[Stephan: Drop separate mm-snoc that exists downstream since it's
actually the same NoC as SNoC in hardware]
Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Link: https://lore.kernel.org/r/20231220-icc-msm8909-v2-1-3b68bbed2891@kernkonzept.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull more ARM SoC updates from Arnd Bergmann:
"These are changes that for some reason ended up not making it into the
first four branches but that should still make it into 6.9:
- A rework of the omap clock support that touches both drivers and
device tree files
- The reset controller branch changes that had a dependency on late
bugfixes. Merging them here avoids a backmerge of 6.8-rc5 into the
drivers branch
- The RISC-V/starfive, RISC-V/microchip and ARM/Broadcom devicetree
changes that got delayed and needed some extra time in linux-next
for wider testing"
* tag 'soc-late-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (31 commits)
soc: fsl: dpio: fix kcalloc() argument order
bus: ts-nbus: Improve error reporting
bus: ts-nbus: Convert to atomic pwm API
riscv: dts: starfive: jh7110: Add camera subsystem nodes
ARM: bcm: stop selecing CONFIG_TICK_ONESHOT
ARM: dts: omap3: Update clksel clocks to use reg instead of ti,bit-shift
ARM: dts: am3: Update clksel clocks to use reg instead of ti,bit-shift
clk: ti: Improve clksel clock bit parsing for reg property
clk: ti: Handle possible address in the node name
dt-bindings: pwm: opencores: Add compatible for StarFive JH8100
dt-bindings: riscv: cpus: reg matches hart ID
reset: Instantiate reset GPIO controller for shared reset-gpios
reset: gpio: Add GPIO-based reset controller
cpufreq: do not open-code of_phandle_args_equal()
of: Add of_phandle_args_equal() helper
reset: simple: add support for Sophgo SG2042
dt-bindings: reset: sophgo: support SG2042
riscv: dts: microchip: add specific compatible for mpfs pdma
riscv: dts: microchip: add missing CAN bus clocks
ARM: brcmstb: Add debug UART entry for 74165
...
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Add bindings for the reset generator on the SOPHGO SG2042 RISC-V SoC.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/35c348437b6e18972ccaf90d9c38040caccd1f11.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT core:
- Add cleanup.h based auto release of struct device_node pointers via
__free marking and new for_each_child_of_node_scoped() iterator to
use it.
- Always create a base skeleton DT when CONFIG_OF is enabled. This
supports several usecases of adding DT data on non-DT booted
systems.
- Move around some /reserved-memory code in preparation for further
improvements
- Add a stub for_each_property_of_node() for !OF
- Adjust the printk levels on some messages
- Fix __be32 sparse warning
- Drop RESERVEDMEM_OF_DECLARE usage from Freescale qbman driver
(currently orphaned)
- Add Saravana Kannan and drop Frank Rowand as DT maintainers
DT bindings:
- Convert Mediatek timer, Mediatek sysirq, fsl,imx6ul-tsc,
fsl,imx6ul-pinctrl, Atmel AIC, Atmel HLCDC, FPGA region, and
xlnx,sd-fec to DT schemas
- Add existing, but undocumented fsl,imx-anatop binding
- Add bunch of undocumented vendor prefixes used in compatible
strings
- Drop obsolete brcm,bcm2835-pm-wdt binding
- Drop obsolete i2c.txt which as been replaced with schema in
dtschema
- Add DPS310 device and sort trivial-devices.yaml
- Enable undocumented compatible checks on DT binding examples
- More QCom maintainer fixes/updates
- Updates to writing-schema.rst and DT submitting-patches.rst to
cover some frequent review comments
- Clean-up SPDX tags to use 'OR' rather than 'or'"
* tag 'devicetree-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (56 commits)
dt-bindings: soc: imx: fsl,imx-anatop: add imx6q regulators
of: unittest: Use for_each_child_of_node_scoped()
of: Introduce for_each_*_child_of_node_scoped() to automate of_node_put() handling
of: Add cleanup.h based auto release via __free(device_node) markings
of: Move all FDT reserved-memory handling into of_reserved_mem.c
of: Add KUnit test to confirm DTB is loaded
of: unittest: treat missing of_root as error instead of fixing up
x86/of: Unconditionally call unflatten_and_copy_device_tree()
um: Unconditionally call unflatten_device_tree()
of: Create of_root if no dtb provided by firmware
of: Always unflatten in unflatten_and_copy_device_tree()
dt-bindings: timer: mediatek: Convert to json-schema
dt-bindings: interrupt-controller: fsl,intmux: Include power-domains support
soc: fsl: qbman: Remove RESERVEDMEM_OF_DECLARE usage
dt-bindings: fsl-imx-sdma: fix HDMI audio index
dt-bindings: soc: imx: fsl,imx-iomuxc-gpr: add imx6
dt-bindings: soc: imx: fsl,imx-anatop: add binding
dt-bindings: input: touchscreen: fsl,imx6ul-tsc convert to YAML
dt-bindings: pinctrl: fsl,imx6ul-pinctrl: convert to YAML
of: make for_each_property_of_node() available to to !OF
...
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Documentation/process/license-rules.rst and checkpatch expect the SPDX
identifier syntax for multiple licenses to use capital "OR". Correct it
to keep consistent format and avoid copy-paste issues.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240208105327.129159-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"Not a ton of stuff happening in the clk framework. We got some more
devm helpers and we seem to be going in the direction of "just turn
this stuff on already and leave me alone!" with the addition of a
devm_clk_bulk_get_all_enable() API. I'm hoping that we can make that
into a pmdomain that drivers attach instead, but this API should help
drivers simplify in the meantime.
Outside of the devm wrappers, we've got the usual clk driver updates
that are dominated by the major phone SoC vendors (Samsung and
Qualcomm) and the non-critical driver fixes for things like incorrect
topology descriptions and wrong registers or bit fields. More details
are below, but I'd say that it looks pretty ordinary. The only thing
that really jumps out at me is the Renesas clk driver that's ignoring
clks that are assigned to remote processors in DeviceTree. That's a
new feature that they're using to avoid marking clks as
CLK_IGNORE_UNUSED based on the configuration of the system.
Core:
- Increase dev_id len for clkdev lookups
- Add a devm_clk_bulk_get_all_enable() API to get and enable all clks
for a device
- Add a devm variant of clk_rate_exclusive_get()
New Drivers:
- Display, TCSR, GPU, and Camera clock controllers for Qualcomm's X1
Elite SoC
- Google GS101 PERIC0 and PERIC1 clock controllers
- Exynos850 PDMA clocks
- Exynos850 CPU cluster 0 and 1 (CMU_CPUCLK0/CMU_CPUCLK1) clock
controllers
Removed Drivers:
- Remove the unused Qualcomm sc7180 modem clk driver
Updates:
- Fix some static checker errors in the Hisilicon clk driver
- Polarfire MSSPLL hardware has 4 output clocks (the driver supported
previously only one output); each of these 4 outputs feed dividers
and the output of each divider feed individual hardware blocks
(e.g. CAN, Crypto, eMMC); individual hardware block drivers need to
control their clocks thus clock driver support was added for all
MSSPLL output clocks
- Typo fixes in the Qualcomm IPQ5018 GCC driver
- Add "qdss_at" clk on Qualcomm IPQ6018, needed for WiFi
- Properly terminate frequency tables in different Qualcomm clk
drivers
- Add MDSS, crypto, and SDCC resets on Qualcomm MSM8953
- Add missing UFS CLKREF clks on Qualcomm SC8180X
- Avoid significant delays during boot by adding a softdep on rpmhpd
to Qualcomm SDM845 gcc driver
- Add QUPv3 RCGS w/ DFS and video resets to Qualcomm SM8150 GCC
driver
- Fix the custom GPU GX "do-nothing" method in the Qualcomm GDSC
driver
- Add an external regulator to GX GDSC on Qualcomm SC8280XP GPU clk
driver
- Switch display, GPU, video, and camera Qualcomm clk drivers to
module_platform_driver()
- Set a longer delay for Venus resets on many Qualcomm SoCs
- Correct the GDSC wait times in the Qualcomm SDM845 display clk
driver
- Fix clock listing Oops on Amlogic axg
- New pll-rate for Rockchip rk3568
- i2s rate improvements for Rockchip rk3399
- Rockchip rk3588 syscon clock fixes and removal of overall
clock-number from the rk3588 binding header
- A prerequisite for later improvements to the Rockchip rk3588 linked
clocks
- Minor clean-ups and error handling improvements in both
composite-8m and SCU i.MX clock drivers
- Fix for SAI_MCLK_SEL definition for i.MX8MP
- Register the Samsung CMU MISC clock controller earlier, so the
Multi Core Timer clocksource can use it on Google GS101
- Propagate Exynos850 SPI IPCLK rate change to parents, so the SPI
will get proper clock rates
- Refactor the generic Samsung CPU clock controllers code, preparing
it for supporting Exynos850 CPU clocks
- Fix some clk kerneldoc warnings
- Add Ethernet, SDHI, DMA, and HyperFLASH/QSPI (RPC-IF) clocks on
Renesas R-Car V4M
- Ignore all clocks which are assigned to a non-Linux system in the
Renesas clk driver
- Add watchdog clock on Renesas RZ/G3S
- Add camera (CRU) clock and reset on Renesas RZ/G2UL
- Add support for the Renesas R-Car V4M (R8A779H0) SoC
- Convert some clk bindings to YAML so they can be validated"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
clk: zynq: Prevent null pointer dereference caused by kmalloc failure
clk: fractional-divider: Use bit operations consistently
clk: fractional-divider: Move mask calculations out of lock
clk: Fix clk_core_get NULL dereference
clk: starfive: jh7110-vout: Convert to platform remove callback returning void
clk: starfive: jh7110-isp: Convert to platform remove callback returning void
clk: imx: imx8-acm: Convert to platform remove callback returning void
clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset
clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk'
clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc
clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays
clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays
clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays
clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays
clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays
clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays
clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays
clk: mediatek: clk-mt8173-apmixedsys: Use common error handling code in clk_mt8173_apmixed_probe()
clk: Add a devm variant of clk_rate_exclusive_get()
...
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'clk-rate-exclusive' into clk-next
- Increase dev_id len for clkdev lookups
* clk-samsung: (25 commits)
clk: samsung: Add CPU clock support for Exynos850
clk: samsung: Pass mask to wait_until_mux_stable()
clk: samsung: Keep register offsets in chip specific structure
clk: samsung: Keep CPU clock chip specific data in a dedicated struct
clk: samsung: Pass register layout type explicitly to CLK_CPU()
clk: samsung: Pass actual CPU clock registers base to CPU_CLK()
clk: samsung: Group CPU clock functions by chip
clk: samsung: Use single CPU clock notifier callback for all chips
clk: samsung: Reduce params count in exynos_register_cpu_clock()
clk: samsung: Pull struct exynos_cpuclk into clk-cpu.c
clk: samsung: Improve clk-cpu.c style
dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1
clk: samsung: gs101: add support for cmu_peric1
clk: samsung: gs101: drop extra empty line
dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit
clk: samsung: exynos850: Propagate SPI IPCLK rate change
clk: samsung: gs101: gpio_peric0_pclk needs to be kept on
clk: samsung: exynos850: Add PDMA clocks
dt-bindings: clock: tesla,fsd: Fix spelling mistake
clk: samsung: gs101: add support for cmu_peric0
...
* clk-imx:
clk: imx: imx8mp: Fix SAI_MCLK_SEL definition
clk: imx: scu: Use common error handling code in imx_clk_scu_alloc_dev()
clk: imx: composite-8m: Delete two unnecessary initialisations in __imx8m_clk_hw_composite()
clk: imx: composite-8m: Less function calls in __imx8m_clk_hw_composite() after error detection
* clk-rockchip:
clk: rockchip: rk3399: Allow to set rate of clk_i2s0_frac's parent
clk: rockchip: rk3588: use linked clock ID for GATE_LINK
clk: rockchip: rk3588: fix indent
clk: rockchip: rk3588: fix pclk_vo0grf and pclk_vo1grf
dt-bindings: clock: rk3588: add missing PCLK_VO1GRF
dt-bindings: clock: rk3588: drop CLK_NR_CLKS
clk: rockchip: rk3588: fix CLK_NR_CLKS usage
clk: rockchip: rk3568: Add PLL rate for 128MHz
* clk-clkdev:
clkdev: Update clkdev id usage to allow for longer names
* clk-rate-exclusive:
clk: Add a devm variant of clk_rate_exclusive_get()
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Document CPU clock management unit compatibles and add corresponding
clock indices. Exynos850 has two CPU clusters (CL0 and CL1), each
containing 4 Cortex-A55 cores. CPU PLLs are generating main CPU clocks
for each cluster, and there are alternate ("switch") clocks that can be
used temporarily while re-configuring the PLL for the new rate. ACLK,
ATCLK, PCLKDBG and PERIPHCLK clocks are driving corresponding buses.
CLK_CLUSTERx_SCLK are actual leaf CPU clocks and should be used to
change CPU rates. Also some CoreSight clocks can be derived from
DBG_USER (debug clock).
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20240224202053.25313-2-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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'clk-microchip' into clk-next
* clk-remove:
clk: starfive: jh7110-vout: Convert to platform remove callback returning void
clk: starfive: jh7110-isp: Convert to platform remove callback returning void
clk: imx: imx8-acm: Convert to platform remove callback returning void
* clk-amlogic:
clk: meson: Add missing clocks to axg_clk_regmaps
* clk-qcom: (62 commits)
clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset
clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk'
clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc
clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays
clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays
clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays
clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays
clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays
clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays
clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays
clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times
dt-bindings: clk: qcom: drop the SC7180 Modem subsystem clock controller
clk: qcom: drop the SC7180 Modem subsystem clock driver
clk: qcom: Use qcom_branch_set_clk_en()
clk: qcom: branch: Add a helper for setting the enable bit
clk: qcom: dispcc-sm8250: Make clk_init_data and pll_vco const
clk: qcom: gcc-sc8180x: Add missing UFS QREF clocks
clk: qcom: gcc-msm8953: add more resets
clk: qcom: videocc-*: switch to module_platform_driver
...
* clk-parent:
clk: Fix clk_core_get NULL dereference
* clk-microchip:
clk: microchip: mpfs: convert MSSPLL outputs to clk_divider
clk: microchip: mpfs: add missing MSSPLL outputs
clk: microchip: mpfs: setup for using other mss pll outputs
clk: microchip: mpfs: split MSSPLL in two
dt-bindings: can: mpfs: add missing required clock
dt-bindings: clock: mpfs: add more MSSPLL output definitions
|
