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* dt-bindings: power: imx8mp: add defines for HSIO blk-ctrl domainsLucas Stach2022-02-131-0/+6
| | | | | | | | | This adds the defines for the power domains provided by the HSIO blk-ctrl on the i.MX8MP. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* dt-bindings: power: add defines for i.MX8MP power domainLucas Stach2022-02-131-0/+29
| | | | | | | | | This adds the DT defines for the GPC power domains found on the i.MX8MP SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domainsLucas Stach2022-02-111-0/+3
| | | | | | | | | | This adds the defines for the power domains provided by the VPU blk-ctrl on the i.MX8MQ. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
* Merge tag 'char-misc-5.17-rc1' of ↵Linus Torvalds2022-01-148-4/+504
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc and other driver updates from Greg KH: "Here is the large set of char, misc, and other "small" driver subsystem changes for 5.17-rc1. Lots of different things are in here for char/misc drivers such as: - habanalabs driver updates - mei driver updates - lkdtm driver updates - vmw_vmci driver updates - android binder driver updates - other small char/misc driver updates Also smaller driver subsystems have also been updated, including: - fpga subsystem updates - iio subsystem updates - soundwire subsystem updates - extcon subsystem updates - gnss subsystem updates - phy subsystem updates - coresight subsystem updates - firmware subsystem updates - comedi subsystem updates - mhi subsystem updates - speakup subsystem updates - rapidio subsystem updates - spmi subsystem updates - virtual driver updates - counter subsystem updates Too many individual changes to summarize, the shortlog contains the full details. All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (406 commits) counter: 104-quad-8: Fix use-after-free by quad8_irq_handler dt-bindings: mux: Document mux-states property dt-bindings: ti-serdes-mux: Add defines for J721S2 SoC counter: remove old and now unused registration API counter: ti-eqep: Convert to new counter registration counter: stm32-lptimer-cnt: Convert to new counter registration counter: stm32-timer-cnt: Convert to new counter registration counter: microchip-tcb-capture: Convert to new counter registration counter: ftm-quaddec: Convert to new counter registration counter: intel-qep: Convert to new counter registration counter: interrupt-cnt: Convert to new counter registration counter: 104-quad-8: Convert to new counter registration counter: Update documentation for new counter registration functions counter: Provide alternative counter registration functions counter: stm32-timer-cnt: Convert to counter_priv() wrapper counter: stm32-lptimer-cnt: Convert to counter_priv() wrapper counter: ti-eqep: Convert to counter_priv() wrapper counter: ftm-quaddec: Convert to counter_priv() wrapper counter: intel-qep: Convert to counter_priv() wrapper counter: microchip-tcb-capture: Convert to counter_priv() wrapper ...
| * dt-bindings: ti-serdes-mux: Add defines for J721S2 SoCAswath Govindraju2022-01-031-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | There are 4 lanes in the single instance of J721S2 SERDES. Each SERDES lane mux can select upto 4 different IPs. Define all the possible functions. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/0571fd6b-ec4d-71b3-5cf7-6fa48ed5592c@axentia.se Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| * Merge tag 'phy-for-5.17' of ↵Greg Kroah-Hartman2021-12-303-4/+33
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next Vinod writes: phy-for-5.17 - New support: - Qualcomm eDP PHY driver - Qualcomm SM8450 UFS, USB2, USB3, PCIe0 and PCIe1 phy support - Lan966x ethernet serdes PHY driver - Support for uniphier NXI & Pro4 SoC - Qualcomm SM6350 USB2 support - Amlogic Meson8 HDMI TX PHY driver - Rockchip rk3568 usb2 support - Intel Thunder Bay eMMC PHY driver - Freescale IMX8 PCIe phy driver - Updates: - Cadence Sierra driver updates for multilink configurations - Bcm usb2 updates for Phy reg space * tag 'phy-for-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (72 commits) phy: cadence: Sierra: Add support for derived reference clock output dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration phy: cadence: Sierra: Add support for PHY multilink configurations phy: cadence: Sierra: Fix to get correct parent for mux clocks phy: cadence: Sierra: Update single link PCIe register configuration phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation phy: cadence: Sierra: Check cmn_ready assertion during PHY power on phy: cadence: Sierra: Add PHY PCS common register configurations phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation phy: cadence: Sierra: Add support to get SSC type from device tree dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names phy: cadence: Sierra: Prepare driver to add support for multilink configurations phy: cadence: Sierra: Use of_device_get_match_data() to get driver data phy: mediatek: Fix missing check in mtk_mipi_tx_probe phy: uniphier-usb3ss: fix unintended writing zeros to PHY register phy: phy-mtk-tphy: use new io helpers to access register phy: phy-mtk-xsphy: use new io helpers to access register phy: mediatek: add helpers to update bits of registers ...
| | * dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clockSwapnil Jakhade2021-12-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock ID for Sierra derived reference clock. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211223060137.9252-15-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic namesSwapnil Jakhade2021-12-271-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename SSC macros to use generic names instead of PHY specific names, so that they can be used to specify SSC modes for both Torrent and Sierra. Renaming the macros should not affect the things as these are not being used in any DTS file yet. Signed-off-by: Swapnil Jakhade <sjakhade@cadence.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211223060137.9252-4-sjakhade@cadence.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phyRichard Zhu2021-12-141-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add binding for reference clock PAD modes of the i.MX8 PCIe PHY. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Tim Harvey <tharvey@gateworks.com> Tested-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1638432158-4119-2-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| | * dt-bindings: phy: Add constants for lan966x serdesHoratiu Vultur2021-11-231-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Lan966x has: 2 integrated PHYs, 3 SerDes and 2 RGMII interfaces. Which requires to be muxed based on the HW representation. So add constants for each interface to be able to distinguish them. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20211116100818.1615762-3-horatiu.vultur@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
| * | Merge tag 'icc-5.17-rc1' of ↵Greg Kroah-Hartman2021-12-273-0/+428
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next Georgi writes: interconnect changes for 5.17 Here are the interconnect changes for the 5.17-rc1 merge window consisting of new drivers, minor changes and fixes. New drivers: - New driver for MSM8996 platforms - New driver for SC7280 EPSS L3 hardware - New driver for QCM2290 platforms - New driver for SM8450 platforms Driver changes: - dt-bindings: interconnect: Combine SDM660 bindings into RPM schema - icc-rpm: Add support for bus power domain - icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check - icc-rpm: Define ICC device type - icc-rpm: Add QNOC type QoS support - icc-rpm: Support child NoC device probe - icc-rpm: Prevent integer overflow in rate - icc-rpmh: Add BCMs to commit list in pre_aggregate Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: interconnect: qcom: Add QCM2290 driver support dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support interconnect: icc-rpm: Support child NoC device probe interconnect: icc-rpm: Add QNOC type QoS support interconnect: icc-rpm: Define ICC device type interconnect: qcom: Add SM8450 interconnect provider driver dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings interconnect: qcom: rpm: Prevent integer overflow in rate interconnect: icc-rpm: Use NOC_QOS_MODE_INVALID for qos_mode check interconnect: qcom: icc-rpmh: Add BCMs to commit list in pre_aggregate interconnect: qcom: Add MSM8996 interconnect provider driver dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindings interconnect: icc-rpm: Add support for bus power domain dt-bindings: interconnect: Combine SDM660 bindings into RPM schema interconnect: qcom: Add EPSS L3 support on SC7280 dt-bindings: interconnect: Add EPSS L3 DT binding on SC7280
| | * \ Merge branch 'icc-qcm2290' into icc-nextGeorgi Djakov2021-12-151-0/+94
| | |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for QCM2290 including a few prep changes. * icc-qcm2290 interconnect: icc-rpm: Define ICC device type interconnect: icc-rpm: Add QNOC type QoS support interconnect: icc-rpm: Support child NoC device probe dt-bindings: interconnect: Add Qualcomm QCM2290 NoC support interconnect: qcom: Add QCM2290 driver support Link: https://lore.kernel.org/r/20211215002324.1727-1-shawn.guo@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
| | | * | dt-bindings: interconnect: Add Qualcomm QCM2290 NoC supportShawn Guo2021-12-151-0/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add bindings for Qualcomm QCM2290 Network-On-Chip interconnect devices. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211215002324.1727-5-shawn.guo@linaro.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
| | * | | Merge branch 'icc-sm8450' into icc-nextGeorgi Djakov2021-12-141-0/+171
| | |\ \ \ | | | |/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This add device tree binding and driver for interconnect providers found in SM8450 SoC. * icc-sm8450 dt-bindings: interconnect: Add Qualcomm SM8450 DT bindings interconnect: qcom: Add SM8450 interconnect provider driver Link: https://lore.kernel.org/r/20211209084842.189627-1-vkoul@kernel.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
| | | * | dt-bindings: interconnect: Add Qualcomm SM8450 DT bindingsVinod Koul2021-12-141-0/+171
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Qualcomm SM8450 SoC has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand Signed-off-by: Vinod Koul <vkoul@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211209084842.189627-2-vkoul@kernel.org Signed-off-by: Georgi Djakov <djakov@kernel.org>
| | * / dt-bindings: interconnect: Add Qualcomm MSM8996 DT bindingsYassine Oudjana2021-11-221-0/+163
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add bindings for interconnects on Qualcomm MSM8996. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> #db820c Link: https://lore.kernel.org/r/20211021132329.234942-4-y.oudjana@protonmail.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
| * / dt-bindings: iio: add AD74413RCosmin Tanislav2021-12-121-0/+21
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AD74412R and AD74413R are quad-channel, software configurable, input/output solutions for building and process control applications. They contain functionality for analog output, analog input, digital input, resistance temperature detector, and thermocouple measurements integrated into a single chip solution with an SPI interface. The devices feature a 16-bit ADC and four configurable 13-bit DACs to provide four configurable input/output channels and a suite of diagnostic functions. The AD74413R differentiates itself from the AD74412R by being HART-compatible. Signed-off-by: Cosmin Tanislav <cosmin.tanislav@analog.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20211205114045.173612-3-cosmin.tanislav@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
* | Merge tag 'sound-5.17-rc1' of ↵Linus Torvalds2022-01-142-0/+29
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound updates from Takashi Iwai: "It's a relatively calm development cycle, but still lots of updates in the driver side like Intel SOF. Below are some highlights: ALSA / ASoC core: - A new kselftest for ALSA control API - PCM NO_REWINDS support - Potential race fixes around control removals - Unify x86 SG-buffer memory allocation code - Cleanups and race fixes for ASoC DPCM locking ASoC: - Refinements and cleanups around the delay() APIs - Wider use of dev_err_probe(). - Continuing cleanups and improvements to the SOF code - Support for pin switches in simple-card derived cards - Support for AMD Renoir ACP, Asahi Kasei Microdevices AKM4375, Intel systems using NAU8825 and MAX98390, Mediatek MT8915, nVidia Tegra20 S/PDIF, Qualcomm systems using ALC5682I-VS and Texas Instruments TLV320ADC3xxx HD-audio / USB-audio: - Fix deadlock at HD-audio codec unbinding - Fixes for Tegra194 HD-audio, new HDA support for CS35L41 codec - Quirks for Lenovo and HP machines, Gigabyte mobo, Bose device Misc: - Fix virmidi drain behavior Note that the merge of CS35L41 codec support is still half-baked, and at least one ACPI change is missing. Although this won't hinder the kernel build itself, we're going to catch up before RC1" * tag 'sound-5.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (415 commits) ALSA: hda: intel-dsp-config: reorder the config table ALSA: hda: intel-dsp-config: add JasperLake support ALSA: hda: cs35l41: fix double free on error in probe() ALSA: hda: Fix dependencies of CS35L41 on SPI/I2C buses ALSA: hda: Fix dependency on ASoC cs35l41 codec ASoC: cs35l41: Add support for hibernate memory retention mode ASoC: cs35l41: Update handling of test key registers ALSA: intel_hdmi: Check for error num after setting mask ASoC: wcd9335: Keep a RX port value for each SLIM RX mux ASoC: amd: acp: acp-mach: Change default RT1019 amp dev id ALSA: virmidi: Remove duplicated code ALSA: seq: virmidi: Add a drain operation ASoC: topology: Fix typo ASoC: fsl_asrc: refine the check of available clock divider ASoC: Intel: bytcr_rt5640: Add support for external GPIO jack-detect ASoC: Intel: bytcr_rt5640: Support retrieving the codec IRQ from the AMCR0F28 ACPI dev ASoC: rt5640: Add support for boards with an external jack-detect GPIO ASoC: rt5640: Allow snd_soc_component_set_jack() to override the codec IRQ ASoC: rt5640: Change jack_work to a delayed_work ASoC: rt5640: Fix possible NULL pointer deref on resume ...
| * | ASoC: tlv320adc3xxx: New codec bindingsRicard Wanderlof2021-12-201-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | DT bindings for Texas Instruments TLV320ADC3001 and TLV320ADC3101 audio ADCs. Signed-off-by: Ricard Wanderlof <ricardw@axis.com> Link: https://lore.kernel.org/r/alpine.DEB.2.21.2112151759170.27889@lap5cg0092dnk.se.axis.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: rt5640: Add the binding include file for the HDA header supportOder Chiou2021-11-251-0/+1
| |/ | | | | | | | | | | | | | | The patch adds the binding include file for the HDA header support. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Link: https://lore.kernel.org/r/20211125055812.8911-1-oder_chiou@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | Merge tag 'mailbox-v5.17' of ↵Linus Torvalds2022-01-131-0/+2
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.linaro.org/landing-teams/working/fujitsu/integration Pull mailbox updates from Jassi Brar: - qcom: misc updates to qcom-ipcc driver - mpfs: change compatible string - pcc: - fix handling of subtypes - avoid uninitialized variable - mtk: - add missing of_node_put - enable control_by_sw - silent probe-defer prints - fix gce_num for mt8192 - zynq: add missing of_node_put - imx: check for NULL instead of IS_ERR - appple: switch to generic compatibles - hi3660: convert comments to kernel-doc notation * tag 'mailbox-v5.17' of git://git.linaro.org/landing-teams/working/fujitsu/integration: dt-bindings: mailbox: Add more protocol and client ID mailbox: qcom-ipcc: Support interrupt wake up from suspend mailbox: qcom-ipcc: Support more IPCC instance mailbox: qcom-ipcc: Dynamic alloc for channel arrangement mailbox: change mailbox-mpfs compatible string mailbox: pcc: Handle all PCC subtypes correctly in pcc_mbox_irq mailbox: pcc: Avoid using the uninitialized variable 'dev' mailbox: mtk: add missing of_node_put before return mailbox: zynq: add missing of_node_put before return mailbox: imx: Fix an IS_ERR() vs NULL bug mailbox: hi3660: convert struct comments to kernel-doc notation mailbox: add control_by_sw for mt8195 mailbox: mtk-cmdq: Silent EPROBE_DEFER errors for clks mailbox: fix gce_num of mt8192 driver data mailbox: apple: Bind to generic compatibles dt-bindings: mailbox: apple,mailbox: Add generic and t6000 compatibles
| * | dt-bindings: mailbox: Add more protocol and client IDHuang Yiwei2022-01-111-0/+2
| |/ | | | | | | | | | | | | | | Add more protocol and client ID which can be used in device tree properties. Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
* | Merge tag 'clk-for-linus' of ↵Linus Torvalds2022-01-1216-5/+1109
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "We have a couple patches in the framework core this time around but they're mostly minor cleanups and some debugfs stuff. The real work that's in here is the typical pile of clk driver updates and new SoC support. Per usual (or maybe just recent trends), Qualcomm gains a handful of SoC drivers additions and has the largest diffstat. After that there are quite a few updates to the Allwinner (sunxi) drivers to support modular drivers and Renesas is heavily updated to add more support for various clks. Overall it looks pretty normal. New Drivers: - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770 - MediaTek mt7986 SoC basic support - Clock and reset driver for Toshiba Visconti SoCs - Initial clock driver for the Exynos7885 SoC (Samsung Galaxy A8) - Allwinner D1 clks - Lan966x Generic Clock Controller driver and associated DT bindings - Qualcomm SDX65, SM8450, and MSM8976 GCC clks - Qualcomm SDX65 and SM8450 RPMh clks Updates: - Set suppress_bind_attrs to true for i.MX8ULP driver - Switch from do_div to div64_ul for throughout all i.MX drivers - Fix imx8mn_clko1_sels for i.MX8MN - Remove unused IPG_AUDIO_ROOT from i.MX8MP - Switch parent for audio_root_clk to audio ahb in i.MX8MP driver - Removal of all remaining uses of __clk_lookup() in drivers/clk/samsung - Refactoring of the CPU clocks registration to use common interface - An update of the Exynos850 driver (support for more clock domains) required by the E850-96 development board - Prep for runtime PM and generic power domains on Tegra - Support modular Allwinner clk drivers via platform bus - Lan966x clock driver extended to support clock gating - Add serial (SCI1), watchdog (WDT), timer (OSTM), SPI (RSPI), and thermal (TSU) clocks and resets on Renesas RZ/G2L - Rework SDHI clock handling in the Renesas R-Car Gen3 and RZ/G2 clock drivers, and in the Renesas SDHI driver - Make the Cortex-A55 (I) clock on Renesas RZ/G2L programmable - Document support for the new Renesas R-Car S4-8 (R8A779F0) SoC - Add support for the new Renesas R-Car S4-8 (R8A779F0) SoC - Add GPU clock and resets on Renesas RZ/G2L - Add clk-provider.h to various Qualcomm clk drivers - devm version of clk_hw_register_gate() - kerneldoc fixes in a couple drivers" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (131 commits) clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup() clk: mediatek: add mt7986 clock support clk: mediatek: add mt7986 clock IDs dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper clk: x86: Fix clk_gate_flags for RV_CLK_GATE clk: x86: Use dynamic con_id string during clk registration ACPI: APD: Add a fmw property clk-name drivers: acpi: acpi_apd: Remove unused device property "is-rv" x86: clk: clk-fch: Add support for newer family of AMD's SOC clk: ingenic: Add MDMA and BDMA clocks dt-bindings: clk/ingenic: Add MDMA and BDMA clocks clk: bm1880: remove kfrees on static allocations clk: Drop unused COMMON_CLK_STM32MP157_SCMI config clk: st: clkgen-mux: search reg within node or parent clk: st: clkgen-fsyn: search reg within node or parent clk: Enable/Disable runtime PM for clk_summary MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller clk: visconti: Add support common clock driver and reset driver ...
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| *-. \ Merge branches 'clk-ingenic' and 'clk-mediatek' into clk-nextStephen Boyd2022-01-113-0/+172
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add MDMA and BDMA clks to Ingenic JZ4760 and JZ4770 - MediaTek mt7986 SoC basic support * clk-ingenic: clk: ingenic: Add MDMA and BDMA clocks dt-bindings: clk/ingenic: Add MDMA and BDMA clocks * clk-mediatek: clk: mediatek: add mt7986 clock support clk: mediatek: add mt7986 clock IDs dt-bindings: clock: mediatek: document clk bindings for mediatek mt7986 SoC clk: mediatek: clk-gate: Use regmap_{set/clear}_bits helpers clk: mediatek: clk-gate: Shrink by adding clockgating bit check helper
| | | * | clk: mediatek: add mt7986 clock IDsSam Shih2022-01-061-0/+169
| | | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MT7986 clock dt-bindings, include topckgen, apmixedsys, infracfg, and ethernet subsystem clocks. Signed-off-by: Sam Shih <sam.shih@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211217121148.6753-3-sam.shih@mediatek.com Reviewed-by: Ryder Lee <ryder.lee@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
| | * / dt-bindings: clk/ingenic: Add MDMA and BDMA clocksPaul Cercueil2022-01-062-0/+3
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Ingenic JZ4760 and JZ4770 both have an extra DMA core named BDMA dedicated to the NAND and BCH controller, but which can also do memory-to-memory transfers. The JZ4760 additionally has a DMA core named MDMA dedicated to memory-to-memory transfers. The programming manual for the JZ4770 does have a bit for a MDMA clock, but does not seem to have the hardware wired in. Add macros for the MDMA and BDMA clocks to the dt-bindings include files, so that they can be used within Device Tree files. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20211220193319.114974-2-paul@crapouillou.net Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *-. \ Merge branches 'clk-socfpga', 'clk-toshiba', 'clk-st' and 'clk-bitmain' into ↵Stephen Boyd2022-01-112-0/+222
| |\ \ \ | | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk-next - Clock and reset driver for Toshiba Visconti SoCs * clk-socfpga: clk: socfpga: s10: Make use of the helper function devm_platform_ioremap_resource() clk: socfpga: agilex: Make use of the helper function devm_platform_ioremap_resource() clk: socfpga: remove redundant assignment after a mask operation clk: socfpga: remove redundant assignment on division * clk-toshiba: clk: visconti: Remove pointless NULL check in visconti_pll_add_lookup() MAINTAINERS: Add entries for Toshiba Visconti PLL and clock controller clk: visconti: Add support common clock driver and reset driver dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoC dt-bindings: clock: Add DT bindings for PLL of Toshiba Visconti TMPV770x SoC * clk-st: clk: Drop unused COMMON_CLK_STM32MP157_SCMI config clk: st: clkgen-mux: search reg within node or parent clk: st: clkgen-fsyn: search reg within node or parent * clk-bitmain: clk: bm1880: remove kfrees on static allocations
| | | * dt-bindings: clock: Add DT bindings for SMU of Toshiba Visconti TMPV770x SoCNobuhiro Iwamatsu2022-01-052-0/+222
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | Add device tree bindings for SMU (System Management Unit) controller of Toshiba Visconti TMPV770x SoC series. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211025031038.4180686-3-nobuhiro1.iwamatsu@toshiba.co.jp Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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| *-----. \ Merge branches 'clk-nvidia', 'clk-imx', 'clk-samsung' and 'clk-qcom' into ↵Stephen Boyd2022-01-118-5/+779
| |\ \ \ \ \ | | | |_|_|/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk-next * clk-nvidia: clk: tegra: Support runtime PM and power domain clk: tegra: Make vde a child of pll_p on tegra114 * clk-imx: clk: imx8mp: Fix the parent clk of the audio_root_clk clk: imx8mp: Remove IPG_AUDIO_ROOT from imx8mp-clock.h clk: imx8mn: Fix imx8mn_clko1_sels clk: imx: Use div64_ul instead of do_div clk: imx: imx8ulp: set suppress_bind_attrs to true * clk-samsung: clk: samsung: Add initial Exynos7885 clock driver clk: samsung: clk-pll: Add support for pll1417x clk: samsung: Make exynos850_register_cmu shared dt-bindings: clock: Document Exynos7885 CMU bindings dt-bindings: clock: Add bindings definitions for Exynos7885 CMU clk: samsung: exynos850: Add missing sysreg clocks dt-bindings: clock: Add bindings for Exynos850 sysreg clocks clk: samsung: exynos850: Register clocks early clk: samsung: exynos850: Keep some crucial clocks running clk: samsung: exynos850: Implement CMU_CMGP domain dt-bindings: clock: Add bindings for Exynos850 CMU_CMGP clk: samsung: exynos850: Implement CMU_APM domain dt-bindings: clock: Add bindings for Exynos850 CMU_APM clk: samsung: Update CPU clk registration clk: samsung: Remove meaningless __init and extern from header files clk: samsung: remove __clk_lookup() usage dt-bindings: clock: samsung: add IDs for some core clocks * clk-qcom: (25 commits) clk: qcom: gcc-sc7280: Mark gcc_cfg_noc_lpass_clk always enabled clk: qcom: clk-alpha-pll: Increase PLL lock detect poll time clk: qcom: turingcc-qcs404: explicitly include clk-provider.h clk: qcom: q6sstop-qcs404: explicitly include clk-provider.h clk: qcom: mmcc-apq8084: explicitly include clk-provider.h clk: qcom: lpasscc-sdm845: explicitly include clk-provider.h clk: qcom: lpasscc-sc7280: explicitly include clk-provider.h clk: qcom: gcc-sm6350: explicitly include clk-provider.h clk: qcom: gcc-msm8994: explicitly include clk-provider.h clk: qcom: gcc-sm8350: explicitly include clk-provider.h clk: qcom: Add MSM8976/56 Global Clock Controller (GCC) driver dt-bindings: clk: qcom: Document MSM8976 Global Clock Controller clk: qcom: Add clock driver for SM8450 clk: qcom: Add SDX65 GCC support clk: qcom: Add LUCID_EVO PLL type for SDX65 dt-bindings: clock: Add SM8450 GCC clock bindings dt-bindings: clock: Add SDX65 GCC clock bindings clk: qcom: rpmh: add support for SM8450 rpmh clocks dt-bindings: clock: Add RPMHCC bindings for SM8450 clk: qcom: smd-rpm: Drop binary value handling for buffered clock ...
| | | | | * dt-bindings: clk: qcom: Document MSM8976 Global Clock ControllerMarijn Suijten2021-12-161-0/+240
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the required properties and firmware clocks for gcc-msm8976 to operate nominally, and add header definitions for referencing the clocks from firmware. Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211208091036.132334-2-marijn.suijten@somainline.org
| | | | | * Merge tag '20211207114003.100693-2-vkoul@kernel.org' into clk-for-5.17Bjorn Andersson2021-12-161-0/+244
| | | | | |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v5.16-rc1 + 20211207114003.100693-2-vkoul@kernel.org The immutable branch contains the DT binding and clock defines as need for the Qualcomm SM8450 global clock controller driver.
| | | | * | | dt-bindings: clock: Add bindings definitions for Exynos7885 CMUDavid Virag2021-12-191-0/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Just like on Exynos850, the clock controller driver is designed to have separate instances for each particular CMU, so clock IDs start from 1 for each CMU in this bindings header too. Signed-off-by: David Virag <virag.david003@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211206153124.427102-2-virag.david003@gmail.com
| | | | * | | dt-bindings: clock: Add bindings for Exynos850 sysreg clocksSam Protsenko2021-12-191-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | System Register is used to configure system behavior, like USI protocol, etc. SYSREG clocks should be provided to corresponding syscon nodes, to make it possible to modify SYSREG registers. While at it, add also missing PMU and GPIO clocks, which looks necessary and might be needed for corresponding Exynos850 features soon. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20211217161549.24836-2-semen.protsenko@linaro.org
| | | | * | | dt-bindings: clock: Add bindings for Exynos850 CMU_CMGPSam Protsenko2021-11-221-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CMU_CMGP generates USI and ADC clocks for BLK_ALIVE. In particular USI clocks are needed for HSI2C_3 and HSI2C_4 instances. Add clock indices and bindings documentation for CMU_CMGP domain. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20211121232741.6967-4-semen.protsenko@linaro.org
| | | | * | | dt-bindings: clock: Add bindings for Exynos850 CMU_APMSam Protsenko2021-11-221-1/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CMU_APM generates clocks for APM IP-core (Active Power Management). In particular it generates RTC clocks, which are needed to enable rtc-s3c driver on Exynos850 SoC. Add clock indices and binding documentation for CMU_APM. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Link: https://lore.kernel.org/r/20211121232741.6967-2-semen.protsenko@linaro.org
| | | | * | | dt-bindings: clock: samsung: add IDs for some core clocksMarek Szyprowski2021-11-192-2/+6
| | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add IDs for some core clocks referenced during the boot process. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20211018125456.8292-1-m.szyprowski@samsung.com Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
| | | * | | clk: imx8mp: Remove IPG_AUDIO_ROOT from imx8mp-clock.hHui Wang2021-11-221-1/+0
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the commit b24e288d5063 ("clk: imx: Remove the audio ipg clock from imx8mp") removes the non-existing IPG_AUDIO_ROOT from the clk-imx8mp.c, and this definition is not used by anywhere, let us removed it in the imx8mp-clock.h as well. Signed-off-by: Hui Wang <hui.wang@canonical.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Link: https://lore.kernel.org/r/20211109125657.63485-1-hui.wang@canonical.com Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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| *-. \ \ \ Merge branches 'clk-x86', 'clk-stm', 'clk-amlogic' and 'clk-allwinner' into ↵Stephen Boyd2022-01-114-0/+268
| |\ \ \ \ \ | | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | clk-next * clk-x86: clk: x86: Fix clk_gate_flags for RV_CLK_GATE clk: x86: Use dynamic con_id string during clk registration ACPI: APD: Add a fmw property clk-name drivers: acpi: acpi_apd: Remove unused device property "is-rv" x86: clk: clk-fch: Add support for newer family of AMD's SOC clk: Introduce clk-tps68470 driver platform/x86: int3472: Deal with probe ordering issues platform/x86: int3472: Pass tps68470_regulator_platform_data to the tps68470-regulator MFD-cell platform/x86: int3472: Pass tps68470_clk_platform_data to the tps68470-regulator MFD-cell platform/x86: int3472: Add get_sensor_adev_and_name() helper platform/x86: int3472: Split into 2 drivers platform_data: Add linux/platform_data/tps68470.h file i2c: acpi: Add i2c_acpi_new_device_by_fwnode() function i2c: acpi: Use acpi_dev_ready_for_enumeration() helper ACPI: delay enumeration of devices with a _DEP pointing to an INT3472 device * clk-stm: clk: stm32: Fix ltdc's clock turn off by clk_disable_unused() after system enter shell * clk-amlogic: clk: meson: gxbb: Fix the SDM_EN bit for MPLL0 on GXBB * clk-allwinner: clk: sunxi-ng: Add support for the D1 SoC clocks clk: sunxi-ng: gate: Add macros for gates with fixed dividers clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hw clk: sunxi-ng: mp: Add macros using clk_parent_data and clk_hw clk: sunxi-ng: div: Add macros using clk_parent_data and clk_hw dt-bindings: clk: Add compatibles for D1 CCUs clk: sunxi-ng: Allow the CCU core to be built as a module clk: sunxi-ng: Convert early providers to platform drivers clk: sunxi-ng: Allow drivers to be built as modules clk: sunxi-ng: Export symbols used by CCU drivers
| | | * | | dt-bindings: clk: Add compatibles for D1 CCUsSamuel Holland2021-11-234-0/+268
| | |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The D1 has a CCU and a R_CCU (PRCM CCU) like most other sunxi SoCs, with 3 and 4 clock inputs, respectively. Add the compatibles and bindings. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211119043545.4010-2-samuel@sholland.org
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| *-. \ \ \ Merge branches 'clk-doc', 'clk-renesas', 'clk-at91', 'clk-cleanup' and ↵Stephen Boyd2022-01-113-0/+128
| |\ \ \ \ \ | | |_|/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'clk-debugfs' into clk-next * clk-doc: clk: Gemini: fix struct name in kernel-doc clk: zynq: pll: Fix kernel-doc warnings clk: imx: pllv1: fix kernel-doc notation for struct clk_pllv1 * clk-renesas: (31 commits) clk: renesas: r9a07g044: Add GPU clock and reset entries clk: renesas: r9a07g044: Add mux and divider for G clock clk: renesas: r9a07g044: Rename CLK_PLL3_DIV4 macro clk: renesas: cpg-mssr: Add support for R-Car S4-8 clk: renesas: rcar-gen4: Introduce R-Car Gen4 CPG driver dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions dt-bindings: power: Add r8a779f0 SYSC power domain definitions clk: renesas: r9a07g044: Add TSU clock and reset entry mmc: renesas_sdhi: Simplify an expression mmc: renesas_sdhi: Use devm_clk_get_optional() to obtain CD clock dt-bindings: clock: renesas,cpg-mssr: Document r8a779f0 clk: renesas: cpg-mssr: propagate return value of_genpd_add_provider_simple() clk: renesas: cpg-mssr: Check return value of pm_genpd_init() clk: renesas: rzg2l: propagate return value of_genpd_add_provider_simple() clk: renesas: rzg2l: Check return value of pm_genpd_init() clk: renesas: r9a07g044: Add RSPI clock and reset entries clk: renesas: r9a07g044: Change core clock "I" from DEF_FIXED->DEF_DIV clk: renesas: rzg2l: Add CPG_PL1_DDIV macro mmc: renesas_sdhi: Parse DT for SDnH mmc: renesas_sdhi: Use dev_err_probe when getting clock fails ... * clk-at91: clk: lan966x: Extend lan966x clock driver for clock gating support dt-bindings: clock: lan966x: Extend includes with clock gates dt-bindings: clock: lan966x: Extend for clock gate support clk: gate: Add devm_clk_hw_register_gate() clk: lan966x: Add lan966x SoC clock driver dt-bindings: clock: lan966x: Add LAN966X Clock Controller dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDs * clk-cleanup: clk: stm32mp1: remove redundant assignment to pointer data clk: __clk_core_init() never takes NULL clk: clk_core_get() can also return NULL clk/ti/adpll: Make const pointer error a static const array * clk-debugfs: clk: Enable/Disable runtime PM for clk_summary clk: Emit a stern warning with writable debugfs enabled clk: Add write operation for clk_parent debugfs node
| | | * | | dt-bindings: clock: lan966x: Extend includes with clock gatesHoratiu Vultur2021-12-081-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On lan966x it is allow to control the clock to some peripherals like USB. So extend the include file with these clocks. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211103085102.1656081-4-horatiu.vultur@microchip.com
| | | * | | dt-bindings: clock: lan966x: Add binding includes for lan966x SoC clock IDsKavyasree Kotagiri2021-12-081-0/+28
| | |/ / / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LAN966X supports 14 clock outputs for its peripherals. This include file is introduced to use identifiers for clocks. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20211103061935.25677-2-kavyasree.kotagiri@microchip.com
* | | | | Merge tag 'gpio-updates-for-v5.17' of ↵Linus Torvalds2022-01-113-0/+176
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio updates from Bartosz Golaszewski: "The gpio-sim module is back, this time without any changes to configfs. This results in a less elegant user-space interface but I never got any follow-up on the committable items and didn't want to delay this module for several more months. Other than that we have support for several new models and some support going away. We started working on converting GPIO drivers to using fwnode exclusively in order to limit references to OF symbols to gpiolib-of.c exclusively. We also have regular tweaks and improvements all over the place. Summary: - new testing module: gpio-sim that is scheduled to replace gpio-mockup - initial changes aiming at converting all GPIO drivers to using the fwnode interface and limiting any references to OF symbols to gpiolib-of.c - add support for Tegra234 and Tegra241 to gpio-tegra186 - add support for new models (SSD201 and SSD202D) to gpio-msc313 - add basic support for interrupts to gpio-aggregator - add support for AMDIF031 HID device to gpio-amdpt - drop support for unused platforms in gpio-xlp - cleanup leftovers from the removal of the legacy Samsung Exynos GPIO driver - use raw spinlocks in gpio-aspeed and gpio-aspeed-sgpio to make PREEMPT_RT happy - generalize the common 'ngpios' device property by reading it in the core gpiolib code so that we can remove duplicate reads from drivers - allow line names from device properties to override names set by drivers - code shrink in gpiod_add_lookup_table() - add new model to the DT bindings for gpio-vf610 - convert DT bindings for tegra devices to YAML - improvements to interrupt handling in gpio-rcar and gpio-rockchip - updates to intel drivers from Andy (details in the merge commit) - some minor tweaks, improvements and coding-style fixes all around the subsystem" * tag 'gpio-updates-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (59 commits) gpio: rcar: Propagate errors from devm_request_irq() gpio: rcar: Use platform_get_irq() to get the interrupt gpio: ts5500: Use platform_get_irq() to get the interrupt gpio: dwapb: Switch to use fwnode instead of of_node gpiolib: acpi: make fwnode take precedence in struct gpio_chip dt-bindings: gpio: samsung: drop unused bindings gpio: max3191x: Use bitmap_free() to free bitmap gpio: regmap: Switch to use fwnode instead of of_node gpio: tegra186: Add support for Tegra241 dt-bindings: gpio: Add Tegra241 support gpio: brcmstb: Use local variable to access OF node gpio: Remove unused local OF node pointers gpio: sim: add missing fwnode_handle_put() in gpio_sim_probe() gpio: msc313: Add support for SSD201 and SSD202D gpio: msc313: Code clean ups dt-bindings: gpio: msc313: Add offsets for ssd20xd dt-bindings: gpio: msc313: Add compatible for ssd20xd gpio: sim: fix uninitialized ret variable gpio: Propagate firmware node from a parent device gpio: Setup parent device and get rid of unnecessary of_node assignment ...
| * | | | | dt-bindings: gpio: Add Tegra241 supportAkhil R2021-12-231-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the port definitions for the main and AON GPIO controllers found on Tegra241 (Grace). Signed-off-by: Akhil R <akhilrajeev@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
| * | | | | dt-bindings: gpio: msc313: Add offsets for ssd20xdDaniel Palmer2021-12-201-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the gpio offsets for the SSD201 and SSD202D chips. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
| * | | | | dt-bindings: gpio: Add Tegra234 supportPrathamesh Shete2021-12-171-0/+63
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend the existing Tegra186 GPIO controller device tree bindings with support for the GPIO controller found on Tegra234. The number of pins is slightly different, but the programming model remains the same. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> [treding@nvidia.com: update device tree bindings] Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
* | | | | Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds2022-01-103-0/+603
|\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull RISC-V SoC updates from Arnd Bergmann: "Add support for StarFive JH7100 RISC-V SoC This adds support for the StarFive JH7100, including the necessary device drivers and DT files for the BeagleV Starlight prototype board, with additional boards to be added later. This SoC promises to be the first usable low-cost platform for RISC-V. I've taken this through the SoC tree in the anticipation of adding a few other Arm based SoCs as well, but those did not pass the review in time, so it's only this one" * tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: reset: starfive-jh7100: Fix 32bit compilation RISC-V: Add BeagleV Starlight Beta device tree RISC-V: Add initial StarFive JH7100 device tree serial: 8250_dw: Add StarFive JH7100 quirk dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts pinctrl: starfive: Add pinctrl driver for StarFive SoCs dt-bindings: pinctrl: Add StarFive JH7100 bindings dt-bindings: pinctrl: Add StarFive pinctrl definitions reset: starfive-jh7100: Add StarFive JH7100 reset driver dt-bindings: reset: Add Starfive JH7100 reset bindings dt-bindings: reset: Add StarFive JH7100 reset definitions clk: starfive: Add JH7100 clock generator driver dt-bindings: clock: starfive: Add JH7100 bindings dt-bindings: clock: starfive: Add JH7100 clock definitions dt-bindings: interrupt-controller: Add StarFive JH7100 plic dt-bindings: timer: Add StarFive JH7100 clint RISC-V: Add StarFive SoC Kconfig option
| * | | | | dt-bindings: pinctrl: Add StarFive pinctrl definitionsEmil Renner Berthing2021-12-161-0/+275
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add definitons for pins and GPIO input, output and output enable signals on the StarFive JH7100 SoC. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
| * | | | | dt-bindings: reset: Add StarFive JH7100 reset definitionsGeert Uytterhoeven2021-12-161-0/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add all resets for the StarFive JH7100 reset controller. Based on work by Ahmad Fatoum for Barebox, with "JH7100_" prefixes added to all definitions. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
| * | | | | dt-bindings: clock: starfive: Add JH7100 clock definitionsGeert Uytterhoeven2021-12-161-0/+202
| |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add all clock outputs for the StarFive JH7100 clock generator. Based on work by Ahmad Fatoum for Barebox, with "JH7100_" prefixes added to all definitions. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
generated by cgit v1.2.3 (git 2.25.1) at 2024-07-17 15:43:38 +0000