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Add register details an channels definition for using the TSI
registers in the hwmon driver.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Definitions for GPIO registers 8, 9, 10, 11, 12 and 13 are added into
the register header file.
- DA9052_GPIO_8_9_REG 25
- DA9052_GPIO_10_11_REG 26
- DA9052_GPIO_12_13_REG 27
A modification is also made to the MFD core code to define these registers
as readable and writable. The functions for da9052_reg_readable() and
da9052_reg_writeable() have had their case statements altered to include
these new registers.
Signed-off-by: Steve Twiss <stwiss.opensource@diasemi.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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An issue has been reported where the PMIC either locks up or fails to
respond following a system Reset. This could result in a second write
in which the bus writes the current content of the write buffer to address
of the last I2C access.
The failure case is where this unwanted write transfers incorrect data to
a critical register.
This patch fixes this issue to by following any read or write with a dummy read
to a safe register address. A safe register address is one where the contents
will not affect the operation of the system.
Signed-off-by: Ashish Jangam <ashish.jangam@kpitcummins.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
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The DA9052/53 is a highly integrated PMIC subsystem with supply domain
flexibility to support wide range of high performance application.
It provides voltage regulators, GPIO controller, Touch Screen, RTC, Battery
control and other functionality.
This patch is functionally tested on Samsung SMDKV6410.
Signed-off-by: David Dajun Chen <dchen@diasemi.com>
Signed-off-by: Ashish Jangam <ashish.jangam@kpitcummins.com>
Acked-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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