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* Merge tag 'for-linus-20170510' of git://git.infradead.org/linux-mtdLinus Torvalds2017-05-112-29/+69
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD updates from Brian Norris: "NAND, from Boris: - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc, davinci, brcmnand, omap) - a huge cleanup/rework of the denali driver accompanied with core fixes/improvements to simplify the driver code - a complete rewrite of the atmel driver to support new DT bindings make future evolution easier - the addition of per-vendor detection/initialization steps to avoid extending the nand_ids table with more extended-id entries SPI NOR, from Cyrille: - fixes in the hisi, intel and Mediatek SPI controller drivers - fixes to some SPI flash memories not supporting the Chip Erase command. - add support to some new memory parts (Winbond, Macronix, Micron, ESMT). - add new driver for the STM32 QSPI controller And a few fixes for Gemini and Versatile platforms on physmap-of" * tag 'for-linus-20170510' of git://git.infradead.org/linux-mtd: (100 commits) MAINTAINERS: Update NAND subsystem git repositories mtd: nand: gpio: update binding mtd: nand: add ooblayout for old hamming layout mtd: oxnas_nand: Allocating more than necessary in probe() dt-bindings: mtd: Document the STM32 QSPI bindings mtd: mtk-nor: set controller's address width according to nor flash mtd: spi-nor: add driver for STM32 quad spi flash controller mtd: nand: brcmnand: Check flash #WP pin status before nand erase/program mtd: nand: davinci: add comment on NAND subpage write status on keystone mtd: nand: omap2: Fix partition creation via cmdline mtdparts mtd: nand: NULL terminate a of_device_id table mtd: nand: Fix a couple error codes mtd: nand: allow drivers to request minimum alignment for passed buffer mtd: nand: allocate aligned buffers if NAND_OWN_BUFFERS is unset mtd: nand: denali: allow to override revision number mtd: nand: denali_dt: use pdev instead of ofdev for platform_device mtd: nand: denali_dt: remove dma-mask DT property mtd: nand: denali: support 64bit capable DMA engine mtd: nand: denali_dt: enable HW_ECC_FIXUP for Altera SOCFPGA variant mtd: nand: denali: support HW_ECC_FIXUP capability ...
| * Merge tag 'nand/for-4.12' of github.com:linux-nand/linux into MTDBrian Norris2017-05-011-28/+68
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Boris: """ This pull request contains: - some minor fixes/improvements on existing drivers (fsmc, gpio, ifc, davinci, brcmnand, omap) - a huge cleanup/rework of the denali driver accompanied with core fixes/improvements to simplify the driver code - a complete rewrite of the atmel driver to support new DT bindings make future evolution easier - the addition of per-vendor detection/initialization steps to avoid extending the nand_ids table with more extended-id entries """
| | * mtd: nand: allow drivers to request minimum alignment for passed bufferMasahiro Yamada2017-04-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases, nand_do_{read,write}_ops is passed with unaligned ops->datbuf. Drivers using DMA will be unhappy about unaligned buffer. The new struct member, buf_align, represents the minimum alignment the driver require for the buffer. If the buffer passed from the upper MTD layer does not have enough alignment, nand_do_*_ops will use bufpoi. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: relax ecc.read_page() return value for uncorrectable ECCMasahiro Yamada2017-04-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The comment for ecc.read_page() requires that it should return "0 if bitflips uncorrectable". Actually, drivers could return positive values when uncorrectable bitflips occur. For example, nand_read_page_swecc() is the case. If ecc.correct() returns -EBADMSG for the first ECC sector, and a positive value for the second one, nand_read_page_swecc() returns a positive max_bitflips and increments ecc_stats.failed for the same page. The requirement can be relaxed by tweaking nand_do_read_ops(). Move the max_bitflips calculation below the retry. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Remove unused chip->write_page() hookBoris Brezillon2017-04-251-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The last/only user of the chip->write_page() hook (the Atmel NAND controller driver) has been reworked and is no longer specifying a custom ->write_page() implementation. Drop this hook before someone else start abusing it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| | * mtd: nand: Move Macronix specific initialization in nand_macronix.cBoris Brezillon2017-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Move Macronix specific initialization logic into nand_macronix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Move AMD/Spansion specific init/detection logic in nand_amd.cBoris Brezillon2017-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move AMD/Spansion specific initialization/detection logic into nand_amd.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at>
| | * mtd: nand: Move Micron specific init logic in nand_micron.cBoris Brezillon2017-03-081-20/+1
| | | | | | | | | | | | | | | | | | | | | | | | Move Micron specific initialization logic into nand_micron.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at>
| | * mtd: nand: Move Toshiba specific init/detection logic in nand_toshiba.cBoris Brezillon2017-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move Toshiba specific initialization and detection logic into nand_toshiba.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at>
| | * mtd: nand: Move Hynix specific init/detection logic in nand_hynix.cBoris Brezillon2017-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move Hynix specific initialization and detection logic into nand_hynix.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at>
| | * mtd: nand: Move Samsung specific init/detection logic in nand_samsung.cBoris Brezillon2017-03-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Move Samsung specific initialization and detection logic into nand_samsung.c. This is part of the "separate vendor specific code from core" cleanup process. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at>
| | * mtd: nand: Add manufacturer specific initialization/detection stepsBoris Brezillon2017-03-081-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A lot of NANDs are implementing generic features in a non-generic way, or are providing advanced auto-detection logic where the NAND ID bytes meaning changes with the NAND generation. Providing this vendor specific initialization step will allow us to get rid of full-id entries in the nand_ids table or all the vendor specific cases added over the time in the generic NAND ID decoding logic. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Do not expose the NAND manufacturer table directlyBoris Brezillon2017-03-081-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no reason to expose the NAND manufacturer table. Provide an helper function to find manufacturers by their id. We also turn the nand_manufacturers table into a const array, since its members are not modified after the initial assignment. Finally, we remove the sentinel manufacturer entry from the manufacturers table (we already have the array size information given by ARRAY_SIZE()), and add the nand_manufacturer_name() helper to handle the "Unknown" case properly. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Rename the nand_manufacturers structBoris Brezillon2017-03-081-3/+3
| | | | | | | | | | | | | | | | | | | | | Drop the 's' at the end of nand_manufacturers since the struct is actually describing a single manufacturer, not a manufacturer table. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| | * mtd: nand: Store nand ID in struct nand_chipBoris Brezillon2017-03-081-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | Store the NAND ID in struct nand_chip to avoid passing id_data and id_len as function parameters. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Richard Weinberger <richard@nod.at> Reviewed-by: Marek Vasut <marek.vasut@gmail.com>
| * | mtd: use dev_of_node helper in mtd_get_of_nodeRafał Miłecki2017-04-191-1/+1
| |/ | | | | | | | | | | | | | | This allows better compile-time optimizations with CONFIG_OF disabled. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* / mtd: Convert to dynamically allocated bdi infrastructureJan Kara2017-04-201-5/+0
|/ | | | | | | | | | | | | | | | MTD already allocates backing_dev_info dynamically. Convert it to use generic infrastructure for this including proper refcounting. We drop mtd->backing_dev_info as its only use was to pass mtd_bdi pointer from one file into another and if we wanted to keep that in a clean way, we'd have to make mtd hold and drop bdi reference as needed which seems pointless for passing one global pointer... CC: David Woodhouse <dwmw2@infradead.org> CC: Brian Norris <computersforpeace@gmail.com> CC: linux-mtd@lists.infradead.org Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jan Kara <jack@suse.cz> Signed-off-by: Jens Axboe <axboe@fb.com>
* scripts/spelling.txt: add "partiton" pattern and fix typo instancesMasahiro Yamada2017-02-271-1/+1
| | | | | | | | | | | Fix typos and add the following to the scripts/spelling.txt: partiton||partition Link: http://lkml.kernel.org/r/1481573103-11329-7-git-send-email-yamada.masahiro@socionext.com Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* mtd: name the mtd device with an optional label propertyCédric Le Goater2017-02-101-0/+3
| | | | | | | | | | This can be used to easily identify a specific chip on a system with multiple chips. Suggested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge tag 'spi-nor/for-4.11-v2' of git://github.com/spi-nor/linuxBrian Norris2017-02-101-6/+28
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Cyrille: """ This pull request contains the following notable changes: - add support to the 4-byte address instruction set. - add support to new memory parts. - add support to S3AN memories. - add support to the Intel SPI controller. - add support to the Aspeed AST2400 and AST2550 controllers. - fix max SPI transfer and message sizes in m25p80_read(). - fix the Candence QSPI driver. - fix the Freescale QSPI driver. """
| * mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codesCyrille Pitchen2017-02-101-6/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch renames the SPINOR_OP_* macros of the 4-byte address instruction set so the new names all share a common pattern: the 4-byte address name is built from the 3-byte address name appending the "_4B" suffix. The patch also introduces new op codes to support other SPI protocols such as SPI 1-4-4 and SPI 1-2-2. This is a transitional patch and will help a later patch of spi-nor.c to automate the translation from the 3-byte address op codes into their 4-byte address version. Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Marek Vasut <marek.vasut@gmail.com>
| * mtd: spi-nor: Add support for S3AN spi-nor devicesRicardo Ribalda2017-02-101-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep their configuration data and (optionally) some user data. The protocol of this flash follows most of the spi-nor standard. With the following differences: - Page size might not be a power of two. - The address calculation (default addressing mode). - The spi nor commands used. Protocol is described on Xilinx User Guide UG333 Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Marek Vasut <marek.vasut@gmail.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
* | mtd: Add partition device node to mtd partition devicesSascha Hauer2017-02-091-0/+1
| | | | | | | | | | | | | | | | | | The user visible change here is that mtd partitions get an of_node link in sysfs. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | Merge tag 'nand/for-4.11' of github.com:linux-nand/linuxBrian Norris2017-02-082-157/+3
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Boris: """ This pull request contains minor fixes/improvements on existing drivers: - sunxi: avoid busy-waiting for NAND events - ifc: fix ECC handling on IFC v1.0 - OX820: add explicit dependency on ARCH_OXNAS in Kconfig - core: add a new manufacture ID and fix a kernel-doc warning - fsmc: kill pdata support - lpc32xx_slc: remove unneeded NULL check """ Conflicts: include/linux/mtd/nand.h [Brian: trivial conflict in the comment section]
| * | mtd: nand: Add Winbond manufacturer idAndrey Jr. Melnikov2017-02-061-0/+1
| | | | | | | | | | | | | | | | | | | | | Add WINBOND manufacturer id. Signed-off-by: Andrey Jr. Melnikov <temnota.am@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | mtd: nand: fsmc: remove stale non-DT probe pathLinus Walleij2017-01-301-156/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The FSMC driver has an execution path and a header file in <linux/mtd/fsmc.h> that serves to support passing in platform data through board files, albeit no upstream users of this mechanism exist. The header file also contains function headers for functions that do not exist in the kernel. Delete this and move the platform data struct, parsing and handling into the driver, assume we are using OF and make the driver depend on OF, remove the ifdefs making that optional. Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Stefan Roese <sr@denx.de> Cc: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Stefan Roese <sr@denx.de> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * | mtd: nand: fix nand.h kernel-doc warningsRandy Dunlap2017-01-301-1/+2
| |/ | | | | | | | | | | | | | | | | | | | | Fix kernel-doc warnings in <linux/mtd/nand.h>: ..//include/linux/mtd/nand.h:658: warning: No description found for parameter 'tCEH_min' ..//include/linux/mtd/nand.h:877: warning: No description found for parameter 'data_interface' Fixes: eee64b700e26 ("mtd: nand: Introduce nand_data_interface") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: Add max_bb_per_die and blocks_per_die fields to nand_chipZach Brown2017-02-081-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | The fields max_bb_per_die and blocks_per_die are useful determining the number of bad blocks a MTD needs to allocate. How they are set will depend on if the chip is ONFI, JEDEC or a full-id entry in the nand_ids table. Signed-off-by: Zach Brown <zach.brown@ni.com> Acked-by: Boris Brezillon <boris.brezillon@free-electron.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: introduce function max_bad_blocksJeff Westfahl2017-02-081-0/+13
|/ | | | | | | | | | | If implemented, 'max_bad_blocks' returns the maximum number of bad blocks to reserve for a MTD. An implementation for NAND is coming soon. Signed-off-by: Jeff Westfahl <jeff.westfahl@ni.com> Signed-off-by: Zach Brown <zach.brown@ni.com> Acked-by: Boris Brezillon <boris.brezillon@free-electron.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
* Merge tag 'nand/for-4.10' of github.com:linux-nand/linuxBrian Norris2016-11-291-0/+30
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Boris Brezillon: """ This pull request contains the following notable changes: - new tango NAND controller driver - new ox820 NAND controller driver - addition of a new full-ID entry in the nand_ids table - rework of the s3c240 driver to support DT - extension of the nand_sdr_timings to expose tCCS, tPROG and tR - addition of a new flag to ask the core to wait for tCCS when sending a RNDIN/RNDOUT command - addition of a new flag to ask the core to let the controller driver send the READ/PROGPAGE command This pull request also contains minor fixes/cleanup/cosmetic changes: - properly support 512 ECC step size in the sunxi driver - improve the error messages in the pxa probe path - fix module autoload in the omap2 driver - cleanup of several nand drivers to return nand_scan{_tail}() error code instead of returning -EIO - various cleanups in the denali driver - cleanups in the ooblayout handling (MTD core) - fix an error check in nandsim """
| * mtd: nand: Support controllers with custom pageMarc Gonzalez2016-11-191-0/+12
| | | | | | | | | | | | | | | | | | If your controller already sends the required NAND commands when reading or writing a page, then the framework is not supposed to send READ0 and SEQIN/PAGEPROG respectively. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * mtd: nand: Wait tCCS after a column changeBoris Brezillon2016-11-071-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Drivers implementing ->cmd_ctrl() and relying on the default ->cmdfunc() implementation usually don't wait tCCS when a column change (RNDIN or RNDOUT) is requested. Add an option flag to ask the core to do so (note that we keep this as an opt-in to avoid breaking existing implementations), and make use of the ->data_interface information is available (otherwise, wait 500ns). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
| * mtd: nand: Add a few more timings to nand_sdr_timingsBoris Brezillon2016-11-071-0/+8
| | | | | | | | | | | | | | | | | | | | | | Add the tR_max, tBERS_max, tPROG_max and tCCS_min timings to the nand_sdr_timings struct. Assign default/safe values for the statically defined timings, and extract them from the ONFI parameter table if the NAND is ONFI compliant. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
* | mtd: nand: Fix data interface configuration logicBoris Brezillon2016-10-281-1/+1
|/ | | | | | | | | | | | | | | | | | | | When changing from one data interface setting to another, one has to ensure a specific sequence which is described in the ONFI spec. One of these constraints is that the CE line has go high after a reset before a command can be sent with the new data interface setting, which is not guaranteed by the current implementation. Rework the nand_reset() function and all the call sites to make sure the CE line is asserted and released when required. Also make sure to actually apply the new data interface setting on the first die. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Fixes: d8e725dd8311 ("mtd: nand: automate NAND timings selection") Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
* Merge tag '4.9/mtd-pairing-scheme' of github.com:linux-nand/linuxBrian Norris2016-10-081-0/+107
|\ | | | | | | Introduction of the MTD pairing scheme concept.
| * mtd: introduce the mtd_pairing_scheme conceptBoris Brezillon2016-09-151-0/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MLC and TLC NAND devices are using NAND cells exposing more than one bit, but instead of attaching all the bits in a given cell to a single NAND page, each bit is usually attached to a different page. This concept is called 'page pairing', and has significant impacts on the flash storage usage. The main problem showed by these devices is that interrupting a page program operation may not only corrupt the page we are programming but also the page it is paired with, hence the need to expose to MTD users the pairing scheme information. The pairing APIs allows one to query pairing information attached to a given page (here called wunit), or the other way around (the wunit pointed by pairing information). It also provides several helpers to help the conversion between absolute offsets and wunits, and query the number of pairing groups. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Brian Norris <computersforpeace@gmail.com>
* | mtd: nand: Provide nand_cleanup() function to free NAND related resourcesRichard Weinberger2016-09-231-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | Provide a nand_cleanup() function to free all nand related resources without unregistering the mtd device. This should allow drivers to call mtd_device_unregister() and handle its return value and still being able to cleanup all nand related resources. Signed-off-by: Richard Weinberger <richard@nod.at> Signed-off-by: Daniel Walter <dwalter@sigma-star.at> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: Add an option to maximize the ECC strengthBoris Brezillon2016-09-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The generic NAND DT bindings allows one to tweak the ECC strength and step size to their need. It can be used to lower the ECC strength to match a bootloader/firmware config, but might also be used to get a better reliability. In the latter case, the user might want to use the maximum ECC strength without having to explicitly calculate the exact value (this value not only depends on the OOB size, but also on the NAND controller, and can be tricky to extract). Add a generic 'nand-ecc-maximize' DT property and the associated NAND_ECC_MAXIMIZE flag, to let ECC controller drivers select the best ECC strength and step-size on their own. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org>
* | mtd: nand: automate NAND timings selectionBoris Brezillon2016-09-231-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The NAND framework provides several helpers to query timing modes supported by a NAND chip, but this implies that all NAND controller drivers have to implement the same timings selection dance. Also currently NAND devices can be resetted at arbitrary places which also resets the timing for ONFI chips to timing mode 0. Provide a common logic to select the best timings based on ONFI or ->onfi_timing_mode_default information. Hook this into nand_reset() to make sure the new timing is applied each time during a reset. NAND controller willing to support timings adjustment should just implement the ->setup_data_interface() method. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | mtd: nand: Expose data interface for ONFI mode 0Sascha Hauer2016-09-231-0/+2
| | | | | | | | | | | | | | | | The nand layer will need ONFI mode 0 to use it as timing mode before and right after reset. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: Add function to convert ONFI mode to data_interfaceSascha Hauer2016-09-231-0/+5
| | | | | | | | | | | | | | | | onfi_init_data_interface() initializes a data interface with values from a given ONFI mode. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: Introduce nand_data_interfaceSascha Hauer2016-09-231-49/+117
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently we have no data structure to fully describe a NAND timing. We only have struct nand_sdr_timings for NAND timings in SDR mode, but nothing for DDR mode and also no container to store both types of timing. This patch adds struct nand_data_interface which stores the timing type and a union of different timings. This can be used to pass to drivers in order to configure the timing. Add kerneldoc for struct nand_sdr_timings while touching it anyway. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: Create a NAND reset functionSascha Hauer2016-09-231-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | When NAND devices are resetted some initialization may have to be done, like for example they have to be configured for the timing mode that shall be used. To get a common place where this initialization can be implemented create a nand_reset() function. This currently only issues a NAND_CMD_RESET to the NAND device. The places issuing this command manually are replaced with a call to nand_reset(). Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: remove unnecessary 'extern' from function declarationsSascha Hauer2016-09-231-15/+15
| | | | | | | | | | | | | | | | | | 'extern' is not necessary for function declarations. To prevent people from adding the keyword to new declarations remove the existing ones. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: nand: import nand_hw_control_init()Marc Gonzalez2016-09-231-0/+7
|/ | | | | | | | The code to initialize a struct nand_hw_control is duplicated across several drivers. Factorize it using an inline function. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* Merge tag 'nand/for-4.8' of github.com:linux-nand/linux into mtdBrian Norris2016-07-151-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull NAND changes from Boris Brezillon: """ This pull request contains only one notable change: * Addition of the MTK NAND controller driver And a bunch of specific NAND driver improvements/fixes. Here are the changes that are worth mentioning: * A few fixes/improvements for the xway NAND controller driver * A few fixes for the sunxi NAND controller driver * Support for DMA in the sunxi NAND driver * Support for the sunxi NAND controller IP embedded in A23/A33 SoCs * Addition for bitflips detection in erased pages to the brcmnand driver * Support for new brcmnand IPs * Update of the OMAP-GPMC binding to support DMA channel description """
| * mtd: nand: add ESMT manufacturerRafał Miłecki2016-06-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | I got device with ESMT (Elite Semiconductor Memory Technology Inc) F59L1G81MA flash that was detected as: [ 0.852034] nand: device found, Manufacturer ID: 0xc8, Chip ID: 0xd1 [ 0.858402] nand: Unknown NAND 128MiB 3,3V 8-bit [ 0.863031] nand: 128MiB, SLC, page size: 2048, OOB size: 64 According to the F59L1G81MA datasheet (and Read Id documentation) C8h is a "Maker Code" which should mean ESMT. Add it to fix above "Unknown". Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
* | mtd: spi-nor: stop passing around retlenMichal Suchanek2016-06-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | Do not pass retlen to hardware driver read/write functions. Update it in spi-nor generic driver instead. Signed-off-by: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by Cyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: Michal Suchanek <hramrach@gmail.com> Tested-by: Michal Suchanek <hramrach@gmail.com>
* | mtd: spi-nor: change return value of read/writeMichal Suchanek2016-06-011-2/+2
|/ | | | | | | | | | | | | | | | | | Change the return value of spi-nor device read and write methods to allow returning amount of data transferred and errors as read(2)/write(2) does. Also, start handling positive returns in spi_nor_read(), since we want to convert drivers to start returning the read-length both via *retlen and the return code. (We don't need to do the same transition process for spi_nor_write(), since ->write() didn't used to have a return code at all.) Signed-off-by: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by Cyrille Pitchen <cyrille.pitchen@atmel.com> Acked-by: Michal Suchanek <hramrach@gmail.com> Tested-by: Michal Suchanek <hramrach@gmail.com>
* mtd: spi-nor: support GigaDevice gd25lq64cBrian Norris2016-05-101-0/+1
| | | | | | | | | | | Also note the GigaDevice JEDEC ID. No write-protect support yet, since this flash uses a different status register layout. Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Marek Vasut <marex@denx.de>
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