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* [PATCH] PCI: fix sparse warning about pci_bus_flagsRoland Dreier2006-04-141-1/+1
| | | | | | | | | | | | | Sparse warns about casting to a __bitwise type. However, it's correct to do when defining the enum for pci_bus_flags_t, so add a __force to quiet the warnings. This will fix getting include/linux/pci.h:100:26: warning: cast to restricted type from sparse all over the build. Signed-off-by: Roland Dreier <rolandd@cisco.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: MSI(X) save/restore for suspend/resumeShaohua Li2006-04-141-0/+31
| | | | | | | Add MSI(X) configure sapce save/restore in generic PCI helper. Signed-off-by: Shaohua Li <shaohua.li@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: fix pci_request_region[s] argJeff Garzik2006-03-231-2/+2
| | | | | | | | Add missing 'const' to pci_request_region[s] 'res_name' arg, since we pass it directly to __request_region(), whose 'name' arg is also const. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: make MSI quirk inheritable from the pci busMichael S. Tsirkin2006-03-231-1/+6
| | | | | | | | It turns out AMD 8131 quirk only affects MSI for devices behind the 8131 bridge. Handle this by adding a flags field in pci_bus, inherited from parent to child. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: return max reserved busnrKristen Accardi2006-03-231-0/+1
| | | | | | | | Change the semantics of this call to return the max reserved bus number instead of just the max assigned bus number. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: drivers/pci/pci.c: #if 0 pci_find_ext_capability()Adrian Bunk2006-01-311-2/+0
| | | | | | | This patch #if 0's the unused global function pci_find_ext_capability(). Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI Error Recovery: header file patchlinas2006-01-091-0/+67
| | | | | | | | | | | | Various PCI bus errors can be signaled by newer PCI controllers. Recovering from those errors requires an infrastructure to notify affected device drivers of the error, and a way of walking through a reset sequence. This patch adds a set of callbacks to be used by error recovery routines to notify device drivers of the various stages of recovery. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Export pci_cfg_space_sizeBenjamin Herrenschmidt2006-01-091-0/+1
| | | | | | | | | | The powerpc PCI code sets up the PCI tree without doing config space accesses in most cases, from the firmware tree. However, it still wants to call pci_cfg_space_size() under some conditions, thus it needs to be made non-static (though I don't see a point to export it to modules). Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] pci: store PCI_INTERRUPT_PIN in pci_devKristen Accardi2006-01-091-0/+1
| | | | | | | | Store the value of the INTERRUPT_PIN in the pci_dev structure so that it can be retrieved later. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: removed unneeded .owner field from struct pci_driverGreg Kroah-Hartman2005-11-101-1/+0
| | | | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: automatically set device_driver.ownerLaurent riffard2005-11-101-2/+8
| | | | | | | | | | | | | | | | | | | | | | | A nice feature of sysfs is that it can create the symlink from the driver to the module that is contained in it. It requires that the device_driver.owner is set, what is not the case for many PCI drivers. This patch allows pci_register_driver to set automatically the device_driver.owner for any PCI driver. Credits to Al Viro who suggested the method. Signed-off-by: Laurent Riffard <laurent.riffard@free.fr> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> -- drivers/ide/setup-pci.c | 12 +++++++----- drivers/pci/pci-driver.c | 9 +++++---- include/linux/ide.h | 3 ++- include/linux/pci.h | 10 ++++++++-- 4 files changed, 22 insertions(+), 12 deletions(-)
* [PATCH] PCI: add pci_find_next_capability()Roland Dreier2005-11-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices have more than one capability of the same type. For example, the PCI header for the PathScale InfiniPath looks like: 04:01.0 InfiniBand: Unknown device 1fc1:000d (rev 02) Subsystem: Unknown device 1fc1:000d Flags: bus master, fast devsel, latency 0, IRQ 193 Memory at fea00000 (64-bit, non-prefetchable) [size=2M] Capabilities: [c0] HyperTransport: Slave or Primary Interface Capabilities: [f8] HyperTransport: Interrupt Discovery and Configuration There are _two_ HyperTransport capabilities, and the PathScale driver wants to look at both of them. The current pci_find_capability() API doesn't work for this, since it only allows us to get to the first capability of a given type. The patch below introduces a new pci_find_next_capability(), which can be used in a loop like for (pos = pci_find_capability(pdev, <ID>); pos; pos = pci_find_next_capability(pdev, pos, <ID>)) { /* ... */ } Signed-off-by: Roland Dreier <rolandd@cisco.com> Signed-off-by: Matthew Wilcox <matthew@wil.cx> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Block config access during BISTBrian King2005-10-281-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some PCI adapters (eg. ipr scsi adapters) have an exposure today in that they issue BIST to the adapter to reset the card. If, during the time it takes to complete BIST, userspace attempts to access PCI config space, the host bus bridge will master abort the access since the ipr adapter does not respond on the PCI bus for a brief period of time when running BIST. On PPC64 hardware, this master abort results in the host PCI bridge isolating that PCI device from the rest of the system, making the device unusable until Linux is rebooted. This patch is an attempt to close that exposure by introducing some blocking code in the PCI code. When blocked, writes will be humored and reads will return the cached value. Ben Herrenschmidt has also mentioned that he plans to use this in PPC power management. Signed-off-by: Brian King <brking@us.ibm.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/pci/access.c | 89 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/pci-sysfs.c | 20 +++++----- drivers/pci/pci.h | 7 +++ drivers/pci/proc.c | 28 +++++++-------- drivers/pci/syscall.c | 14 +++---- include/linux/pci.h | 7 +++ 6 files changed, 134 insertions(+), 31 deletions(-)
* Remove "must_check" attributes in PCI-landLinus Torvalds2005-09-091-8/+8
| | | | | | | | Don't just irritate all other kernel developers. Fix the users first, then you can re-introduce the must-check infrastructure to avoid new cases creeping in. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6 Linus Torvalds2005-09-091-10/+13
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| * [PATCH] PCI: Small rearrangement of PCI probing codePaul Mackerras2005-09-091-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | This patch makes some small rearrangements of the PCI probing code in order to make it possible for arch code to set up the PCI tree without needing to duplicate code from the PCI layer unnecessarily. PPC64 will use this to set up the PCI tree from the Open Firmware device tree, which we need to do on logically-partitioned pSeries systems. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| * [PATCH] must_check attributes for PCI layer.Dave Jones2005-09-091-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | Self explanatory really. Some newer gcc's print a warning if a function is used and we don't check its result. We do this for a bunch of things in the kernel already, this extends that to the PCI layer. Based on a patch originally from Arjan van de Ven. Signed-off-by: Dave Jones <davej@redhat.com> Signed-off-by: Arjan van de Ven <arjan@infradead.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* | [PATCH] yenta: share code with PCI coreDominik Brodowski2005-09-091-0/+1
|/ | | | | | | | | | | | Share code between setup-bus.c and yenta_socket.c: use the write-out code of resources to the bridge also in yenta_socket.c, as it provides useful debug output. In addition, it fixes the bug that the CPU-centric resource view might need to be transferred to the PCI-centric view: setup-bus.c does that, while yenta-socket.c did not. Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI/libata INTx cleanupBrett M Russ2005-09-081-0/+1
| | | | | | | | | Simple cleanup to eliminate X copies of the pci_enable_intx() function in libata. Moved ahci.c's pci_intx() to pci.c and use it throughout libata and msi.c. Signed-off-by: Brett Russ <russb@emc.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Support PCM PM CAP version 3Daniel Ritz2005-09-081-0/+1
| | | | | | | | | | | | | - support PCI PM CAP version 3 (as defined in PCI PM Interface Spec v1.2) - pci/probe.c sets the PM state initially to 4 which is D3cold. add a PCI_UNKNOWN - minor cleanups Signed-off-by: Daniel Ritz <daniel.ritz@gmx.ch> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Add pci_walk_bus function to PCI core (nonrecursive)Paul Mackerras2005-09-081-0/+3
| | | | | | | | | | | | | | | | | | | | The PCI error recovery infrastructure needs to be able to contact all the drivers affected by a PCI error event, which may mean traversing all the devices under a given PCI-PCI bridge. This patch adds a function to the PCI core that traverses all the PCI devices on a PCI bus and under any PCI-PCI bridges on that bus (and so on), calling a given function for each device. This provides a way for the error recovery code to iterate through all devices that are affected by an error event. This version is not implemented as a recursive function. Instead, when we reach a PCI-PCI bridge, we set the pointers to start doing the devices on the bus under the bridge, and when we reach the end of a bus's devices, we use the bus->self pointer to go back up to the next higher bus and continue doing its devices. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need itJohn W. Linville2005-09-081-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration (including BARs) when transitioning from D3hot->D0. This leaves such a device in an inaccessible state. The patch below causes the BARs to be restored when enabling such a device, so that its driver will be able to access it. The patch also adds pci_restore_bars as a new global symbol, and adds a correpsonding EXPORT_SYMBOL_GPL for that. Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a (re)boot. Most drivers call pci_enable_device very early, so devices left in D3hot that lose configuration during the D3hot->D0 transition will be inaccessible to their drivers. Drivers could be modified to account for this, but it would be difficult to know which drivers need modification. This is especially true since often many devices are covered by the same driver. It likely would be necessary to replicate code across dozens of drivers. The patch below should trigger only when transitioning from D3hot->D0 (or at boot), and only for devices that have the "no soft reset" bit cleared in the PM control register. I believe it is safe to include this patch as part of the PCI infrastructure. The cleanest implementation of pci_restore_bars was to call pci_update_resource. Unfortunately, that does not currently exist for the sparc64 architecture. The patch below includes a null implemenation of pci_update_resource for sparc64. Some have expressed interest in making general use of the the pci_restore_bars function, so that has been exported to GPL licensed modules. Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: clean up pci.h and split pci register info to separate header file.Greg Kroah-Hartman2005-09-081-458/+30
| | | | | | | | This cleans up some of the #ifdef CONFIG_PCI stuff up, and moves the pci register info out to a separate file, where it belongs. Eventually we can stop including this file from within pci.h, but lots of code needs to be audited first. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: remove CONFIG_PCI_NAMESAdrian Bunk2005-09-081-14/+0
| | | | | | | This patch removes CONFIG_PCI_NAMES. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Move PCI fixup data into r/o sectionakpm@osdl.org2005-09-081-1/+1
| | | | | | | | | | | Make PCI fixup data const, so it'll end up in a r/o section. This also fixes the conversion into ECOFF which gets broken by too many changes between r/w and r/o sections. Call it a hack but it's a change that's correct by itself. Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: 6700/6702PXH quirkKristen Accardi2005-08-161-1/+2
| | | | | | | | | | | | | On the 6700/6702 PXH part, a MSI may get corrupted if an ACPI hotplug driver and SHPC driver in MSI mode are used together. This patch will prevent MSI from being enabled for the SHPC as part of an early pci quirk, as well as on any pci device which sets the no_msi bit. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Revert "[PATCH] PCI: restore BAR values..."Linus Torvalds2005-08-081-3/+0
| | | | | | | Revert commit fec59a711eef002d4ef9eb8de09dd0a26986eb77, which is breaking sparc64 that doesn't have a working pci_update_resource. We'll re-do this after 2.6.13 when we'll do it all properly.
* [PATCH] PCI: restore BAR values after D3hot->D0 for devices that need itJohn W. Linville2005-08-041-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some PCI devices (e.g. 3c905B, 3c556B) lose all configuration (including BARs) when transitioning from D3hot->D0. This leaves such a device in an inaccessible state. The patch below causes the BARs to be restored when enabling such a device, so that its driver will be able to access it. The patch also adds pci_restore_bars as a new global symbol, and adds a correpsonding EXPORT_SYMBOL_GPL for that. Some firmware (e.g. Thinkpad T21) leaves devices in D3hot after a (re)boot. Most drivers call pci_enable_device very early, so devices left in D3hot that lose configuration during the D3hot->D0 transition will be inaccessible to their drivers. Drivers could be modified to account for this, but it would be difficult to know which drivers need modification. This is especially true since often many devices are covered by the same driver. It likely would be necessary to replicate code across dozens of drivers. The patch below should trigger only when transitioning from D3hot->D0 (or at boot), and only for devices that have the "no soft reset" bit cleared in the PM control register. I believe it is safe to include this patch as part of the PCI infrastructure. The cleanest implementation of pci_restore_bars was to call pci_update_resource. Unfortunately, that does not currently exist for the sparc64 architecture. The patch below includes a null implemenation of pci_update_resource for sparc64. Some have expressed interest in making general use of the the pci_restore_bars function, so that has been exported to GPL licensed modules. Signed-off-by: John W. Linville <linville@tuxdriver.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI: fix up errors after dma bursting patch and CONFIG_PCI=n -- bug?Kumar Gala2005-07-291-3/+2
| | | | | | | | | | | | | | In the patch from: http://www.uwsg.iu.edu/hypermail/linux/kernel/0506.3/0985.html Is the the following line suppose inside the if CONFIG_PCI=n #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI: clean up dynamic pci id logicGreg Kroah-Hartman2005-07-011-1/+2
| | | | | | | | | | | | | | | | | The dynamic pci id logic has been bothering me for a while, and now that I started to look into how to move some of this to the driver core, I thought it was time to clean it all up. It ends up making the code smaller, and easier to follow, and fixes a few bugs at the same time (dynamic ids were not being matched everywhere, and so could be missed on some call paths for new devices, semaphore not needed to be grabbed when adding a new id and calling the driver core, etc.) I also renamed the function pci_match_device() to pci_match_id() as that's what it really does. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Increase the number of PCI bus resourcesrajesh.shah@intel.com2005-07-011-1/+1
| | | | | | | | | | | | This patch increases the number of resource pointers in the pci_bus structure. This is needed to store >4 resource ranges for host bridges and transparent PCI bridges. With this change, all PCI buses will have more resource pointers, but most PCI buses will only use the first 3 or 4, the remaining being NULL. The PCI core already deals with this correctly. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: fix up errors after dma bursting patch and CONFIG_PCI=nAndrew Morton2005-06-271-0/+2
| | | | | | | | | | | | | | | | | | With CONFIG_PCI=n: In file included from include/linux/pci.h:917, from lib/iomap.c:6: include/asm/pci.h:104: warning: `enum pci_dma_burst_strategy' declared inside parameter list include/asm/pci.h:104: warning: its scope is only this definition or declaration, which is probably not what you want. include/asm/pci.h: In function `pci_dma_burst_advice': include/asm/pci.h:106: dereferencing pointer to incomplete type include/asm/pci.h:106: `PCI_DMA_BURST_INFINITY' undeclared (first use in this function) include/asm/pci.h:106: (Each undeclared identifier is reported only once include/asm/pci.h:106: for each function it appears in.) make[1]: *** [lib/iomap.o] Error 1 Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: DMA bursting adviceDavid S. Miller2005-06-271-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After seeing, at best, "guesses" as to the following kind of information in several drivers, I decided that we really need a way for platforms to specifically give advice in this area for what works best with their PCI controller implementation. Basically, this new interface gives DMA bursting advice on PCI. There are three forms of the advice: 1) Burst as much as possible, it is not necessary to end bursts on some particular boundary for best performance. 2) Burst on some byte count multiple. A DMA burst to some multiple of number of bytes may be done, but it is important to end the burst on an exact multiple for best performance. The best example of this I am aware of are the PPC64 PCI controllers, where if you end a burst mid-cacheline then chip has to refetch the data and the IOMMU translations which hurts performance a lot. 3) Burst on a single byte count multiple. Bursts shall end exactly on the next multiple boundary for best performance. Sparc64 and Alpha's PCI controllers operate this way. They disconnect any device which tries to burst across a cacheline boundary. Actually, newer sparc64 PCI controllers do not have this behavior. That is why the "pdev" is passed into the interface, so I can add code later to check which PCI controller the system is using and give advice accordingly. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: fix-pci-mmap-on-ppc-and-ppc64.patchMichael Ellerman2005-06-271-0/+14
| | | | | | | | | | | | | | | | | | | | | | | This is an updated version of Ben's fix-pci-mmap-on-ppc-and-ppc64.patch which is in 2.6.12-rc4-mm1. It fixes the patch to work on PPC iSeries, removes some debug printks at Ben's request, and incorporates your fix-pci-mmap-on-ppc-and-ppc64-fix.patch also. Originally from Benjamin Herrenschmidt <benh@kernel.crashing.org> This patch was discussed at length on linux-pci and so far, the last iteration of it didn't raise any comment. It's effect is a nop on architecture that don't define the new pci_resource_to_user() callback anyway. It allows architecture like ppc who put weird things inside of PCI resource structures to convert to some different value for user visible ones. It also fixes mmap'ing of IO space on those archs. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] acpi bridge hotadd: ACPI based root bridge hot-addRajesh Shah2005-06-271-2/+6
| | | | | | | | | | | | | | | | | | | When you hot-plug a (root) bridge hierarchy, it may have p2p bridges and devices attached to it that have not been configured by firmware. In this case, we need to configure the devices before starting them. This patch separates device start from device scan so that we can introduce the configuration step in the middle. I kept the existing semantics for pci_scan_bus() since there are a huge number of callers to that function. Also, I have no way of testing the changes I made to the parisc files, so this needs review by those folks. Sorry for the massive cross-post, this touches files in many different places. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: drivers/pci/pci.c: remove pci_dac_set_dma_maskAdrian Bunk2005-05-031-2/+0
| | | | | | | pci_dac_set_dma_mask is currently completely unused. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Add pci shutdown abilityGreg KH2005-05-031-0/+1
| | | | | | | Now pci drivers can know when the system is going down without having to add a reboot notifier event. Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] pm_message_t: more fixes in common and i386Pavel Machek2005-04-161-2/+3
| | | | | | | | | | I thought I'm done with fixing u32 vs. pm_message_t ... unfortunately that turned out not to be the case as Russel King pointed out. Here are fixes for Documentation and common code (mainly system devices). Signed-off-by: Pavel Machek <pavel@suse.cz> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Linux-2.6.12-rc2v2.6.12-rc2Linus Torvalds2005-04-161-0/+1067
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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