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* | | ASoC: rt1318: Use maple tree register cacheMark Brown2023-06-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rt1318 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Tested-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-rt-sdw-maple-v1-8-85ee50c93905@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: rt1316: Use maple tree register cacheMark Brown2023-06-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rt1316 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Tested-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-rt-sdw-maple-v1-7-85ee50c93905@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: rt1308: Use maple tree register cacheMark Brown2023-06-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rt1308 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Tested-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-rt-sdw-maple-v1-6-85ee50c93905@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: rt722: Use maple tree register cacheMark Brown2023-06-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rt722 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Tested-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-rt-sdw-maple-v1-5-85ee50c93905@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: rt715: Use maple tree register cacheMark Brown2023-06-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rt715 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Tested-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-rt-sdw-maple-v1-4-85ee50c93905@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: rt712: Use maple tree register cacheMark Brown2023-06-142-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rt712 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Tested-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-rt-sdw-maple-v1-3-85ee50c93905@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: rt711: Use maple tree register cacheMark Brown2023-06-142-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rt711 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Tested-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-rt-sdw-maple-v1-2-85ee50c93905@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: rt700: Use maple tree register cacheMark Brown2023-06-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The rt700 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Tested-by: Bard Liao <yung-chuan.liao@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-rt-sdw-maple-v1-1-85ee50c93905@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs35l30: Use maple tree register cacheMark Brown2023-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cs35l30 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-10-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs43130: Use maple tree register cacheMark Brown2023-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cs43130 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-9-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs42l83: Use maple tree register cacheMark Brown2023-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cs42l83 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-8-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs42l73: Use maple tree register cacheMark Brown2023-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cs42l73 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-7-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs42l42: Use maple tree register cacheMark Brown2023-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cs42l42 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-6-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs4234: Use maple tree register cacheMark Brown2023-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cs4234 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-5-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs35l35: Use maple tree register cacheMark Brown2023-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cs35l35 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-4-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs35l34: Use maple tree register cacheMark Brown2023-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cs35l34 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-3-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs35l33: Use maple tree register cacheMark Brown2023-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cs35l33 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-2-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs35l32: Use maple tree register cacheMark Brown2023-06-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cs35l32 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-1-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: Switch two more i2c drivers back to use .probe()Uwe Kleine-König2023-06-122-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous conversion back to .probe() applied in commit 9abcd24002bf ("ASoC: Switch i2c drivers back to use .probe()") was created based on v6.3. Since then two more drivers were added which need to be convert back in the same way before eventually .probe_new() can be dropped from struct i2c_driver. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230612070608.836186-1-u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: max98088: clean up some inconsistent indentingJiapeng Chong2023-06-081-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | No functional modification involved. sound/soc/codecs/max98088.c:316 m98088_eq_band() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=5461 Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Link: https://lore.kernel.org/r/20230608075540.61575-1-jiapeng.chong@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: codecs: wsa883x: use existing define instead of raw valueKrzysztof Kozlowski2023-06-071-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use existing define for WSA883X_GLOBAL_PA_ENABLE instead of hard-coded value, just like in other places in this driver. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230607171326.179527-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: nau8825: Update output control for NAU8825CDavid Lin2023-06-021-10/+37
| | | | | | | | | | | | | | | | | | | | | | | | Update the output control for NAU8825C. Signed-off-by: David Lin <CTLIN0@nuvoton.com> Link: https://lore.kernel.org/r/20230602040924.188913-4-CTLIN0@nuvoton.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: nau8825: Update the calculation of FLL for NAU8825CDavid Lin2023-06-021-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | The FLL is updated to 24 bit with lower power consumption. Signed-off-by: David Lin <CTLIN0@nuvoton.com> Link: https://lore.kernel.org/r/20230602040924.188913-3-CTLIN0@nuvoton.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: nau8825: Add registers patch for NAU8825CDavid Lin2023-06-022-3/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | The patch is to update default regmap and register a set of registers for NAU8825C. Signed-off-by: David Lin <CTLIN0@nuvoton.com> Link: https://lore.kernel.org/r/20230602040924.188913-2-CTLIN0@nuvoton.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: nau8825: Add the management of headset detection for power savingDavid Lin2023-05-311-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch is to manage HSD feature for power saving. The detail is to disable HSD feature after the headset detection is done. When the jack is inserted, the HSD feature will be enabled again. Signed-off-by: David Lin <CTLIN0@nuvoton.com> Link: https://lore.kernel.org/r/20230531075334.168637-1-CTLIN0@nuvoton.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ES8316 audio codec fixes on Rock5BMark Brown2023-05-302-10/+16
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Cristian Ciocaltea <cristian.ciocaltea@collabora.com>: This patch series handles a few issues related to the ES8316 audio codec, discovered while doing some testing on the Rock 5B board.
| * | | ASoC: es8316: Do not set rate constraints for unsupported MCLKsCristian Ciocaltea2023-05-301-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using the codec through the generic audio graph card, there are at least two calls of es8316_set_dai_sysclk(), with the effect of limiting the allowed sample rates according to the MCLK/LRCK ratios supported by the codec: 1. During audio card setup, to set the initial MCLK - see asoc_simple_init_dai(). 2. Before opening a stream, to update MCLK, according to the stream sample rate and the multiplication factor - see asoc_simple_hw_params(). In some cases the initial MCLK might be set to a frequency that doesn't match any of the supported ratios, e.g. 12287999 instead of 12288000, which is only 1 Hz below the supported clock, as that is what the hardware reports. This creates an empty list of rate constraints, which is further passed to snd_pcm_hw_constraint_list() via es8316_pcm_startup(), and causes the following error on the very first access of the sound card: $ speaker-test -D hw:Analog,0 -F S16_LE -c 2 -t wav Broken configuration for playback: no configurations available: Invalid argument Setting of hwparams failed: Invalid argument Note that all subsequent retries succeed thanks to the updated MCLK set at point 2 above, which uses a computed frequency value instead of a reading from the hardware registers. Normally this would have mitigated the issue, but es8316_pcm_startup() executes before the 2nd call to es8316_set_dai_sysclk(), hence it cannot make use of the updated constraints. Since es8316_pcm_hw_params() performs anyway a final validation of MCLK against the stream sample rate and the supported MCLK/LRCK ratios, fix the issue by ensuring that sysclk_constraints list is only set when at least one supported sample rate is autodetected by the codec. Fixes: b8b88b70875a ("ASoC: add es8316 codec driver") Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20230530181140.483936-3-cristian.ciocaltea@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | ASoC: es8316: Increment max value for ALC Capture Target Volume controlCristian Ciocaltea2023-05-301-2/+7
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following error occurs when trying to restore a previously saved ALSA mixer state (tested on a Rock 5B board): $ alsactl --no-ucm -f /tmp/asound.state store hw:Analog $ alsactl --no-ucm -I -f /tmp/asound.state restore hw:Analog alsactl: set_control:1475: Cannot write control '2:0:0:ALC Capture Target Volume:0' : Invalid argument According to ES8316 datasheet, the register at address 0x2B, which is related to the above mixer control, contains by default the value 0xB0. Considering the corresponding ALC target bits (ALCLVL) are 7:4, the control is initialized with 11, which is one step above the maximum value allowed by the driver: ALCLVL | dB gain -------+-------- 0000 | -16.5 0001 | -15.0 0010 | -13.5 .... | ..... 0111 | -6.0 1000 | -4.5 1001 | -3.0 1010 | -1.5 .... | ..... 1111 | -1.5 The tests performed using the VU meter feature (--vumeter=TYPE) of arecord/aplay confirm the specs are correct and there is no measured gain if the 1011-1111 range would have been mapped to 0 dB: dB gain | VU meter % --------+----------- -6.0 | 30-31 -4.5 | 35-36 -3.0 | 42-43 -1.5 | 50-51 0.0 | 50-51 Increment the max value allowed for ALC Capture Target Volume control, so that it matches the hardware default. Additionally, update the related TLV to prevent an artificial extension of the dB gain range. Fixes: b8b88b70875a ("ASoC: add es8316 codec driver") Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20230530181140.483936-2-cristian.ciocaltea@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | ASoC: cs35l56: Prevent unbalanced pm_runtime in dsp_work() on SoundWireSimon Trimmer2023-05-151-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Flush the SoundWire interrupt handler work instead of cancelling it. When a SoundWire interrupt is triggered the pm_runtime is held until the work has completed. It's therefore unsafe to cancel the work, it must be flushed. Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com Link: https://lore.kernel.org/r/20230512144237.739000-1-rf@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org
* | | ASoC: cs42l42: Add PLL ratio table valuesVitaly Rodionov2023-05-251-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 4.8Mhz 9.6Mhz and 19.2MHz SCLK values for MCLK 12MHz and 12.288MHz requested by Intel. Signed-off-by: Vitaly Rodionov <vitalyr@opensource.cirrus.com> Reviewed-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230524125236.57149-1-vitalyr@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs35l45: Relicense to GPL onlyCharles Keepax2023-05-255-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cirrus never intended to upstream dual licensed code, convert to GPL only. Signed-off-by: Charles Keepax <ckeepax@opensource.cirrus.com> Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Richard Fitzgerald <rf@opensource.cirrus.com> Reviewed-by: Vlad Karpovich <vkarpovi@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230510092534.3919120-1-ckeepax@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: da7219: Add jack insertion detection polarityMark Brown2023-05-231-4/+38
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from David Rau <David.Rau.opensource@dm.renesas.com>: This patchset adds the support of DA7219 Jack insertion detection polarity selection. The first patch replaces the old txt binding with a new schema binding. The second patch adds `dlg,jack-ins-det-pty` property for Jack insertion detection polarity selection. The last patch adds the driver support for this topic. The series has been verified on the DA7219 development kit.
| * | | ASoC: da7219: Add Jack insertion detection polarityDavid Rau2023-05-231-4/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support of selecting insertion detection polarity - Default polarity (Low) - Inverted polarity (High) Correct the keywords of parsing `dlg,jack-det-rate` bases on the new DT binding. Signed-off-by: David Rau <David.Rau.opensource@dm.renesas.com> Link: https://lore.kernel.org/r/20230523161821.4260-4-David.Rau.opensource@dm.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | | ASoC: mt6359: kselftest fix and driver extensionMark Brown2023-05-231-15/+137
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Trevor Wu <trevor.wu@mediatek.com>: The patch series includes a kselftest fix and changes for extending driver capability to support more use cases.
| * | | | ASoC: mediatek: mt6359: update route for lineout muxTrevor Wu2023-05-231-9/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Originally, lineout playback source can only be DAC_3RD. Some SoC masters only support stereo MTKAIF outputs, so lineout path can't be used in such case. MTKAIF connections are as follows. MOSI0 -> DAC_L MOSI1 -> DAC_R MOSI2 -> DAC_3rd In the patch, lineout playback source can be chosen between DAC_L and DAC_3rd, so sound can be outputted via lineout even though SoC only supports stereo MTKAIF outputs. Signed-off-by: Trevor Wu <trevor.wu@mediatek.com> Link: https://lore.kernel.org/r/20230508071532.21665-5-trevor.wu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | ASoC: mediatek: mt6359: add mtkaif gpio settingTrevor Wu2023-05-231-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add mtkaif gpio driving to increase signal strength and smt setting to prevent from overshooting. Signed-off-by: Trevor Wu <trevor.wu@mediatek.com> Link: https://lore.kernel.org/r/20230508071532.21665-4-trevor.wu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | ASoC: mediatek: mt6359: fix kselftest error of playback gainTrevor Wu2023-05-231-6/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | kselftest tries to read/write the default value. The default register value of playback gain is 0x1F(mute), but max gain we specified is 0x12. The range of the control is 0x0~0x12 and mute(0x1F) is only used in the driver internally. To solve the problem, implement a new callback mt6359_get_playback_volsw to report user configured volume instead of the register value. In addition, update max of "Headset Volume" to 0x12, so it can match the maximum seen on latest data sheet. Signed-off-by: Trevor Wu <trevor.wu@mediatek.com> Link: https://lore.kernel.org/r/20230508071532.21665-3-trevor.wu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | | ASoC: mediatek: mt6359: add supply for MTKAIFTrevor Wu2023-05-231-0/+4
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are three output data pins MISO0, MISO1 and MISO2 for mt6359. UL_SRC should be enabled when MISO0 or MISO1 is used, and UL_SRC_34 should be enabled when MISO2 is used. Signed-off-by: Trevor Wu <trevor.wu@mediatek.com> Link: https://lore.kernel.org/r/20230508071532.21665-2-trevor.wu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | | ASoC: do not include runtime_pm.h if not neededMark Brown2023-05-2310-10/+1
|\ \ \ \ | |/ / / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Claudiu Beznea <claudiu.beznea@microchip.com>: Series removes the pm_runtime.h inclusion in files where APIs exported though pm_runtime.h are not used. In case of files that make use of pm.h which comes form pm_runtime.h added patch 2/2.
| * | | ASoC: use pm.h instead of runtime_pm.hClaudiu Beznea2023-05-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not include pm_runtime.h header in files where runtime PM support is not implemented. Use pm.h instead as suspend to RAM specific implementation is available. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Link: https://lore.kernel.org/r/20230517094903.2895238-3-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | ASoC: do not include pm_runtime.h if not usedClaudiu Beznea2023-05-239-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Do not include pm_runtime.h header in files where APIs exported by pm_runtime.h are not used. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Jarkko Nikula <jarkko.nikula@bitmer.com> # for omap-mcbsp-st.c Link: https://lore.kernel.org/r/20230517094903.2895238-2-claudiu.beznea@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | | ASoC: nau8825: Add pre-charge actions for inputDavid Lin2023-05-232-2/+35
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding pre-charge actions to make FEPGA power stable faster. It improve the recording quality at the beginning. Thus, it is also meaningfully to decrease the final adc delay time. Signed-off-by: David Lin <CTLIN0@nuvoton.com> Link: https://lore.kernel.org/r/20230523083303.98436-1-CTLIN0@nuvoton.com Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: rt5682s: Use the devm_clk_get_optional() helperChristophe JAILLET2023-05-221-8/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use devm_clk_get_optional() instead of hand writing it. This saves some LoC and improves the semantic. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/f538c24ad7b1926478347a03b5b7f0432e195e3b.1684594691.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs53l30: Use the devm_clk_get_optional() helperChristophe JAILLET2023-05-221-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use devm_clk_get_optional() instead of hand writing it. This saves some LoC and improves the semantic. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/3219effee5c7f190530bdb1ef8ec35cb142e3611.1684594433.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: rt5659: Use the devm_clk_get_optional() helperChristophe JAILLET2023-05-221-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use devm_clk_get_optional() instead of hand writing it. This saves some LoC and improves the semantic. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/5b44b2fddd8973e949e4ae2132971b147cfd1ec1.1684594544.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs42l51: Use the devm_clk_get_optional() helperChristophe JAILLET2023-05-221-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use devm_clk_get_optional() instead of hand writing it. This saves some LoC and improves the semantic. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/3debf3bb7ea504ee9ca2d8eb0f948a426681cbdd.1684594240.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: adau1761: Use the devm_clk_get_optional() helperChristophe JAILLET2023-05-221-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use devm_clk_get_optional() instead of hand writing it. This saves some LoC and improves the semantic. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/ab0fe7e7ecf965df84b9516ba65428af9b3805c1.1684594081.git.christophe.jaillet@wanadoo.fr Signed-off-by: Mark Brown <broonie@kernel.org>
* | | ASoC: cs35l56: Bugfixes and efficiency improvementMark Brown2023-05-191-19/+46
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Merge series from Richard Fitzgerald <rf@opensource.cirrus.com>: First two patches are bugfixes. Third patch skips the overhead of rebooting the amp after applying firmware files when we know that it isn't necessary.
| * | | ASoC: cs35l56: In secure mode skip SHUTDOWN and RESET around fw downloadSimon Trimmer2023-05-191-10/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the device is in secure mode it's unnecessary to send a SHUTDOWN and SYSTEM_RESET around the firmware download. It could only be patching insecure tunings. A tuning patch doesn't need a SHUTDOWN and only needs a REINIT afterwards. This will reduce the overhead of exiting system suspend in secure mode. Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com> Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/Message-Id: <20230518150250.1121006-4-rf@opensource.cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org>
| * | | ASoC: cs35l56: sdw_write_no_pm() should be performed under a pm_runtime requestSimon Trimmer2023-05-191-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SoundWire bus accesses must be performed under the guard of a pm_runtime request, in this case the write was being performed just after the request had been put() and so the bus could not be guaranteed to be available. Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com> Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com> Link: https://lore.kernel.org/r/Message-Id: <20230518150250.1121006-3-rf@opensource.cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.46.0) at 2025-04-24 09:17:33 +0000