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* tools/power turbostat: version 2022.07.28Len Brown2022-07-281-1/+1
| | | | | | update version number Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: do not decode ACC for ICX and SPRArtem Bityutskiy2022-07-281-2/+0
| | | | | | | | | | The ACC (automatic C-state conversion) feature was available on Sky Lake and Cascade Lake Xeons (SKX and CLX), but it is not available on Ice Lake and Sapphire Rapids Xeons (ICX and SPR). Therefore, stop decoding it for ICX and SPR. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: fix SPR PC6 limitsArtem Bityutskiy2022-07-281-1/+1
| | | | | | | | | | Sapphire Rapids Xeon (SPR) supports 2 flavors of PC6 - PC6N (non-retention) and PC6R (retention). Before this patch we used ICX package C-state limits, which was wrong, because ICX has only one PC6 flavor. With this patch, we use SKX PC6 limits for SPR, because they are the same. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: cleanup 'automatic_cstate_conversion_probe()'Artem Bityutskiy2022-07-281-1/+9
| | | | | | | | | The 'automatic_cstate_conversion_probe()' function has a too long 'if' statement, convert it to a 'switch' statement in order to improve code readability a bit. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: separate SPR from ICXArtem Bityutskiy2022-07-281-5/+26
| | | | | | | | | | | | Before this patch, SPR platform was considered identical to ICX platform. This patch separates SPR support from ICX. This patch is a preparation for adding SPR-specific package C-state limits support. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Reviewed-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbosstat: fix commentJiang Jian2022-07-281-1/+1
| | | | | | | remove duplicate "the" in comment Signed-off-by: Jiang Jian <jiangjian@cdjrlc.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Support RAPTORLAKE PGeorge D Sworo2022-07-281-0/+1
| | | | | | | Add initial support for Raptorlake model Signed-off-by: George D Sworo <george.d.sworo@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: add support for ALDERLAKE_NZhang Rui2022-07-281-0/+1
| | | | | | | Add support for ALDERLAKE_N platform. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: dump secondary Turbo-Ratio-LimitLen Brown2022-07-281-5/+10
| | | | | | | | | | Intel Performance Hybrid processors have a 2nd MSR describing the turbo limits enforced on the Ecores. Note, TRL and Secondary-TRL are usually R/O information, but on overclock-capable parts, they can be written. Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: simplify dump_turbo_ratio_limits()Len Brown2022-07-281-46/+9
| | | | | | | code cleanup only. no functional change. Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: dump CPUID.7.EDX.HybridLen Brown2022-07-281-1/+5
| | | | | | CPUID leaf 7 EDX now tells us if the processor has hybrid CPUs Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: update turbostat.8Len Brown2022-07-281-76/+124
| | | | | | | Update turbostat.8 to reflect new uncore frequency output (UncMHz) Also, refresh examples. Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Show uncore frequencyLen Brown2022-07-281-1/+88
| | | | | | | | | | | | | | | | | | | | | | | When CONFIG_INTEL_UNCORE_FREQ_CONTROL is effective, (Linux 5.9 and later), print the current (and default) min and max uncore frequency limits. When that driver provides the current uncore frequency (Linux 5.18 and later), print a UncMHz column reflecting the current uncore frequency. Note that UncMHz is an instantaneous sample, not an average. eg. $ sudo ./turbostat -S --show frequency ... Uncore Frequency pkg0 die0: 800 - 3900 MHz (800 - 3900 MHz) ... Avg_MHz Busy% Bzy_MHz TSC_MHz UncMHz 28 0.70 4049 3095 3900 Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Fix file pointer leakColin Ian King2022-07-281-1/+1
| | | | | | | | | | | | | | Currently if a fscanf fails then an early return leaks an open file pointer. Fix this by fclosing the file before the return. Detected using static analysis with cppcheck: tools/power/x86/turbostat/turbostat.c:2039:3: error: Resource leak: fp [resourceLeak] Fixes: eae97e053fe3 ("tools/power turbostat: Support thermal throttle count print") Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Acked-by: Chen Yu <yu.c.chen@intel.com> Reviewed-by: Tom Rix <trix@redhat.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: replace strncmp with single character compareColin Ian King2022-07-281-1/+1
| | | | | | | | | | Using strncmp for a single character comparison is overly complicated, just use a simpler single character comparison instead. Also stops static analyzers (such as cppcheck) from complaining about strncmp on non-null terminated strings. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: print the kernel boot commandlineChen Yu2022-07-281-1/+26
| | | | | | | | | | | | | | | | | It would be handy to have cmdline in turbostat output. For example, according to the turbostat output, there are no C-states requested. In this case the user is very curious if something like intel_idle.max_cstate=0 was used, or may be idle=none too. It is also curious whether things like intel_pstate=nohwp were used. Print the boot command line accordingly: turbostat version 21.05.04 - Len Brown <lenb@kernel.org> Kernel command line: BOOT_IMAGE=/boot/vmlinuz-5.16.0+ root=UUID= b42359ed-1e05-42eb-8757-6bf2a1c19070 ro quiet splash vt.handoff=7 Suggested-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Introduce support for RaptorLakeZhang Rui2022-07-281-0/+1
| | | | | | | RaptorLake is compatible with AlderLake. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* Merge branch 'turbostat' of ↵Rafael J. Wysocki2022-04-193-210/+388
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux Pull turbostat changes for 5.19 from Len Brown: "Chen Yu (1): tools/power turbostat: Support thermal throttle count print Dan Merillat (1): tools/power turbostat: fix dump for AMD cpus Len Brown (5): tools/power turbostat: tweak --show and --hide capability tools/power turbostat: fix ICX DRAM power numbers tools/power turbostat: be more useful as non-root tools/power turbostat: No build warnings with -Wextra tools/power turbostat: version 2022.04.16 Sumeet Pawnikar (2): tools/power turbostat: Add Power Limit4 support tools/power turbostat: print power values upto three decimal Zephaniah E. Loss-Cutler-Hull (2): tools/power turbostat: Allow -e for all names. tools/power turbostat: Allow printing header every N iterations" * 'turbostat' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: tools/power turbostat: version 2022.04.16 tools/power turbostat: No build warnings with -Wextra tools/power turbostat: be more useful as non-root tools/power turbostat: fix ICX DRAM power numbers tools/power turbostat: Support thermal throttle count print tools/power turbostat: Allow printing header every N iterations tools/power turbostat: Allow -e for all names. tools/power turbostat: print power values upto three decimal tools/power turbostat: Add Power Limit4 support tools/power turbostat: fix dump for AMD cpus tools/power turbostat: tweak --show and --hide capability
| * tools/power turbostat: version 2022.04.16Len Brown2022-04-171-2/+2
| | | | | | | | Signed-off-by: Len Brown <len.brown@intel.com>
| * tools/power turbostat: No build warnings with -WextraLen Brown2022-04-162-63/+142
| | | | | | | | Signed-off-by: Len Brown <len.brown@intel.com>
| * tools/power turbostat: be more useful as non-rootLen Brown2022-04-162-173/+179
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't exit if used this way: sudo setcap cap_sys_nice,cap_sys_rawio=+ep ./turbostat sudo chmod +r /dev/cpu/*/msr ./turbostat note: cap_sys_admin is now also needed for the perf IPC counter: sudo setcap cap_sys_admin,cap_sys_nice,cap_sys_rawio=+ep ./turbostat Reported-by: Artem S. Tashkinov <aros@gmx.com> Reported-by: Toby Broom <tbroom@outlook.com> Signed-off-by: Len Brown <len.brown@intel.com>
| * tools/power turbostat: fix ICX DRAM power numbersLen Brown2022-04-161-0/+1
| | | | | | | | | | | | | | | | ICX (and its duplicates) require special hard-coded DRAM RAPL units, rather than using the generic RAPL energy units. Reported-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
| * tools/power turbostat: Support thermal throttle count printChen Yu2022-04-161-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The turbostat data is collected by end user for power evaluationit. However it looks like we are missing enough thermal context there. Already a couple of time we found that power management developer asking something like this: grep -r . /sys/devices/system/cpu/cpu*/thermal_throttle/* Print the per core thermal throttle count so as to get suffificent thermal context. turbostat -i 5 -s Core,CPU,CoreThr Core CPU CoreThr - - 104 0 0 61 0 4 1 1 0 1 5 2 2 104 2 6 3 3 7 3 7 Suggested-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
| * tools/power turbostat: Allow printing header every N iterationsZephaniah E. Loss-Cutler-Hull2022-04-161-3/+16
| | | | | | | | | | | | | | | | | | This gives the ability to reprint the header every N iterations, so you can ensure that a scrolling display always has the header visible somewhere on the screen. Signed-off-by: Zephaniah E. Loss-Cutler-Hull <zephaniah@gmail.com> Signed-off-by: Len Brown <len.brown@intel.com>
| * tools/power turbostat: Allow -e for all names.Zephaniah E. Loss-Cutler-Hull2022-04-161-14/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, there are a number of variables which are displayed by default, enabled with -e all, and listed by --list, but which you can not give to --enable/-e. So you can enable CPU0c1 (in the bic array), but you can't enable C1 or C1% (not in the bic array, but exists in sysfs). This runs counter to both the documentation and user expectations, and it's just not very user friendly. As such, the mechanism used by --hide has been duplicated, and is now also used by --enable, so we can handle unknown names gracefully. Note: One impact of this is that truly unknown fields given to --enable will no longer generate errors, they will be silently ignored, as --hide does. Signed-off-by: Zephaniah E. Loss-Cutler-Hull <zephaniah@gmail.com> Signed-off-by: Len Brown <len.brown@intel.com>
| * tools/power turbostat: print power values upto three decimalSumeet Pawnikar2022-04-161-2/+2
| | | | | | | | | | | | | | | | Print power values upto three decimal places in watts. Suggested-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
| * tools/power turbostat: Add Power Limit4 supportSumeet Pawnikar2022-04-161-0/+9
| | | | | | | | | | | | | | | | Add Power Limit4 support. Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Acked-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
| * tools/power turbostat: fix dump for AMD cpusDan Merillat2022-04-161-1/+2
| | | | | | | | | | | | | | | | | | | | | | turbostat --Dump exits early with status 243 (-13) get_counters() calls get_msr_sum() on zen CPUS for MSR_PKG_ENERGY_STAT, but per_cpu_msr_sum has not been initialized. Signed-off-by: Dan Merillat <git@dan.eginity.com> Signed-off-by: Len Brown <len.brown@intel.com>
| * tools/power turbostat: tweak --show and --hide capabilityLen Brown2022-04-161-15/+20
| | | | | | | | | | | | | | | | allow invocations such as # turbostat --show power,Busy% previously the "Busy%" was ignored Signed-off-by: Len Brown <len.brown@intel.com>
* | turbostat: fix PC6 displaying on some systemsArtem Bityutskiy2022-03-081-1/+1
|/ | | | | | | | | | | | | | | 'MSR_PKG_CST_CONFIG_CONTROL' encodes the deepest allowed package C-state limit, and turbostat decodes it. Before this patch: turbostat does not recognize value "3" on Ice Lake Xeon (ICX) and Sapphire Rapids Xeon (SPR), treats it as "unknown", and does not display any package C-states in the results table. After this patch: turbostat recognizes value 3 on ICX and SPR, treats it as "PC6", and correctly displays package C-states in the results table. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* tools/power turbostat: version 2021.05.04Len Brown2021-05-041-2/+2
| | | | Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Support "turbostat --hide idle"Len Brown2021-05-042-2/+22
| | | | | | | As idle, in particular, can have many columns on some machines... Make it easy to ignore them all at once. Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: elevate priority of interval modeLen Brown2021-05-041-9/+57
| | | | | | | This makes interval mode less likely to see delayed results on a heavily loaded system. Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: formattingLen Brown2021-05-041-510/+433
| | | | | | | | | Spring is here... run a long overdue Lendent on turbostat.c no functional change Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: rename tcc variablesZhang Rui2021-05-041-22/+22
| | | | | | | | | | | | | | | | There are two TCC activation temeprature. One is the default TCC activation temperature, also known as TJ_MAX. Another one is the effective TCC activation temperature, which is the subtraction of default TCC activation temperature and TCC offset. The name of variable tcc_activation_temp might be misleading here. Thus rename tcc_activation_temp to tj_max, and use tcc_default and tcc_offset to calculate the effective TCC activation temperature. No functional change in this patch. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: add TCC Offset supportZhang Rui2021-05-041-3/+55
| | | | | | | | | The length of TCC Offset bits varies on different platforms. Decode TCC Offset bits only for the platforms that we have verified. For the others, only show default TCC activation temperature. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: save original CPU modelZhang Rui2021-05-041-0/+5
| | | | | | | | | | | CPU model may get changed in intel_model_duplicates() for code reuse. But there are still some cases we need the original CPU model to handle minor differences between generations. Thus save the original CPU model. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Fix Core C6 residency on Atom CPUsZhang Rui2021-05-041-1/+38
| | | | | | | | | | | For Atom CPUs that have core cstate deeper than C6, MSR_CORE_C6_RESIDENCY actually returns the residency for both CC6 and deeper Core cstates. Thus, the real Core C6 residency should be the subtraction of MSR_CORE_C6_RESIDENCY return value and MSR_CORE_C6_RESIDENCY return value. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Print the C-state Pre-wake settingsChen Yu2021-05-041-0/+14
| | | | | | | | | | | | | | | | | | C-state pre-wake setting[1] is an optimization for some Intel CPUs to be woken up from deep C-states in order to reduce latency. According to the spec, the BIT30 is the C-state Pre-wake Disable. Expose this setting accordingly. Sample output from turbostat: ... cpu51: MSR_IA32_POWER_CTL: 0x1a00a40059 (C1E auto-promotion: DISabled) C-state Pre-wake: ENabled cpu51: MSR_TURBO_RATIO_LIMIT: 0x2021212121212224 ... [1] https://intel.github.io/wult/#c-state-pre-wake Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Enable tsc_tweak for Elkhart Lake and Jasper LakeChen Yu2021-05-041-1/+1
| | | | | | | | | | | | | | | | | | It was found that on Elkhart Lake the TSC frequency is driven by a separate crystal-clock domain, which is different from the BCLK domain which includes mperf. This has result in small different speed thus inconsistence between TSC and the mperf, which caused the Busy% to be higher than 100%. On this platform it seems that the mperf runs faster than tsc when the CPU is 100% utilized: delta tsc(18815473183) < delta mperf(18958403680) for 10 seconds. To align TSC with mperf, leverage the tsc_tweak mechanism introduced for cores newer than Skylake, so that TSC and mperf would be calculated in the same domain. Reported-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: unmark non-kernel-doc commentRandy Dunlap2021-05-041-1/+1
| | | | | | | | Do not mark a comment as kernel-doc notation when it is not meant to be in kernel-doc notation. Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power/turbostat: Remove Package C6 Retention on Ice Lake ServerChen Yu2021-05-041-6/+30
| | | | | | | | | | | | | | | | | | | | Currently the turbostat treats ICX the same way as SKX and shares the code among them. But one difference is that ICX does not support Package C6 Retention, unlike SKX and CLX. So this patch: 1. Splitting SKX and ICX in turbostat. 2. Removing Package C6 Rentention for ICX. And after this split, it would be easier to cutomize Ice Lake Server in turbostat in the future. Suggested-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Chen Yu <yu.c.chen@intel.com> Reviewed-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Tested-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Fix offset overflow issue in index convertingCalvin Walton2021-05-041-5/+6
| | | | | | | | | | | | | The idx_to_offset() function returns type int (32-bit signed), but MSR_PKG_ENERGY_STAT is u32 and would be interpreted as a negative number. The end result is that it hits the if (offset < 0) check in update_msr_sum() which prevents the timer callback from updating the stat in the background when long durations are used. The similar issue exists in offset_to_idx() and update_msr_sum(). Fix this issue by converting the 'int' to 'off_t' accordingly. Fixes: 9972d5d84d76 ("tools/power turbostat: Enable accumulate RAPL display") Signed-off-by: Calvin Walton <calvin.walton@kepstin.ca> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power/turbostat: Fix turbostat for AMD Zen CPUsBas Nieuwenhuizen2021-05-041-2/+6
| | | | | | | | | | | | | | | | | | | | | | It was reported that on Zen+ system turbostat started exiting, which was tracked down to the MSR_PKG_ENERGY_STAT read failing because offset_to_idx wasn't returning a non-negative index. This patch combined the modification from Bingsong Si and Bas Nieuwenhuizen and addd the MSR to the index system as alternative for MSR_PKG_ENERGY_STATUS. Fixes: 9972d5d84d76 ("tools/power turbostat: Enable accumulate RAPL display") Reported-by: youling257 <youling257@gmail.com> Tested-by: youling257 <youling257@gmail.com> Tested-by: Kurt Garloff <kurt@garloff.de> Tested-by: Bingsong Si <owen.si@ucloud.cn> Tested-by: Artem S. Tashkinov <aros@gmx.com> Co-developed-by: Bingsong Si <owen.si@ucloud.cn> Co-developed-by: Terry Bowman <terry.bowman@amd.com> Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: update version numberLen Brown2021-05-041-1/+1
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* tools/power turbostat: Fix DRAM Energy Unit on SKXZhang Rui2021-05-041-0/+1
| | | | | | | SKX uses fixed DRAM Energy Unit, just like HSX and BDX. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* Revert "tools/power turbostat: adjust for temperature offset"Len Brown2021-05-041-29/+33
| | | | | | | | | | | | | This reverts commit 6ff7cb371c4bea3dba03a56d774da925e78a5087. Apparently the TCC offset should not be used to adjust what temperature we show the user after all. (on most systems, TCC offset is 0, FWIW) Fixes: 6ff7cb371c4b Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Support Ice Lake DChen Yu2021-05-041-0/+1
| | | | | | | | | Ice Lake D is low-end server version of Ice Lake X, reuse the code accordingly. Tested-by: Wendy Wang <wendy.wang@intel.com> Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: Support Alder Lake MobileChen Yu2021-05-041-0/+1
| | | | | | | Share the code between Alder Lake Mobile and Alder Lake Desktop. Signed-off-by: Chen Yu <yu.c.chen@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
* tools/power turbostat: print microcode patch levelLen Brown2021-05-041-4/+9
| | | | | | (also available via "grep microcode /proc/cpuinfo") Signed-off-by: Len Brown <len.brown@intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-03-21 03:44:37 +0000