From 582a899622f19005126d2858f08ee0c9dac34870 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 2 Aug 2012 17:58:23 -0300 Subject: i3200_edac: Fix memory rank size commit a895bf8b1e1ea4c032a8fa8a09475a2ce09fe77a incorrectly changed the logic that fills the memory bank size. Fix it. Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i3200_edac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/edac/i3200_edac.c b/drivers/edac/i3200_edac.c index 47180a08edad..b6653a6fc5d5 100644 --- a/drivers/edac/i3200_edac.c +++ b/drivers/edac/i3200_edac.c @@ -391,7 +391,7 @@ static int i3200_probe1(struct pci_dev *pdev, int dev_idx) for (j = 0; j < nr_channels; j++) { struct dimm_info *dimm = csrow->channels[j]->dimm; - dimm->nr_pages = nr_pages / nr_channels; + dimm->nr_pages = nr_pages; dimm->grain = nr_pages << PAGE_SHIFT; dimm->mtype = MEM_DDR2; dimm->dtype = DEV_UNKNOWN; -- cgit v1.2.3 From b70f833377fc80d7446218b36206e2e299fc6bfd Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Mon, 10 Sep 2012 13:25:50 -0300 Subject: i5000: Fix the memory size calculation with 2R memories When 2R memories are found, the memory size should be multiplied by two, otherwise, it will report half of the memory size: +-----------------------------------------------+ | mc0 | | branch0 | branch1 | | channel0 | channel1 | channel0 | channel1 | -------+-----------------------------------------------+ slot3: | 0 MB | 0 MB | 0 MB | 0 MB | slot2: | 0 MB | 0 MB | 0 MB | 0 MB | -------+-----------------------------------------------+ slot1: | 0 MB | 0 MB | 0 MB | 0 MB | slot0: | 1024 MB | 1024 MB | 1024 MB | 1024 MB | -------+-----------------------------------------------+ (the above machine have 4 x 2GB 2R memories) Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/i5000_edac.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index 39c63757c2a1..6a49dd00b81b 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c @@ -1012,6 +1012,10 @@ static void handle_channel(struct i5000_pvt *pvt, int slot, int channel, /* add the number of COLUMN bits */ addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr); + /* Dual-rank memories have twice the size */ + if (dinfo->dual_rank) + addrBits++; + addrBits += 6; /* add 64 bits per DIMM */ addrBits -= 20; /* divide by 2^^20 */ addrBits -= 3; /* 8 bits per bytes */ -- cgit v1.2.3 From deb09ddaff1435f72dd598d38f9b58354c68a5ec Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Thu, 20 Sep 2012 12:09:30 -0300 Subject: sb_edac: Avoid overflow errors at memory size calculation Sandy bridge EDAC is calculating the memory size with overflow. Basically, the size field and the integer calculation is using 32 bits. More bits are needed, when the DIMM memories have high density. The net result is that memories are improperly reported there, when high-density DIMMs are used: EDAC DEBUG: in drivers/edac/sb_edac.c, line at 591: mc#0: channel 0, dimm 0, -16384 Mb (-4194304 pages) bank: 8, rank: 2, row: 0x10000, col: 0x800 EDAC DEBUG: in drivers/edac/sb_edac.c, line at 591: mc#0: channel 1, dimm 0, -16384 Mb (-4194304 pages) bank: 8, rank: 2, row: 0x10000, col: 0x800 As the number of pages value is handled at the EDAC core as unsigned ints, the driver shows the 16 GB memories at sysfs interface as 16760832 MB! The fix is simple: calculate the number of pages as unsigned 64-bits integer. After the patch, the memory size (16 GB) is properly detected: EDAC DEBUG: in drivers/edac/sb_edac.c, line at 592: mc#0: channel 0, dimm 0, 16384 Mb (4194304 pages) bank: 8, rank: 2, row: 0x10000, col: 0x800 EDAC DEBUG: in drivers/edac/sb_edac.c, line at 592: mc#0: channel 1, dimm 0, 16384 Mb (4194304 pages) bank: 8, rank: 2, row: 0x10000, col: 0x800 Cc: stable@kernel.org Signed-off-by: Mauro Carvalho Chehab --- drivers/edac/sb_edac.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/edac/sb_edac.c b/drivers/edac/sb_edac.c index f3b1f9fafa4b..5715b7c2c517 100644 --- a/drivers/edac/sb_edac.c +++ b/drivers/edac/sb_edac.c @@ -513,7 +513,8 @@ static int get_dimm_config(struct mem_ctl_info *mci) { struct sbridge_pvt *pvt = mci->pvt_info; struct dimm_info *dimm; - int i, j, banks, ranks, rows, cols, size, npages; + unsigned i, j, banks, ranks, rows, cols, npages; + u64 size; u32 reg; enum edac_type mode; enum mem_type mtype; @@ -585,10 +586,10 @@ static int get_dimm_config(struct mem_ctl_info *mci) cols = numcol(mtr); /* DDR3 has 8 I/O banks */ - size = (rows * cols * banks * ranks) >> (20 - 3); + size = ((u64)rows * cols * banks * ranks) >> (20 - 3); npages = MiB_TO_PAGES(size); - edac_dbg(0, "mc#%d: channel %d, dimm %d, %d Mb (%d pages) bank: %d, rank: %d, row: %#x, col: %#x\n", + edac_dbg(0, "mc#%d: channel %d, dimm %d, %Ld Mb (%d pages) bank: %d, rank: %d, row: %#x, col: %#x\n", pvt->sbridge_dev->mc, i, j, size, npages, banks, ranks, rows, cols); -- cgit v1.2.3