From e085cad6c653e20e213a662ef32fb6191ae0197d Mon Sep 17 00:00:00 2001 From: Kukjin Kim Date: Wed, 26 Jun 2013 22:29:44 +0900 Subject: ARM: EXYNOS: skip pm support on exynos5440 EXYNOS5440 doesn't support PM and current single image for EXYNOS will be break without this patch. Actually, SSDK5440 cannot boot without this so this should be merged during rc. Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/pm.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 41c20692a13f..c679db577269 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -217,6 +217,9 @@ static __init int exynos_pm_drvinit(void) struct clk *pll_base; unsigned int tmp; + if (soc_is_exynos5440()) + return 0; + s3c_pm_init(); /* All wakeup disable */ @@ -340,6 +343,9 @@ static struct syscore_ops exynos_pm_syscore_ops = { static __init int exynos_pm_syscore_init(void) { + if (soc_is_exynos5440()) + return 0; + register_syscore_ops(&exynos_pm_syscore_ops); return 0; } -- cgit v1.2.3 From ea2761763739619ca49602d891ec3ffb33ffc71b Mon Sep 17 00:00:00 2001 From: Subash Patel Date: Tue, 16 Jul 2013 12:42:13 +0900 Subject: ARM: EXYNOS: change the PHYSMEM_BITS and SECTION_SIZE On EXYNOS5440 there is DRAM on the 36-bit address range. Hence this patch converts the MAX_PHYSMEM_BITS macro to 36 if LPAE is enabled for the ARM architecture. The conventional section size on EXYNOS is 256M due to sparsemem. Since EXYNOS5440 has memory in multiples of 1G in 32-bit and 36-bit range, this has now been modified to 31. Signed-off-by: Subash Patel Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/include/mach/memory.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/mach-exynos/include/mach/memory.h b/arch/arm/mach-exynos/include/mach/memory.h index 374ef2cf7152..2a4cdb7cb326 100644 --- a/arch/arm/mach-exynos/include/mach/memory.h +++ b/arch/arm/mach-exynos/include/mach/memory.h @@ -15,8 +15,13 @@ #define PLAT_PHYS_OFFSET UL(0x40000000) +#ifndef CONFIG_ARM_LPAE /* Maximum of 256MiB in one bank */ #define MAX_PHYSMEM_BITS 32 #define SECTION_SIZE_BITS 28 +#else +#define MAX_PHYSMEM_BITS 36 +#define SECTION_SIZE_BITS 31 +#endif #endif /* __ASM_ARCH_MEMORY_H */ -- cgit v1.2.3 From cfaf8ee2f91607c8955af68538ba849b125fb8d5 Mon Sep 17 00:00:00 2001 From: Thomas Abraham Date: Tue, 16 Jul 2013 12:42:59 +0900 Subject: ARM: EXYNOS: Enable 64-bit DMA for EXYNOS5440 if LPAE is enabled Allow 64-bit DMA addresses if LPAE is enabled on EXYNOS5440. Signed-off-by: Thomas Abraham Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 855d4a7b462d..5952e68c76c4 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -92,6 +92,7 @@ config SOC_EXYNOS5440 bool "SAMSUNG EXYNOS5440" default y depends on ARCH_EXYNOS5 + select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE select ARCH_HAS_OPP select HAVE_ARM_ARCH_TIMER select AUTO_ZRELADDR -- cgit v1.2.3 From d817468c4b2892b9468e2a0c92116e38a3a61370 Mon Sep 17 00:00:00 2001 From: Sylwester Nawrocki Date: Wed, 24 Jul 2013 13:23:51 +0900 Subject: ARM: S3C24XX: Add missing clkdev entries for s3c2440 UART This patch restores serial port operation which has been broken since commit 60e93575476f ("serial: samsung: enable clock before clearing pending interrupts during init") That commit only uncovered the real issue which was missing clkdev entries for the "uart" clocks on S3C2440. It went unnoticed so far because return value of clk API calls were not being checked at all in the samsung serial port driver. This patch should be backported to at least 3.10 stable kernel, since the serial port has not been working on s3c2440 since 3.10-rc5. Cc: Chander Kashyap Signed-off-by: Sylwester Nawrocki [on S3C2440 SoC based Mini2440 board] Tested-by: Sylwester Nawrocki Reviewed-by: Tomasz Figa Tested-by: Juergen Beisert Cc: [3.10] Signed-off-by: Kukjin Kim --- arch/arm/mach-s3c24xx/clock-s3c2410.c | 161 ++++++++++++++++++----------- arch/arm/mach-s3c24xx/clock-s3c2440.c | 3 + arch/arm/plat-samsung/include/plat/clock.h | 5 + 3 files changed, 106 insertions(+), 63 deletions(-) diff --git a/arch/arm/mach-s3c24xx/clock-s3c2410.c b/arch/arm/mach-s3c24xx/clock-s3c2410.c index 34fffdf6fc1d..564553694b54 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2410.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2410.c @@ -119,66 +119,101 @@ static struct clk init_clocks_off[] = { } }; -static struct clk init_clocks[] = { - { - .name = "lcd", - .parent = &clk_h, - .enable = s3c2410_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_LCDC, - }, { - .name = "gpio", - .parent = &clk_p, - .enable = s3c2410_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_GPIO, - }, { - .name = "usb-host", - .parent = &clk_h, - .enable = s3c2410_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_USBH, - }, { - .name = "usb-device", - .parent = &clk_h, - .enable = s3c2410_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_USBD, - }, { - .name = "timers", - .parent = &clk_p, - .enable = s3c2410_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_PWMT, - }, { - .name = "uart", - .devname = "s3c2410-uart.0", - .parent = &clk_p, - .enable = s3c2410_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_UART0, - }, { - .name = "uart", - .devname = "s3c2410-uart.1", - .parent = &clk_p, - .enable = s3c2410_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_UART1, - }, { - .name = "uart", - .devname = "s3c2410-uart.2", - .parent = &clk_p, - .enable = s3c2410_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_UART2, - }, { - .name = "rtc", - .parent = &clk_p, - .enable = s3c2410_clkcon_enable, - .ctrlbit = S3C2410_CLKCON_RTC, - }, { - .name = "watchdog", - .parent = &clk_p, - .ctrlbit = 0, - }, { - .name = "usb-bus-host", - .parent = &clk_usb_bus, - }, { - .name = "usb-bus-gadget", - .parent = &clk_usb_bus, - }, +static struct clk clk_lcd = { + .name = "lcd", + .parent = &clk_h, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_LCDC, +}; + +static struct clk clk_gpio = { + .name = "gpio", + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_GPIO, +}; + +static struct clk clk_usb_host = { + .name = "usb-host", + .parent = &clk_h, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_USBH, +}; + +static struct clk clk_usb_device = { + .name = "usb-device", + .parent = &clk_h, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_USBD, +}; + +static struct clk clk_timers = { + .name = "timers", + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_PWMT, +}; + +struct clk s3c24xx_clk_uart0 = { + .name = "uart", + .devname = "s3c2410-uart.0", + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_UART0, +}; + +struct clk s3c24xx_clk_uart1 = { + .name = "uart", + .devname = "s3c2410-uart.1", + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_UART1, +}; + +struct clk s3c24xx_clk_uart2 = { + .name = "uart", + .devname = "s3c2410-uart.2", + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_UART2, +}; + +static struct clk clk_rtc = { + .name = "rtc", + .parent = &clk_p, + .enable = s3c2410_clkcon_enable, + .ctrlbit = S3C2410_CLKCON_RTC, +}; + +static struct clk clk_watchdog = { + .name = "watchdog", + .parent = &clk_p, + .ctrlbit = 0, +}; + +static struct clk clk_usb_bus_host = { + .name = "usb-bus-host", + .parent = &clk_usb_bus, +}; + +static struct clk clk_usb_bus_gadget = { + .name = "usb-bus-gadget", + .parent = &clk_usb_bus, +}; + +static struct clk *init_clocks[] = { + &clk_lcd, + &clk_gpio, + &clk_usb_host, + &clk_usb_device, + &clk_timers, + &s3c24xx_clk_uart0, + &s3c24xx_clk_uart1, + &s3c24xx_clk_uart2, + &clk_rtc, + &clk_watchdog, + &clk_usb_bus_host, + &clk_usb_bus_gadget, }; /* s3c2410_baseclk_add() @@ -195,7 +230,6 @@ int __init s3c2410_baseclk_add(void) { unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW); unsigned long clkcon = __raw_readl(S3C2410_CLKCON); - struct clk *clkp; struct clk *xtal; int ret; int ptr; @@ -207,8 +241,9 @@ int __init s3c2410_baseclk_add(void) /* register clocks from clock array */ - clkp = init_clocks; - for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) { + for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++) { + struct clk *clkp = init_clocks[ptr]; + /* ensure that we note the clock state */ clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0; diff --git a/arch/arm/mach-s3c24xx/clock-s3c2440.c b/arch/arm/mach-s3c24xx/clock-s3c2440.c index 1069b5680826..aaf006d1d6dc 100644 --- a/arch/arm/mach-s3c24xx/clock-s3c2440.c +++ b/arch/arm/mach-s3c24xx/clock-s3c2440.c @@ -166,6 +166,9 @@ static struct clk_lookup s3c2440_clk_lookup[] = { CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk), CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p), CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n), + CLKDEV_INIT("s3c2440-uart.0", "uart", &s3c24xx_clk_uart0), + CLKDEV_INIT("s3c2440-uart.1", "uart", &s3c24xx_clk_uart1), + CLKDEV_INIT("s3c2440-uart.2", "uart", &s3c24xx_clk_uart2), CLKDEV_INIT("s3c2440-camif", "camera", &s3c2440_clk_cam_upll), }; diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index a62753dc15ba..df45d6edc98d 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h @@ -83,6 +83,11 @@ extern struct clk clk_ext; extern struct clksrc_clk clk_epllref; extern struct clksrc_clk clk_esysclk; +/* S3C24XX UART clocks */ +extern struct clk s3c24xx_clk_uart0; +extern struct clk s3c24xx_clk_uart1; +extern struct clk s3c24xx_clk_uart2; + /* S3C64XX specific clocks */ extern struct clk clk_h2; extern struct clk clk_27m; -- cgit v1.2.3 From 89693016e372983d720c186c0d00b29414b58804 Mon Sep 17 00:00:00 2001 From: Amit Daniel Kachhap Date: Wed, 24 Jul 2013 14:06:13 +0900 Subject: ARM: SAMSUNG: Add SAMSUNG_PM config option to select pm This patch enables the selection of samsung pm related stuffs when SAMSUNG_PM config is enabled and not just when generic PM config is enabled. Power management for s3c64XX and s3c24XX is enabled by default and for other platform depends on S5P_PM. This patch also fixes the following compilation error's when compiling a platform like exynos5440 which does not select pm stuffs. arch/arm/mach-exynos/built-in.o: In function '__virt_to_phys': linux/arch/arm/include/asm/memory.h:175: undefined reference to 's3c_cpu_resume' linux/arch/arm/include/asm/memory.h:175: undefined reference to 's3c_cpu_resume' linux/arch/arm/include/asm/memory.h:175: undefined reference to 's3c_cpu_resume' linux/arch/arm/include/asm/memory.h:175: undefined reference to 's3c_cpu_resume' arch/arm/mach-exynos/built-in.o: In function 'exynos5_init_irq': linux/arch/arm/mach-exynos/common.c:492: undefined reference to 's3c_irq_wake' linux/arch/arm/mach-exynos/common.c:492: undefined reference to 's3c_irq_wake' arch/arm/mach-exynos/built-in.o: In function 'exynos4_init_irq': linux/arch/arm/mach-exynos/common.c:476: undefined reference to 's3c_irq_wake' linux/arch/arm/mach-exynos/common.c:476: undefined reference to 's3c_irq_wake' arch/arm/plat-samsung/built-in.o: In function 's3c_irqext_wake': linux/arch/arm/plat-samsung/pm.c:144: undefined reference to 's3c_irqwake_eintallow' linux/arch/arm/plat-samsung/pm.c:144: undefined reference to 's3c_irqwake_eintallow' arch/arm/plat-samsung/built-in.o: In function 's3c_pm_enter': linux/arch/arm/plat-samsung/pm.c:263: undefined reference to 's3c_irqwake_intallow' linux/arch/arm/plat-samsung/pm.c:263: undefined reference to 's3c_irqwake_intallow' linux/arch/arm/plat-samsung/pm.c:264: undefined reference to 's3c_irqwake_eintallow' linux/arch/arm/plat-samsung/pm.c:264: undefined reference to 's3c_irqwake_eintallow' linux/arch/arm/plat-samsung/pm.c:275: undefined reference to 's3c_pm_save_core' linux/arch/arm/plat-samsung/pm.c:279: undefined reference to 's3c_pm_configure_extint' linux/arch/arm/plat-samsung/pm.c:310: undefined reference to 's3c_pm_restore_core' make: *** [vmlinux] Error 1 Signed-off-by: Amit Daniel Kachhap Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/Makefile | 2 +- arch/arm/mach-exynos/common.h | 1 - arch/arm/mach-exynos/cpuidle.c | 1 + arch/arm/plat-samsung/Kconfig | 7 +++++++ arch/arm/plat-samsung/Makefile | 2 +- arch/arm/plat-samsung/include/plat/pm.h | 8 ++++---- 6 files changed, 14 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index e970a7a4e278..53696154aead 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -14,7 +14,7 @@ obj- := obj-$(CONFIG_ARCH_EXYNOS) += common.o -obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_S5P_PM) += pm.o obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index 3e156bcddcb4..972490fc09d6 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -97,6 +97,5 @@ struct exynos_pmu_conf { }; extern void exynos_sys_powerdown_conf(enum sys_powerdown mode); -extern void s3c_cpu_resume(void); #endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */ diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c index 17a18ff3d71e..225ee8431c72 100644 --- a/arch/arm/mach-exynos/cpuidle.c +++ b/arch/arm/mach-exynos/cpuidle.c @@ -25,6 +25,7 @@ #include #include +#include #include "common.h" diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 3dc5cbea86cc..a5b5ff6e68d2 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -29,6 +29,13 @@ config PLAT_S5P help Base platform code for Samsung's S5P series SoC. +config SAMSUNG_PM + bool + depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || S5P_PM) + default y + help + Base platform power management code for samsung code + if PLAT_SAMSUNG # boot configurations diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 98d07d8fc7a7..199bbe304d02 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -51,7 +51,7 @@ obj-$(CONFIG_SAMSUNG_DMADEV) += dma-ops.o # PM support -obj-$(CONFIG_PM) += pm.o +obj-$(CONFIG_SAMSUNG_PM) += pm.o obj-$(CONFIG_SAMSUNG_PM_GPIO) += pm-gpio.o obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h index 5d47ca35cabd..6bc1a8f471e3 100644 --- a/arch/arm/plat-samsung/include/plat/pm.h +++ b/arch/arm/plat-samsung/include/plat/pm.h @@ -19,7 +19,7 @@ struct device; -#ifdef CONFIG_PM +#ifdef CONFIG_SAMSUNG_PM extern __init int s3c_pm_init(void); extern __init int s3c64xx_pm_init(void); @@ -58,8 +58,6 @@ extern unsigned char pm_uart_udivslot; /* true to save UART UDIVSLOT */ /* from sleep.S */ -extern void s3c_cpu_resume(void); - extern int s3c2410_cpu_suspend(unsigned long); /* sleep save info */ @@ -106,12 +104,14 @@ extern void s3c_pm_do_save(struct sleep_save *ptr, int count); extern void s3c_pm_do_restore(struct sleep_save *ptr, int count); extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count); -#ifdef CONFIG_PM +#ifdef CONFIG_SAMSUNG_PM extern int s3c_irq_wake(struct irq_data *data, unsigned int state); extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); +extern void s3c_cpu_resume(void); #else #define s3c_irq_wake NULL #define s3c_irqext_wake NULL +#define s3c_cpu_resume NULL #endif /* PM debug functions */ -- cgit v1.2.3 From 7bdc84fb82627f34d9e13c37926f70fcde38e4c4 Mon Sep 17 00:00:00 2001 From: Yadwinder Singh Brar Date: Wed, 24 Jul 2013 17:05:07 +0900 Subject: ARM: SAMSUNG: Save/restore only selected uart's registers Basically this code gets executed only during debugging i.e when DEBUG_LL & SAMSUNG_PM_DEBUG is on, so required only for UART used for debugging. Since we are removing static iodesc entries for UARTs, so now only the selected (CONFIG_DEBUG_S3C_UART) UART will be ioremapped by the debug_ll_io_init() for DEBUG_LL, so save/restore uart registers only for selected uart. Signed-off-by: Yadwinder Singh Brar Signed-off-by: Kukjin Kim --- arch/arm/plat-samsung/pm.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c index ea3613642451..d0c23010b693 100644 --- a/arch/arm/plat-samsung/pm.c +++ b/arch/arm/plat-samsung/pm.c @@ -80,7 +80,7 @@ unsigned char pm_uart_udivslot; #ifdef CONFIG_SAMSUNG_PM_DEBUG -static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS]; +static struct pm_uart_save uart_save; static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save) { @@ -101,11 +101,7 @@ static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save) static void s3c_pm_save_uarts(void) { - struct pm_uart_save *save = uart_save; - unsigned int uart; - - for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++) - s3c_pm_save_uart(uart, save); + s3c_pm_save_uart(CONFIG_DEBUG_S3C_UART, &uart_save); } static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save) @@ -126,11 +122,7 @@ static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save) static void s3c_pm_restore_uarts(void) { - struct pm_uart_save *save = uart_save; - unsigned int uart; - - for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++) - s3c_pm_restore_uart(uart, save); + s3c_pm_restore_uart(CONFIG_DEBUG_S3C_UART, &uart_save); } #else static void s3c_pm_save_uarts(void) { } -- cgit v1.2.3 From 7ed76e089a645a12c53bc35936574f710aa11549 Mon Sep 17 00:00:00 2001 From: Yadwinder Singh Brar Date: Wed, 24 Jul 2013 17:05:32 +0900 Subject: ARM: EXYNOS: Fix low level debug support Presently, using exynos_defconfig with CONFIG_DEBUG_LL and CONFIG_EARLY_PRIN on, kernel is not booting, we are getting following: [ 0.000000] ------------[ cut here ]------------ [ 0.000000] kernel BUG at mm/vmalloc.c:1134! [ 0.000000] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 3.11.0-rc1 #633 [ 0.000000] task: c052ec48 ti: c0524000 task.ti: c0524000 [ 0.000000] PC is at vm_area_add_early+0x54/0x94 [ 0.000000] LR is at add_static_vm_early+0xc/0x60 Its because exynos[4/5]_map_io() function ioremaps a single 512KB memory size for all the four uart ports which envelopes the mapping created by debug_ll_io_init(), called earlier in exynos_init_io(). This patch removes iodesc entries for UART controller for all Samsung SoC's, since now the Samsung uart driver does a ioremap during probe and any needed iomapping for earlyprintk will be handled by debug_ll_io_init(). Tested on smdk4412 and smdk5250. Signed-off-by: Yadwinder Singh Brar Signed-off-by: Kukjin Kim --- arch/arm/mach-exynos/common.c | 26 -------------------------- 1 file changed, 26 deletions(-) diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 164685bd25c8..ba95e5db2501 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -58,7 +58,6 @@ static const char name_exynos5440[] = "EXYNOS5440"; static void exynos4_map_io(void); static void exynos5_map_io(void); -static void exynos5440_map_io(void); static int exynos_init(void); static struct cpu_table cpu_ids[] __initdata = { @@ -95,7 +94,6 @@ static struct cpu_table cpu_ids[] __initdata = { }, { .idcode = EXYNOS5440_SOC_ID, .idmask = EXYNOS5_SOC_MASK, - .map_io = exynos5440_map_io, .init = exynos_init, .name = name_exynos5440, }, @@ -149,11 +147,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { .pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST), .length = SZ_64K, .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(EXYNOS4_PA_UART), - .length = SZ_512K, - .type = MT_DEVICE, }, { .virtual = (unsigned long)S5P_VA_CMU, .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), @@ -268,20 +261,6 @@ static struct map_desc exynos5_iodesc[] __initdata = { .pfn = __phys_to_pfn(EXYNOS5_PA_PMU), .length = SZ_64K, .type = MT_DEVICE, - }, { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(EXYNOS5_PA_UART), - .length = SZ_512K, - .type = MT_DEVICE, - }, -}; - -static struct map_desc exynos5440_iodesc0[] __initdata = { - { - .virtual = (unsigned long)S3C_VA_UART, - .pfn = __phys_to_pfn(EXYNOS5440_PA_UART0), - .length = SZ_512K, - .type = MT_DEVICE, }, }; @@ -388,11 +367,6 @@ static void __init exynos5_map_io(void) iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); } -static void __init exynos5440_map_io(void) -{ - iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0)); -} - void __init exynos_init_time(void) { of_clk_init(NULL); -- cgit v1.2.3 From 53302bf60d2c95ee42118008499a5f5de544fcc1 Mon Sep 17 00:00:00 2001 From: Sachin Kamat Date: Wed, 24 Jul 2013 18:55:27 +0900 Subject: ARM: EXYNOS: Update CONFIG_ARCH_NR_GPIO for Exynos With the recent cleanup in Exynos platform code notably commits 17859bec ("ARM: EXYNOS: Do not select legacy Kconfig symbols any more") and b9222210 ("ARM: EXYNOS: Remove mach/gpio.h"), the definition of ARCH_NR_GPIOS got removed. This started causing problems on SoCs like Exynos4412 which have more than the default number of GPIOs. Thus define this number in KConfig file which takes care of current SoC requirements and provides scope for GPIO expanders. Without this patch we get the following errors during boot: gpiochip_add: gpios 251..258 (gpv0) failed to register samsung-pinctrl 106e0000.pinctrl: failed to register gpio_chip gpv0, error code: -22 samsung-pinctrl: probe of 106e0000.pinctrl failed with error -22 Signed-off-by: Sachin Kamat Cc: Tomasz Figa Signed-off-by: Kukjin Kim --- arch/arm/Kconfig | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index ba412e02ec0c..37c0f4e978d4 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1600,8 +1600,7 @@ config LOCAL_TIMERS config ARCH_NR_GPIO int default 1024 if ARCH_SHMOBILE || ARCH_TEGRA - default 512 if SOC_OMAP5 - default 512 if ARCH_KEYSTONE + default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5 default 392 if ARCH_U8500 default 352 if ARCH_VT8500 default 288 if ARCH_SUNXI -- cgit v1.2.3