From 6d7e05ab8ff6f6bb91ecfbbd542240c7b6c23502 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Tue, 21 Mar 2017 16:42:45 +0800 Subject: arm64: dts: zte: remove zx296718 pll_vga clock Rather than a fixed rate clock, pll_vga is a PLL can be programmed into different freqencies. Let's drop it from device tree and get it registered from clock driver. Signed-off-by: Shawn Guo --- arch/arm64/boot/dts/zte/zx296718.dtsi | 7 ------- 1 file changed, 7 deletions(-) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/zte/zx296718.dtsi index b850b2cd0adc..1f256495b902 100644 --- a/arch/arm64/boot/dts/zte/zx296718.dtsi +++ b/arch/arm64/boot/dts/zte/zx296718.dtsi @@ -235,13 +235,6 @@ clock-output-names = "pll_mac"; }; - pll_vga: clk-pll-1073m { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1073000000>; - clock-output-names = "pll_vga"; - }; - pll_mm0: clk-pll-1188m { compatible = "fixed-clock"; #clock-cells = <0>; -- cgit v1.2.3