From 8cd076a67dc8eac5d613b3258f656efa7a54412e Mon Sep 17 00:00:00 2001 From: Kristina Martsenko Date: Tue, 9 May 2023 15:22:32 +0100 Subject: arm64: mops: handle single stepping after MOPS exception When a MOPS main or epilogue instruction is being executed, the task may get scheduled on a different CPU and restart execution from the prologue instruction. If the main or epilogue instruction is being single stepped then it makes sense to finish the step and take the step exception before starting to execute the next (prologue) instruction. So fast-forward the single step state machine when taking a MOPS exception. This means that if a main or epilogue instruction is single stepped with ptrace, the debugger will sometimes observe the PC moving back to the prologue instruction. (As already mentioned, this should be rare as it only happens when the task is scheduled to another CPU during the step.) This also ensures that perf breakpoints count prologue instructions consistently (i.e. every time they are executed), rather than skipping them when there also happens to be a breakpoint on a main or epilogue instruction. Acked-by: Catalin Marinas Signed-off-by: Kristina Martsenko Link: https://lore.kernel.org/r/20230509142235.3284028-9-kristina.martsenko@arm.com Signed-off-by: Catalin Marinas --- arch/arm64/kernel/traps.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm64/kernel/traps.c') diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 32dc692bffd3..4363e3b53a81 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -563,6 +563,12 @@ void do_el0_mops(struct pt_regs *regs, unsigned long esr) regs->pc -= 8; else regs->pc -= 4; + + /* + * If single stepping then finish the step before executing the + * prologue instruction. + */ + user_fastforward_single_step(current); } #define __user_cache_maint(insn, address, res) \ -- cgit v1.2.3