From 6fdf581e9df53ee4f8b46487a046fff7613a0fa0 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Tue, 3 Aug 2010 18:29:07 +0200 Subject: CRIS: Define __read_mostly for CRISv32 Signed-off-by: Jesper Nilsson --- arch/cris/include/arch-v32/arch/cache.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/cris/include') diff --git a/arch/cris/include/arch-v32/arch/cache.h b/arch/cris/include/arch-v32/arch/cache.h index dfc73050e6b4..1de779f4f240 100644 --- a/arch/cris/include/arch-v32/arch/cache.h +++ b/arch/cris/include/arch-v32/arch/cache.h @@ -7,6 +7,8 @@ #define L1_CACHE_BYTES 32 #define L1_CACHE_SHIFT 5 +#define __read_mostly __attribute__((__section__(".data.read_mostly"))) + void flush_dma_list(dma_descr_data *descr); void flush_dma_descr(dma_descr_data *descr, int flush_buf); -- cgit v1.2.3 From a3af54ffa9fb0e3ce66904bd316f079cafad1bd5 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Tue, 3 Aug 2010 18:40:39 +0200 Subject: CRIS: Machine dependent dma.h Move the old one to mach-fs and replace with a new one that only include the correct one for the machine architecture. Signed-off-by: Jesper Nilsson --- arch/cris/include/arch-v32/arch/dma.h | 80 +-------------------------- arch/cris/include/arch-v32/mach-fs/mach/dma.h | 79 ++++++++++++++++++++++++++ 2 files changed, 80 insertions(+), 79 deletions(-) create mode 100644 arch/cris/include/arch-v32/mach-fs/mach/dma.h (limited to 'arch/cris/include') diff --git a/arch/cris/include/arch-v32/arch/dma.h b/arch/cris/include/arch-v32/arch/dma.h index 3674081389fd..61906153a9af 100644 --- a/arch/cris/include/arch-v32/arch/dma.h +++ b/arch/cris/include/arch-v32/arch/dma.h @@ -1,79 +1 @@ -#ifndef _ASM_ARCH_CRIS_DMA_H -#define _ASM_ARCH_CRIS_DMA_H - -/* Defines for using and allocating dma channels. */ - -#define MAX_DMA_CHANNELS 10 - -#define NETWORK_ETH0_TX_DMA_NBR 0 /* Ethernet 0 out. */ -#define NETWORK_ETH0 RX_DMA_NBR 1 /* Ethernet 0 in. */ - -#define IO_PROC_DMA0_TX_DMA_NBR 2 /* IO processor DMA0 out. */ -#define IO_PROC_DMA0_RX_DMA_NBR 3 /* IO processor DMA0 in. */ - -#define ATA_TX_DMA_NBR 2 /* ATA interface out. */ -#define ATA_RX_DMA_NBR 3 /* ATA interface in. */ - -#define ASYNC_SER2_TX_DMA_NBR 2 /* Asynchronous serial port 2 out. */ -#define ASYNC_SER2_RX_DMA_NBR 3 /* Asynchronous serial port 2 in. */ - -#define IO_PROC_DMA1_TX_DMA_NBR 4 /* IO processor DMA1 out. */ -#define IO_PROC_DMA1_RX_DMA_NBR 5 /* IO processor DMA1 in. */ - -#define ASYNC_SER1_TX_DMA_NBR 4 /* Asynchronous serial port 1 out. */ -#define ASYNC_SER1_RX_DMA_NBR 5 /* Asynchronous serial port 1 in. */ - -#define SYNC_SER0_TX_DMA_NBR 4 /* Synchronous serial port 0 out. */ -#define SYNC_SER0_RX_DMA_NBR 5 /* Synchronous serial port 0 in. */ - -#define EXTDMA0_TX_DMA_NBR 6 /* External DMA 0 out. */ -#define EXTDMA1_RX_DMA_NBR 7 /* External DMA 1 in. */ - -#define ASYNC_SER0_TX_DMA_NBR 6 /* Asynchronous serial port 0 out. */ -#define ASYNC_SER0_RX_DMA_NBR 7 /* Asynchronous serial port 0 in. */ - -#define SYNC_SER1_TX_DMA_NBR 6 /* Synchronous serial port 1 out. */ -#define SYNC_SER1_RX_DMA_NBR 7 /* Synchronous serial port 1 in. */ - -#define NETWORK_ETH1_TX_DMA_NBR 6 /* Ethernet 1 out. */ -#define NETWORK_ETH1_RX_DMA_NBR 7 /* Ethernet 1 in. */ - -#define EXTDMA2_TX_DMA_NBR 8 /* External DMA 2 out. */ -#define EXTDMA3_RX_DMA_NBR 9 /* External DMA 3 in. */ - -#define STRCOP_TX_DMA_NBR 8 /* Stream co-processor out. */ -#define STRCOP_RX_DMA_NBR 9 /* Stream co-processor in. */ - -#define ASYNC_SER3_TX_DMA_NBR 8 /* Asynchronous serial port 3 out. */ -#define ASYNC_SER3_RX_DMA_NBR 9 /* Asynchronous serial port 3 in. */ - -enum dma_owner -{ - dma_eth0, - dma_eth1, - dma_iop0, - dma_iop1, - dma_ser0, - dma_ser1, - dma_ser2, - dma_ser3, - dma_sser0, - dma_sser1, - dma_ata, - dma_strp, - dma_ext0, - dma_ext1, - dma_ext2, - dma_ext3 -}; - -int crisv32_request_dma(unsigned int dmanr, const char * device_id, - unsigned options, unsigned bandwidth, enum dma_owner owner); -void crisv32_free_dma(unsigned int dmanr); - -/* Masks used by crisv32_request_dma options: */ -#define DMA_VERBOSE_ON_ERROR 1 -#define DMA_PANIC_ON_ERROR (2|DMA_VERBOSE_ON_ERROR) -#define DMA_INT_MEM 4 - -#endif /* _ASM_ARCH_CRIS_DMA_H */ +#include "mach/dma.h" diff --git a/arch/cris/include/arch-v32/mach-fs/mach/dma.h b/arch/cris/include/arch-v32/mach-fs/mach/dma.h new file mode 100644 index 000000000000..a8c59292586a --- /dev/null +++ b/arch/cris/include/arch-v32/mach-fs/mach/dma.h @@ -0,0 +1,79 @@ +#ifndef _ASM_ARCH_CRIS_DMA_H +#define _ASM_ARCH_CRIS_DMA_H + +/* Defines for using and allocating dma channels. */ + +#define MAX_DMA_CHANNELS 10 + +#define NETWORK_ETH0_TX_DMA_NBR 0 /* Ethernet 0 out. */ +#define NETWORK_ETH0 RX_DMA_NBR 1 /* Ethernet 0 in. */ + +#define IO_PROC_DMA0_TX_DMA_NBR 2 /* IO processor DMA0 out. */ +#define IO_PROC_DMA0_RX_DMA_NBR 3 /* IO processor DMA0 in. */ + +#define ATA_TX_DMA_NBR 2 /* ATA interface out. */ +#define ATA_RX_DMA_NBR 3 /* ATA interface in. */ + +#define ASYNC_SER2_TX_DMA_NBR 2 /* Asynchronous serial port 2 out. */ +#define ASYNC_SER2_RX_DMA_NBR 3 /* Asynchronous serial port 2 in. */ + +#define IO_PROC_DMA1_TX_DMA_NBR 4 /* IO processor DMA1 out. */ +#define IO_PROC_DMA1_RX_DMA_NBR 5 /* IO processor DMA1 in. */ + +#define ASYNC_SER1_TX_DMA_NBR 4 /* Asynchronous serial port 1 out. */ +#define ASYNC_SER1_RX_DMA_NBR 5 /* Asynchronous serial port 1 in. */ + +#define SYNC_SER0_TX_DMA_NBR 4 /* Synchronous serial port 0 out. */ +#define SYNC_SER0_RX_DMA_NBR 5 /* Synchronous serial port 0 in. */ + +#define EXTDMA0_TX_DMA_NBR 6 /* External DMA 0 out. */ +#define EXTDMA1_RX_DMA_NBR 7 /* External DMA 1 in. */ + +#define ASYNC_SER0_TX_DMA_NBR 6 /* Asynchronous serial port 0 out. */ +#define ASYNC_SER0_RX_DMA_NBR 7 /* Asynchronous serial port 0 in. */ + +#define SYNC_SER1_TX_DMA_NBR 6 /* Synchronous serial port 1 out. */ +#define SYNC_SER1_RX_DMA_NBR 7 /* Synchronous serial port 1 in. */ + +#define NETWORK_ETH1_TX_DMA_NBR 6 /* Ethernet 1 out. */ +#define NETWORK_ETH1_RX_DMA_NBR 7 /* Ethernet 1 in. */ + +#define EXTDMA2_TX_DMA_NBR 8 /* External DMA 2 out. */ +#define EXTDMA3_RX_DMA_NBR 9 /* External DMA 3 in. */ + +#define STRCOP_TX_DMA_NBR 8 /* Stream co-processor out. */ +#define STRCOP_RX_DMA_NBR 9 /* Stream co-processor in. */ + +#define ASYNC_SER3_TX_DMA_NBR 8 /* Asynchronous serial port 3 out. */ +#define ASYNC_SER3_RX_DMA_NBR 9 /* Asynchronous serial port 3 in. */ + +enum dma_owner { + dma_eth0, + dma_eth1, + dma_iop0, + dma_iop1, + dma_ser0, + dma_ser1, + dma_ser2, + dma_ser3, + dma_sser0, + dma_sser1, + dma_ata, + dma_strp, + dma_ext0, + dma_ext1, + dma_ext2, + dma_ext3 +}; + +int crisv32_request_dma(unsigned int dmanr, const char *device_id, + unsigned options, unsigned bandwidth, + enum dma_owner owner); +void crisv32_free_dma(unsigned int dmanr); + +/* Masks used by crisv32_request_dma options: */ +#define DMA_VERBOSE_ON_ERROR 1 +#define DMA_PANIC_ON_ERROR (2|DMA_VERBOSE_ON_ERROR) +#define DMA_INT_MEM 4 + +#endif /* _ASM_ARCH_CRIS_DMA_H */ -- cgit v1.2.3 From 243ba2fa461a22e01e5905dd299babeaeeb418e2 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Tue, 3 Aug 2010 18:50:06 +0200 Subject: CRIS: Check if pointer is set before using it Signed-off-by: Jesper Nilsson --- arch/cris/include/arch-v32/arch/io.h | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) (limited to 'arch/cris/include') diff --git a/arch/cris/include/arch-v32/arch/io.h b/arch/cris/include/arch-v32/arch/io.h index 72024452cea9..adc5484351bf 100644 --- a/arch/cris/include/arch-v32/arch/io.h +++ b/arch/cris/include/arch-v32/arch/io.h @@ -46,10 +46,12 @@ static inline void crisv32_io_set(struct crisv32_iopin *iopin, int val) unsigned long flags; spin_lock_irqsave(&iopin->port->lock, flags); - if (val) - *iopin->port->data |= iopin->bit; - else - *iopin->port->data &= ~iopin->bit; + if (iopin->port->data) { + if (val) + *iopin->port->data |= iopin->bit; + else + *iopin->port->data &= ~iopin->bit; + } spin_unlock_irqrestore(&iopin->port->lock, flags); } @@ -60,10 +62,12 @@ static inline void crisv32_io_set_dir(struct crisv32_iopin* iopin, unsigned long flags; spin_lock_irqsave(&iopin->port->lock, flags); - if (dir == crisv32_io_dir_in) - *iopin->port->oe &= ~iopin->bit; - else - *iopin->port->oe |= iopin->bit; + if (iopin->port->oe) { + if (dir == crisv32_io_dir_in) + *iopin->port->oe &= ~iopin->bit; + else + *iopin->port->oe |= iopin->bit; + } spin_unlock_irqrestore(&iopin->port->lock, flags); } -- cgit v1.2.3 From 32e7a8ba8d435d03752be818a82748c5e3eadc36 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Tue, 3 Aug 2010 18:53:50 +0200 Subject: CRIS: Machine dependent memmap.h Move the old one to mach-fs and replace with a new one that only include the correct one for the machine architecture. Signed-off-by: Jesper Nilsson --- arch/cris/include/arch-v32/arch/memmap.h | 25 +----------------------- arch/cris/include/arch-v32/mach-fs/mach/memmap.h | 24 +++++++++++++++++++++++ 2 files changed, 25 insertions(+), 24 deletions(-) create mode 100644 arch/cris/include/arch-v32/mach-fs/mach/memmap.h (limited to 'arch/cris/include') diff --git a/arch/cris/include/arch-v32/arch/memmap.h b/arch/cris/include/arch-v32/arch/memmap.h index d29df5644d3e..81985c0a6789 100644 --- a/arch/cris/include/arch-v32/arch/memmap.h +++ b/arch/cris/include/arch-v32/arch/memmap.h @@ -1,24 +1 @@ -#ifndef _ASM_ARCH_MEMMAP_H -#define _ASM_ARCH_MEMMAP_H - -#define MEM_CSE0_START (0x00000000) -#define MEM_CSE0_SIZE (0x04000000) -#define MEM_CSE1_START (0x04000000) -#define MEM_CSE1_SIZE (0x04000000) -#define MEM_CSR0_START (0x08000000) -#define MEM_CSR1_START (0x0c000000) -#define MEM_CSP0_START (0x10000000) -#define MEM_CSP1_START (0x14000000) -#define MEM_CSP2_START (0x18000000) -#define MEM_CSP3_START (0x1c000000) -#define MEM_CSP4_START (0x20000000) -#define MEM_CSP5_START (0x24000000) -#define MEM_CSP6_START (0x28000000) -#define MEM_CSP7_START (0x2c000000) -#define MEM_INTMEM_START (0x38000000) -#define MEM_INTMEM_SIZE (0x00020000) -#define MEM_DRAM_START (0x40000000) - -#define MEM_NON_CACHEABLE (0x80000000) - -#endif +#include diff --git a/arch/cris/include/arch-v32/mach-fs/mach/memmap.h b/arch/cris/include/arch-v32/mach-fs/mach/memmap.h new file mode 100644 index 000000000000..d29df5644d3e --- /dev/null +++ b/arch/cris/include/arch-v32/mach-fs/mach/memmap.h @@ -0,0 +1,24 @@ +#ifndef _ASM_ARCH_MEMMAP_H +#define _ASM_ARCH_MEMMAP_H + +#define MEM_CSE0_START (0x00000000) +#define MEM_CSE0_SIZE (0x04000000) +#define MEM_CSE1_START (0x04000000) +#define MEM_CSE1_SIZE (0x04000000) +#define MEM_CSR0_START (0x08000000) +#define MEM_CSR1_START (0x0c000000) +#define MEM_CSP0_START (0x10000000) +#define MEM_CSP1_START (0x14000000) +#define MEM_CSP2_START (0x18000000) +#define MEM_CSP3_START (0x1c000000) +#define MEM_CSP4_START (0x20000000) +#define MEM_CSP5_START (0x24000000) +#define MEM_CSP6_START (0x28000000) +#define MEM_CSP7_START (0x2c000000) +#define MEM_INTMEM_START (0x38000000) +#define MEM_INTMEM_SIZE (0x00020000) +#define MEM_DRAM_START (0x40000000) + +#define MEM_NON_CACHEABLE (0x80000000) + +#endif -- cgit v1.2.3 From 2dc1c40c6e81ba406f2f6b00fe5eecb4c7cf1197 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Tue, 3 Aug 2010 18:58:29 +0200 Subject: CRIS: Pagetable for ARTPEC-3 Signed-off-by: Jesper Nilsson --- arch/cris/include/arch-v32/arch/pgtable.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/cris/include') diff --git a/arch/cris/include/arch-v32/arch/pgtable.h b/arch/cris/include/arch-v32/arch/pgtable.h index 08cb7ff7e4e7..c1051a8da33d 100644 --- a/arch/cris/include/arch-v32/arch/pgtable.h +++ b/arch/cris/include/arch-v32/arch/pgtable.h @@ -2,8 +2,16 @@ #define _ASM_CRIS_ARCH_PGTABLE_H /* Define the kernels virtual memory area. */ + +/* See head.S for differences between ARTPEC-3 and ETRAX FS. */ +#ifdef CONFIG_CRIS_MACH_ARTPEC3 +#define VMALLOC_START KSEG_E +#define VMALLOC_END KSEG_F +#else #define VMALLOC_START KSEG_D #define VMALLOC_END KSEG_E +#endif + #define VMALLOC_VMADDR(x) ((unsigned long)(x)) #endif /* _ASM_CRIS_ARCH_PGTABLE_H */ -- cgit v1.2.3 From da2af0a771caa8f8cff9c7bfc979f0510eb0faea Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Tue, 3 Aug 2010 19:14:29 +0200 Subject: CRIS: __do_strncpy_from_user: Don't read the byte beyond the nil Signed-off-by: Jesper Nilsson --- arch/cris/include/arch-v32/arch/uaccess.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) (limited to 'arch/cris/include') diff --git a/arch/cris/include/arch-v32/arch/uaccess.h b/arch/cris/include/arch-v32/arch/uaccess.h index 6b207f1b6622..3196019706cb 100644 --- a/arch/cris/include/arch-v32/arch/uaccess.h +++ b/arch/cris/include/arch-v32/arch/uaccess.h @@ -122,14 +122,14 @@ __do_strncpy_from_user(char *dst, const char *src, long count) __asm__ __volatile__ ( " move.d %3,%0\n" "5: move.b [%2+],$acr\n" - "1: beq 2f\n" + "1: beq 6f\n" " move.b $acr,[%1+]\n" " subq 1,%0\n" "2: bne 1b\n" " move.b [%2+],$acr\n" - " sub.d %3,%0\n" + "6: sub.d %3,%0\n" " neg.d %0,%0\n" "3:\n" " .section .fixup,\"ax\"\n" @@ -140,8 +140,7 @@ __do_strncpy_from_user(char *dst, const char *src, long count) /* The address for a fault at the first move is trivial. The address for a fault at the second move is that of the preceding branch insn, since the move insn is in - its delay-slot. That address is also a branch - target. Just so you don't get confused... */ + its delay-slot. Just so you don't get confused... */ " .previous\n" " .section __ex_table,\"a\"\n" " .dword 5b,4b\n" -- cgit v1.2.3 From 6f09963caf5ff7cb4b8de600caee3ff016e97139 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Wed, 4 Aug 2010 10:49:17 +0200 Subject: CRIS: New DMA defines for ARTPEC-3 Signed-off-by: Jesper Nilsson --- arch/cris/include/arch-v32/mach-a3/mach/dma.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) (limited to 'arch/cris/include') diff --git a/arch/cris/include/arch-v32/mach-a3/mach/dma.h b/arch/cris/include/arch-v32/mach-a3/mach/dma.h index 9e8eb13b601d..f01dca1ad108 100644 --- a/arch/cris/include/arch-v32/mach-a3/mach/dma.h +++ b/arch/cris/include/arch-v32/mach-a3/mach/dma.h @@ -5,6 +5,33 @@ #define MAX_DMA_CHANNELS 12 /* 8 and 10 not used. */ +#define NETWORK_ETH_TX_DMA_NBR 0 /* Ethernet 0 out. */ +#define NETWORK_ETH_RX_DMA_NBR 1 /* Ethernet 0 in. */ + +#define IO_PROC_DMA_TX_DMA_NBR 4 /* IO processor DMA0 out. */ +#define IO_PROC_DMA_RX_DMA_NBR 5 /* IO processor DMA0 in. */ + +#define ASYNC_SER3_TX_DMA_NBR 2 /* Asynchronous serial port 3 out. */ +#define ASYNC_SER3_RX_DMA_NBR 3 /* Asynchronous serial port 3 in. */ + +#define ASYNC_SER2_TX_DMA_NBR 6 /* Asynchronous serial port 2 out. */ +#define ASYNC_SER2_RX_DMA_NBR 7 /* Asynchronous serial port 2 in. */ + +#define ASYNC_SER1_TX_DMA_NBR 4 /* Asynchronous serial port 1 out. */ +#define ASYNC_SER1_RX_DMA_NBR 5 /* Asynchronous serial port 1 in. */ + +#define SYNC_SER_TX_DMA_NBR 6 /* Synchronous serial port 0 out. */ +#define SYNC_SER_RX_DMA_NBR 7 /* Synchronous serial port 0 in. */ + +#define ASYNC_SER0_TX_DMA_NBR 0 /* Asynchronous serial port 0 out. */ +#define ASYNC_SER0_RX_DMA_NBR 1 /* Asynchronous serial port 0 in. */ + +#define STRCOP_TX_DMA_NBR 2 /* Stream co-processor out. */ +#define STRCOP_RX_DMA_NBR 3 /* Stream co-processor in. */ + +#define dma_eth0 dma_eth +#define dma_eth1 dma_eth + enum dma_owner { dma_eth, dma_ser0, -- cgit v1.2.3 From 0c07d3abc8d76120317c108062cc7aa81fbd96d6 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Wed, 4 Aug 2010 11:03:57 +0200 Subject: CRIS: Better handling of pinmux settings Depending on eth, eth_mido and geth fields in wr_hwprot, don't set corresponding pins on gpio port b to gpio mode. This avoids re-resetting the ethernet PHY should this already have been done. Signed-off-by: Jesper Nilsson --- .../cris/include/arch-v32/mach-a3/mach/startup.inc | 28 ++++++++++++++++++++-- 1 file changed, 26 insertions(+), 2 deletions(-) (limited to 'arch/cris/include') diff --git a/arch/cris/include/arch-v32/mach-a3/mach/startup.inc b/arch/cris/include/arch-v32/mach-a3/mach/startup.inc index 2f23e5e16f4a..2d52bcc96ed5 100644 --- a/arch/cris/include/arch-v32/mach-a3/mach/startup.inc +++ b/arch/cris/include/arch-v32/mach-a3/mach/startup.inc @@ -1,9 +1,19 @@ +#ifndef STARTUP_INC_INCLUDED +#define STARTUP_INC_INCLUDED + #include #include #include #include #include + .macro GIO_SET_P BITS, OUTREG + bmi 1f ; btstq: bit -> N flag + nop + or.d \BITS, \OUTREG +1: + .endm + .macro GIO_INIT move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1 @@ -32,10 +42,23 @@ move.d 0xFFFFFFFF, $r0 move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pa), $r1 move.d $r0, [$r1] - move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pb), $r1 - move.d $r0, [$r1] move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pc), $r1 move.d $r0, [$r1] + + ;; If eth_mdio, eth, geth bits are set in hwprot, don't + ;; set them to gpio, as this means they have been configured + ;; earlier and shouldn't be changed. + move.d 0xFC000000, $r2 ; pins 25..0 are eth_mdio, eth, geth + move.d REG_ADDR(pinmux, regi_pinmux, rw_hwprot), $r1 + move.d [$r1], $r0 + btstq REG_BIT(pinmux, rw_hwprot, eth), $r0 + GIO_SET_P 0x00FFFF00, $r2 ;; pins 8..23 are eth + btstq REG_BIT(pinmux, rw_hwprot, eth_mdio), $r0 + GIO_SET_P 0x03000000, $r2 ;; pins 24..25 are eth_mdio + btstq REG_BIT(pinmux, rw_hwprot, geth), $r0 + GIO_SET_P 0x000000FF, $r2 ;; pins 0..7 are geth + move.d REG_ADDR(pinmux, regi_pinmux, rw_gio_pb), $r1 + move.d $r2, [$r1] .endm .macro START_CLOCKS @@ -58,3 +81,4 @@ move.d CONFIG_ETRAX_PIO_CE2_CFG, $r1 move.d $r1, [$r0] .endm +#endif -- cgit v1.2.3 From 97a644461d9f47a0b2085d79783017d45b575325 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Wed, 4 Aug 2010 11:18:47 +0200 Subject: CRIS: Add include guard Signed-off-by: Jesper Nilsson --- arch/cris/include/arch-v32/mach-fs/mach/startup.inc | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/cris/include') diff --git a/arch/cris/include/arch-v32/mach-fs/mach/startup.inc b/arch/cris/include/arch-v32/mach-fs/mach/startup.inc index 4a10ccbd6cc1..dd1abbdcbc7a 100644 --- a/arch/cris/include/arch-v32/mach-fs/mach/startup.inc +++ b/arch/cris/include/arch-v32/mach-fs/mach/startup.inc @@ -1,3 +1,6 @@ +#ifndef STARTUP_INC_INCLUDED +#define STARTUP_INC_INCLUDED + #include #include #include @@ -75,3 +78,5 @@ move.d $r10, [$r11] #endif .endm + +#endif -- cgit v1.2.3 From 4f248d1cea12afd2d961509eb2ba19bd0939033f Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Wed, 4 Aug 2010 11:25:13 +0200 Subject: CRIS: Better ARTPEC-3 support for gpio Add PWM support, correct comment for ARTPEC-3. Signed-off-by: Jesper Nilsson --- arch/cris/include/asm/etraxgpio.h | 96 +++++++++++++++++++++++++++++++-------- 1 file changed, 78 insertions(+), 18 deletions(-) (limited to 'arch/cris/include') diff --git a/arch/cris/include/asm/etraxgpio.h b/arch/cris/include/asm/etraxgpio.h index 38f1c8e1770c..d474818a537e 100644 --- a/arch/cris/include/asm/etraxgpio.h +++ b/arch/cris/include/asm/etraxgpio.h @@ -21,31 +21,35 @@ * /dev/leds minor 2, Access to leds depending on kernelconfig * * For ARTPEC-3 (CONFIG_CRIS_MACH_ARTPEC3): - * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction - * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction - * /dev/gpioc minor 3, 18 bit GPIO, each bit can change direction - * /dev/gpiod minor 4, 18 bit GPIO, each bit can change direction + * /dev/gpioa minor 0, 32 bit GPIO, each bit can change direction + * /dev/gpiob minor 1, 32 bit GPIO, each bit can change direction + * /dev/gpioc minor 3, 16 bit GPIO, each bit can change direction + * /dev/gpiod minor 4, 32 bit GPIO, input only * /dev/leds minor 2, Access to leds depending on kernelconfig * /dev/pwm0 minor 16, PWM channel 0 on PA30 * /dev/pwm1 minor 17, PWM channel 1 on PA31 * /dev/pwm2 minor 18, PWM channel 2 on PB26 + * /dev/ppwm minor 19, PPWM channel * */ #ifndef _ASM_ETRAXGPIO_H #define _ASM_ETRAXGPIO_H +#define GPIO_MINOR_FIRST 0 + +#define ETRAXGPIO_IOCTYPE 43 + /* etraxgpio _IOC_TYPE, bits 8 to 15 in ioctl cmd */ #ifdef CONFIG_ETRAX_ARCH_V10 -#define ETRAXGPIO_IOCTYPE 43 #define GPIO_MINOR_A 0 #define GPIO_MINOR_B 1 #define GPIO_MINOR_LEDS 2 #define GPIO_MINOR_G 3 #define GPIO_MINOR_LAST 3 +#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST #endif #ifdef CONFIG_ETRAXFS -#define ETRAXGPIO_IOCTYPE 43 #define GPIO_MINOR_A 0 #define GPIO_MINOR_B 1 #define GPIO_MINOR_LEDS 2 @@ -58,10 +62,10 @@ #else #define GPIO_MINOR_LAST 5 #endif +#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST #endif #ifdef CONFIG_CRIS_MACH_ARTPEC3 -#define ETRAXGPIO_IOCTYPE 43 #define GPIO_MINOR_A 0 #define GPIO_MINOR_B 1 #define GPIO_MINOR_LEDS 2 @@ -73,12 +77,17 @@ #else #define GPIO_MINOR_LAST 4 #endif -#define GPIO_MINOR_PWM0 16 -#define GPIO_MINOR_PWM1 17 -#define GPIO_MINOR_PWM2 18 -#define GPIO_MINOR_LAST_PWM GPIO_MINOR_PWM2 +#define GPIO_MINOR_FIRST_PWM 16 +#define GPIO_MINOR_PWM0 (GPIO_MINOR_FIRST_PWM+0) +#define GPIO_MINOR_PWM1 (GPIO_MINOR_FIRST_PWM+1) +#define GPIO_MINOR_PWM2 (GPIO_MINOR_FIRST_PWM+2) +#define GPIO_MINOR_PPWM (GPIO_MINOR_FIRST_PWM+3) +#define GPIO_MINOR_LAST_PWM GPIO_MINOR_PPWM +#define GPIO_MINOR_LAST_REAL GPIO_MINOR_LAST_PWM #endif + + /* supported ioctl _IOC_NR's */ #define IO_READBITS 0x1 /* read and return current port bits (obsolete) */ @@ -125,12 +134,10 @@ */ #define IO_READ_INBITS 0x10 /* *arg is result of reading the input pins */ #define IO_READ_OUTBITS 0x11 /* *arg is result of reading the output shadow */ -#define IO_SETGET_INPUT 0x12 /* bits set in *arg is set to input, - * *arg updated with current input pins. - */ -#define IO_SETGET_OUTPUT 0x13 /* bits set in *arg is set to output, - * *arg updated with current output pins. - */ +#define IO_SETGET_INPUT 0x12 /* bits set in *arg is set to input, */ + /* *arg updated with current input pins. */ +#define IO_SETGET_OUTPUT 0x13 /* bits set in *arg is set to output, */ + /* *arg updated with current output pins. */ /* The following ioctl's are applicable to the PWM channels only */ @@ -140,7 +147,8 @@ enum io_pwm_mode { PWM_OFF = 0, /* disabled, deallocated */ PWM_STANDARD = 1, /* 390 kHz, duty cycle 0..255/256 */ PWM_FAST = 2, /* variable freq, w/ 10ns active pulse len */ - PWM_VARFREQ = 3 /* individually configurable high/low periods */ + PWM_VARFREQ = 3, /* individually configurable high/low periods */ + PWM_SOFT = 4 /* software generated */ }; struct io_pwm_set_mode { @@ -176,4 +184,56 @@ struct io_pwm_set_duty { int duty; /* 0..255 */ }; +/* Returns information about the latest PWM pulse. + * lo: Length of the latest low period, in units of 10ns. + * hi: Length of the latest high period, in units of 10ns. + * cnt: Time since last detected edge, in units of 10ns. + * + * The input source to PWM is decied by IO_PWM_SET_INPUT_SRC. + * + * NOTE: All PWM devices is connected to the same input source. + */ +#define IO_PWM_GET_PERIOD 0x23 + +struct io_pwm_get_period { + unsigned int lo; + unsigned int hi; + unsigned int cnt; +}; + +/* Sets the input source for the PWM input. For the src value see the + * register description for gio:rw_pwm_in_cfg. + * + * NOTE: All PWM devices is connected to the same input source. + */ +#define IO_PWM_SET_INPUT_SRC 0x24 +struct io_pwm_set_input_src { + unsigned int src; /* 0..7 */ +}; + +/* Sets the duty cycles in steps of 1/256, 0 = 0%, 255 = 100% duty cycle */ +#define IO_PPWM_SET_DUTY 0x25 + +struct io_ppwm_set_duty { + int duty; /* 0..255 */ +}; + +/* Configuraton struct for the IO_PWMCLK_SET_CONFIG ioctl to configure + * PWM capable gpio pins: + */ +#define IO_PWMCLK_SETGET_CONFIG 0x26 +struct gpio_pwmclk_conf { + unsigned int gpiopin; /* The pin number based on the opened device */ + unsigned int baseclk; /* The base clock to use, or sw will select one close*/ + unsigned int low; /* The number of low periods of the baseclk */ + unsigned int high; /* The number of high periods of the baseclk */ +}; + +/* Examples: + * To get a symmetric 12 MHz clock without knowing anything about the hardware: + * baseclk = 12000000, low = 0, high = 0 + * To just get info of current setting: + * baseclk = 0, low = 0, high = 0, the values will be updated by driver. + */ + #endif -- cgit v1.2.3 From 72e08db187cbbfca00583c28b64ae81a35f4a287 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Wed, 4 Aug 2010 11:30:41 +0200 Subject: CRIS: Add ARTPEC-3 and timestamps for sync-serial Signed-off-by: Jesper Nilsson --- arch/cris/include/asm/sync_serial.h | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) (limited to 'arch/cris/include') diff --git a/arch/cris/include/asm/sync_serial.h b/arch/cris/include/asm/sync_serial.h index d87c24df2b38..7f827fea30e7 100644 --- a/arch/cris/include/asm/sync_serial.h +++ b/arch/cris/include/asm/sync_serial.h @@ -19,6 +19,7 @@ #define SSP_OPOLARITY _IOR('S', 4, unsigned int) #define SSP_SPI _IOR('S', 5, unsigned int) #define SSP_INBUFCHUNK _IOR('S', 6, unsigned int) +#define SSP_INPUT _IOR('S', 7, unsigned int) /* Values for SSP_SPEED */ #define SSP150 0 @@ -37,6 +38,7 @@ #define SSP921600 13 #define SSP3125000 14 #define CODEC 15 +#define CODEC_f32768 16 #define FREQ_4MHz 0 #define FREQ_2MHz 1 @@ -46,9 +48,14 @@ #define FREQ_128kHz 5 #define FREQ_64kHz 6 #define FREQ_32kHz 7 +/* FREQ_* with values where bit (value & 0x10) is set are */ +/* used for CODEC_f32768 */ +#define FREQ_4096kHz 16 /* CODEC_f32768 */ /* Used by application to set CODEC divider, word rate and frame rate */ -#define CODEC_VAL(freq, clk_per_sync, sync_per_frame) (CODEC | (freq << 8) | (clk_per_sync << 16) | (sync_per_frame << 28)) +#define CODEC_VAL(freq, clk_per_sync, sync_per_frame) \ + ((CODEC + ((freq & 0x10) >> 4)) | (freq << 8) | \ + (clk_per_sync << 16) | (sync_per_frame << 28)) /* Used by driver to extract speed */ #define GET_SPEED(x) (x & 0xff) @@ -68,6 +75,7 @@ #define NORMAL_SYNC 1 #define EARLY_SYNC 2 #define SECOND_WORD_SYNC 0x40000 +#define LATE_SYNC 0x80000 #define BIT_SYNC 4 #define WORD_SYNC 8 @@ -104,4 +112,21 @@ /* Values for SSP_INBUFCHUNK */ /* plain integer with the size of DMA chunks */ +/* To ensure that the timestamps are aligned with the data being read + * the read length MUST be a multiple of the length of the DMA buffers. + * + * Use a multiple of SSP_INPUT_CHUNK_SIZE defined below. + */ +#define SSP_INPUT_CHUNK_SIZE 256 + +/* Request struct to pass through the ioctl interface to read + * data with timestamps. + */ +struct ssp_request { + char __user *buf; /* Where to put the data. */ + size_t len; /* Size of buf. MUST be a multiple of */ + /* SSP_INPUT_CHUNK_SIZE! */ + struct timespec ts; /* The time the data was sampled. */ +}; + #endif -- cgit v1.2.3 From 7e005f79791dcd58436c88ded4a7f5aed1b82147 Mon Sep 17 00:00:00 2001 From: FUJITA Tomonori Date: Mon, 31 May 2010 15:59:04 +0900 Subject: remove needless ISA_DMA_THRESHOLD Architectures don't need to define ISA_DMA_THRESHOLD anymore. Signed-off-by: FUJITA Tomonori Acked-by: James Bottomley Acked-by: David Howells Signed-off-by: Jens Axboe --- arch/cris/include/asm/scatterlist.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/cris/include') diff --git a/arch/cris/include/asm/scatterlist.h b/arch/cris/include/asm/scatterlist.h index 249a7842ff5f..f11f8f40ec4a 100644 --- a/arch/cris/include/asm/scatterlist.h +++ b/arch/cris/include/asm/scatterlist.h @@ -3,6 +3,4 @@ #include -#define ISA_DMA_THRESHOLD (0x1fffffff) - #endif /* !(__ASM_CRIS_SCATTERLIST_H) */ -- cgit v1.2.3 From f1d23ed8218ca5afaf178a6495253dbb7fc98f57 Mon Sep 17 00:00:00 2001 From: Claudio Scordino Date: Mon, 31 May 2010 10:19:09 +0200 Subject: CRIS: ioctl for getting RS485 information Add ioctl to CRIS serial driver to get RS485 data from user-space. Signed-off-by: Claudio Scordino Signed-off-by: Jesper Nilsson --- arch/cris/include/asm/ioctls.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/cris/include') diff --git a/arch/cris/include/asm/ioctls.h b/arch/cris/include/asm/ioctls.h index 35bbc181598a..076c07824eb6 100644 --- a/arch/cris/include/asm/ioctls.h +++ b/arch/cris/include/asm/ioctls.h @@ -77,6 +77,7 @@ #define TIOCSERSETRS485 0x5461 /* enable rs-485 (deprecated) */ #define TIOCSERWRRS485 0x5462 /* write rs-485 */ #define TIOCSRS485 0x5463 /* enable rs-485 */ +#define TIOCGRS485 0x542E /* get rs-485 */ /* Used for packet mode */ #define TIOCPKT_DATA 0 -- cgit v1.2.3 From a3c8ed693da9782f924223f65da9261da796e49b Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Thu, 17 Jun 2010 13:16:08 -0700 Subject: tty: remove remaining Hayes ESP ioctls As Jeff Dike pointed out, the Hayes ESP driver was removed in commit f53a2ade0bb9f2a81f473e6469155172a96b7c38, so these ioctl definitions should also be removed. This cleans up the remaining arch-specific locations of this ioctl value. Thanks to Arnd for pointing these out. Cc: Jeff Dike Cc: Arnd Bergmann Cc: Alan Cox Signed-off-by: Greg Kroah-Hartman --- arch/cris/include/asm/ioctls.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/cris/include') diff --git a/arch/cris/include/asm/ioctls.h b/arch/cris/include/asm/ioctls.h index 076c07824eb6..bb49142dc6ab 100644 --- a/arch/cris/include/asm/ioctls.h +++ b/arch/cris/include/asm/ioctls.h @@ -70,8 +70,6 @@ #define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ -#define TIOCGHAYESESP 0x545E /* Get Hayes ESP configuration */ -#define TIOCSHAYESESP 0x545F /* Set Hayes ESP configuration */ #define FIOQSIZE 0x5460 #define TIOCSERSETRS485 0x5461 /* enable rs-485 (deprecated) */ -- cgit v1.2.3 From 26df6d13406d1a53b0bda08bd712f1924affd7cd Mon Sep 17 00:00:00 2001 From: "hyc@symas.com" Date: Tue, 22 Jun 2010 10:14:49 -0700 Subject: tty: Add EXTPROC support for LINEMODE This patch is against the 2.6.34 source. Paraphrased from the 1989 BSD patch by David Borman @ cray.com: These are the changes needed for the kernel to support LINEMODE in the server. There is a new bit in the termios local flag word, EXTPROC. When this bit is set, several aspects of the terminal driver are disabled. Input line editing, character echo, and mapping of signals are all disabled. This allows the telnetd to turn off these functions when in linemode, but still keep track of what state the user wants the terminal to be in. New ioctl: TIOCSIG Generate a signal to processes in the current process group of the pty. There is a new mode for packet driver, the TIOCPKT_IOCTL bit. When packet mode is turned on in the pty, and the EXTPROC bit is set, then whenever the state of the pty is changed, the next read on the master side of the pty will have the TIOCPKT_IOCTL bit set. This allows the process on the server side of the pty to know when the state of the terminal has changed; it can then issue the appropriate ioctl to retrieve the new state. Since the original BSD patches accompanied the source code for telnet I've left that reference here, but obviously the feature is useful for any remote terminal protocol, including ssh. The corresponding feature has existed in the BSD tty driver since 1989. For historical reference, a good copy of the relevant files can be found here: http://anonsvn.mit.edu/viewvc/krb5/trunk/src/appl/telnet/?pathrev=17741 Signed-off-by: Howard Chu Cc: Alan Cox Signed-off-by: Greg Kroah-Hartman --- arch/cris/include/asm/ioctls.h | 2 ++ arch/cris/include/asm/termbits.h | 1 + 2 files changed, 3 insertions(+) (limited to 'arch/cris/include') diff --git a/arch/cris/include/asm/ioctls.h b/arch/cris/include/asm/ioctls.h index bb49142dc6ab..c9129ed37443 100644 --- a/arch/cris/include/asm/ioctls.h +++ b/arch/cris/include/asm/ioctls.h @@ -54,6 +54,7 @@ #define TCSETSF2 _IOW('T',0x2D, struct termios2) #define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ +#define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ #define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ #define FIOCLEX 0x5451 @@ -85,6 +86,7 @@ #define TIOCPKT_START 8 #define TIOCPKT_NOSTOP 16 #define TIOCPKT_DOSTOP 32 +#define TIOCPKT_IOCTL 64 #define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ diff --git a/arch/cris/include/asm/termbits.h b/arch/cris/include/asm/termbits.h index 66e1a7492a0c..1c43bc874ccf 100644 --- a/arch/cris/include/asm/termbits.h +++ b/arch/cris/include/asm/termbits.h @@ -214,6 +214,7 @@ struct ktermios { #define FLUSHO 0010000 #define PENDIN 0040000 #define IEXTEN 0100000 +#define EXTPROC 0200000 /* tcflow() and TCXONC use these */ #define TCOOFF 0 -- cgit v1.2.3 From 4565f0170dfc849b3629c27d769db800467baa62 Mon Sep 17 00:00:00 2001 From: FUJITA Tomonori Date: Tue, 10 Aug 2010 18:03:22 -0700 Subject: dma-mapping: unify dma_get_cache_alignment implementations dma_get_cache_alignment returns the minimum DMA alignment. Architectures defines it as ARCH_DMA_MINALIGN (formally ARCH_KMALLOC_MINALIGN). So we can unify dma_get_cache_alignment implementations. Note that some architectures implement dma_get_cache_alignment wrongly. dma_get_cache_alignment() should return the minimum DMA alignment. So fully-coherent architectures should return 1. This patch also fixes this issue. Signed-off-by: FUJITA Tomonori Cc: Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/cris/include/asm/dma-mapping.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'arch/cris/include') diff --git a/arch/cris/include/asm/dma-mapping.h b/arch/cris/include/asm/dma-mapping.h index da8ef8e8f842..fc30fd0b2a04 100644 --- a/arch/cris/include/asm/dma-mapping.h +++ b/arch/cris/include/asm/dma-mapping.h @@ -152,12 +152,6 @@ dma_set_mask(struct device *dev, u64 mask) return 0; } -static inline int -dma_get_cache_alignment(void) -{ - return (1 << INTERNODE_CACHE_SHIFT); -} - #define dma_is_consistent(d, h) (1) static inline void -- cgit v1.2.3 From 3b9c6c11f519718d618f5d7c9508daf78b207f6f Mon Sep 17 00:00:00 2001 From: FUJITA Tomonori Date: Tue, 10 Aug 2010 18:03:25 -0700 Subject: dma-mapping: remove dma_is_consistent API Architectures implement dma_is_consistent() in different ways (some misinterpret the definition of API in DMA-API.txt). So it hasn't been so useful for drivers. We have only one user of the API in tree. Unlikely out-of-tree drivers use the API. Even if we fix dma_is_consistent() in some architectures, it doesn't look useful at all. It was invented long ago for some old systems that can't allocate coherent memory at all. It's better to export only APIs that are definitely necessary for drivers. Let's remove this API. Signed-off-by: FUJITA Tomonori Cc: James Bottomley Reviewed-by: Konrad Rzeszutek Wilk Cc: Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/cris/include/asm/dma-mapping.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/cris/include') diff --git a/arch/cris/include/asm/dma-mapping.h b/arch/cris/include/asm/dma-mapping.h index fc30fd0b2a04..8588b2ccf854 100644 --- a/arch/cris/include/asm/dma-mapping.h +++ b/arch/cris/include/asm/dma-mapping.h @@ -152,8 +152,6 @@ dma_set_mask(struct device *dev, u64 mask) return 0; } -#define dma_is_consistent(d, h) (1) - static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) -- cgit v1.2.3 From 5272a7534afc5e888e702ca2c6f439a6c62f3752 Mon Sep 17 00:00:00 2001 From: Jesper Nilsson Date: Thu, 12 Aug 2010 14:32:58 +0200 Subject: CRIS: Define io_remap_pfn_range as remap_pfn_range CRIS don't need any special mapping for io, but didn't define this, meaning that all uses of io_remap_pfn_range lead to compile errors. This fixes a compile error introduced in CRIS when drivers/mtd/mtdchar.c mmap handling was changed in commit dd02b67d5e9e7896891fa27eb5db65f55a290998 Signed-off-by: Jesper Nilsson --- arch/cris/include/asm/pgtable.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/cris/include') diff --git a/arch/cris/include/asm/pgtable.h b/arch/cris/include/asm/pgtable.h index 99ea6cd1b143..f63d6fccbc6c 100644 --- a/arch/cris/include/asm/pgtable.h +++ b/arch/cris/include/asm/pgtable.h @@ -260,6 +260,9 @@ static inline pgd_t * pgd_offset(const struct mm_struct *mm, unsigned long addre #define pgd_ERROR(e) \ printk("%s:%d: bad pgd %p(%08lx).\n", __FILE__, __LINE__, &(e), pgd_val(e)) +#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ + remap_pfn_range(vma, vaddr, pfn, size, prot) + extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; /* defined in head.S */ -- cgit v1.2.3