From 6656920b0b50beacb6cb64cf55273cbb686e436e Mon Sep 17 00:00:00 2001 From: Chris Zankel Date: Wed, 22 Aug 2007 10:14:51 -0700 Subject: [XTENSA] Add support for cache-aliasing Add support for processors that have cache-aliasing issues, such as the Stretch S5000 processor. Cache-aliasing means that the size of the cache (for one way) is larger than the page size, thus, a page can end up in several places in cache depending on the virtual to physical translation. The method used here is to map a user page temporarily through the auto-refill way 0 and of of the DTLB. We probably will want to revisit this issue and use a better approach with kmap/kunmap. Signed-off-by: Chris Zankel --- arch/xtensa/mm/fault.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/xtensa/mm/fault.c') diff --git a/arch/xtensa/mm/fault.c b/arch/xtensa/mm/fault.c index 16004067add3..45d28f217c03 100644 --- a/arch/xtensa/mm/fault.c +++ b/arch/xtensa/mm/fault.c @@ -24,6 +24,8 @@ unsigned long asid_cache = ASID_USER_FIRST; void bad_page_fault(struct pt_regs*, unsigned long, int); +#undef DEBUG_PAGE_FAULT + /* * This routine handles page faults. It determines the address, * and the problem, and then passes it off to one of the appropriate @@ -64,7 +66,7 @@ void do_page_fault(struct pt_regs *regs) exccause == EXCCAUSE_ITLB_MISS || exccause == EXCCAUSE_FETCH_CACHE_ATTRIBUTE) ? 1 : 0; -#if 0 +#ifdef DEBUG_PAGE_FAULT printk("[%s:%d:%08x:%d:%08x:%s%s]\n", current->comm, current->pid, address, exccause, regs->pc, is_write? "w":"", is_exec? "x":""); #endif @@ -219,7 +221,7 @@ bad_page_fault(struct pt_regs *regs, unsigned long address, int sig) /* Are we prepared to handle this kernel fault? */ if ((entry = search_exception_tables(regs->pc)) != NULL) { -#if 1 +#ifdef DEBUG_PAGE_FAULT printk(KERN_DEBUG "%s: Exception at pc=%#010lx (%lx)\n", current->comm, regs->pc, entry->fixup); #endif -- cgit v1.2.3