From 3c4ee4e2520775896efc6ab850c4c27971fbcf2a Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 10 Aug 2005 14:41:45 +0100 Subject: [ARM SMP] Only enable V6K instructions on V6 MP core CPUs Signed-off-by: Russell King --- arch/arm/lib/bitops.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/lib/bitops.h b/arch/arm/lib/bitops.h index 2036ff15bda9..64a988c1ad44 100644 --- a/arch/arm/lib/bitops.h +++ b/arch/arm/lib/bitops.h @@ -1,4 +1,6 @@ -#if __LINUX_ARM_ARCH__ >= 6 +#include + +#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_CPU_MPCORE) .macro bitop, instr mov r2, #1 and r3, r0, #7 @ Get bit offset -- cgit v1.2.3 From b876386ee47e3ac9375a36e9107b8bd32e0599fc Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 10 Aug 2005 14:52:52 +0100 Subject: [ARM SMP] Clear the exclusive monitor on ARMv6 CPUs on context switch Ensure that the exclusive monitor is cleared on context switch with ARMv6 CPUs. Signed-off-by: Russell King --- arch/arm/kernel/entry-armv.S | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 39a6c1b0b9a3..7152bfbee581 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -533,6 +533,13 @@ ENTRY(__switch_to) ldr r3, [r2, #TI_TP_VALUE] stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack ldr r6, [r2, #TI_CPU_DOMAIN]! +#if __LINUX_ARM_ARCH__ >= 6 +#ifdef CONFIG_CPU_MPCORE + clrex +#else + strex r3, r4, [ip] @ Clear exclusive monitor +#endif +#endif #if defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_IWMMXT) mra r4, r5, acc0 stmia ip, {r4, r5} -- cgit v1.2.3