From a673dae8c4ad9ee02a80617c6569ac66991c6c82 Mon Sep 17 00:00:00 2001 From: Claudiu Beznea Date: Thu, 15 Jun 2023 12:32:24 +0300 Subject: clk: at91: clk-sam9x60-pll: add support for parent_hw Add support for parent_hw in SAM9X60 PLL clock drivers. With this parent-child relation is described with pointers rather than strings making registration a bit faster. All the SoC based drivers that rely on clk-sam9x60-pll were adapted to the new API change. The switch itself for SoCs will be done in subsequent patches. Signed-off-by: Claudiu Beznea Reviewed-by: Maxime Ripard Link: https://lore.kernel.org/r/20230615093227.576102-9-claudiu.beznea@microchip.com --- drivers/clk/at91/pmc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/clk/at91/pmc.h') diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 8e32be004843..0f52e80bcd49 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -220,7 +220,8 @@ at91_clk_register_plldiv(struct regmap *regmap, const char *name, struct clk_hw * __init sam9x60_clk_register_div_pll(struct regmap *regmap, spinlock_t *lock, - const char *name, const char *parent_name, u8 id, + const char *name, const char *parent_name, + struct clk_hw *parent_hw, u8 id, const struct clk_pll_characteristics *characteristics, const struct clk_pll_layout *layout, u32 flags, u32 safe_div); -- cgit v1.2.3