From e442d234405ad75e2d3d2baf15b364ee2c3573c9 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Fri, 11 Oct 2013 10:51:23 +0200 Subject: clk: at91: add PMC master clock This patch adds new at91 master clock implementation using common clk framework. The master clock layout describe the MCKR register layout. There are 2 master clock layouts: - at91rm9200 - at91sam9x5 Master clocks are given characteristics: - min/max clock output rate These characteristics are checked during rate change to avoid over/underclocking. These characteristics are described in atmel's SoC datasheet in "Electrical Characteristics" paragraph. Signed-off-by: Boris BREZILLON Acked-by: Mike Turquette Signed-off-by: Nicolas Ferre --- drivers/clk/at91/pmc.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/clk/at91/pmc.h') diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 15aaf38e37c5..be5c964accad 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -72,4 +72,9 @@ extern void __init of_sama5d3_clk_pll_setup(struct device_node *np, extern void __init of_at91sam9x5_clk_plldiv_setup(struct device_node *np, struct at91_pmc *pmc); +extern void __init of_at91rm9200_clk_master_setup(struct device_node *np, + struct at91_pmc *pmc); +extern void __init of_at91sam9x5_clk_master_setup(struct device_node *np, + struct at91_pmc *pmc); + #endif /* __PMC_H_ */ -- cgit v1.2.3