From f3ade253615ae6d83aeb72d1c8a96f62a4b4b29b Mon Sep 17 00:00:00 2001 From: Huacai Chen Date: Thu, 15 Nov 2018 15:53:52 +0800 Subject: MIPS: Loongson: Add Loongson-3A R2.1 basic support Loongson-3A R2.1 is the bugfix revision of Loongson-3A R2. All Loongson-3 CPU family: Code-name Brand-name PRId Loongson-3A R1 Loongson-3A1000 0x6305 Loongson-3A R2 Loongson-3A2000 0x6308 Loongson-3A R2.1 Loongson-3A2000 0x630c Loongson-3A R3 Loongson-3A3000 0x6309 Loongson-3A R3.1 Loongson-3A3000 0x630d Loongson-3B R1 Loongson-3B1000 0x6306 Loongson-3B R2 Loongson-3B1500 0x6307 Signed-off-by: Huacai Chen Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/21128/ Cc: Ralf Baechle Cc: James Hogan Cc: Steven J . Hill Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang Cc: Zhangjin Wu --- drivers/platform/mips/cpu_hwmon.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'drivers/platform') diff --git a/drivers/platform/mips/cpu_hwmon.c b/drivers/platform/mips/cpu_hwmon.c index f66521c7f846..42efcb850722 100644 --- a/drivers/platform/mips/cpu_hwmon.c +++ b/drivers/platform/mips/cpu_hwmon.c @@ -25,9 +25,10 @@ int loongson3_cpu_temp(int cpu) case PRID_REV_LOONGSON3A_R1: reg = (reg >> 8) & 0xff; break; - case PRID_REV_LOONGSON3A_R2: case PRID_REV_LOONGSON3B_R1: case PRID_REV_LOONGSON3B_R2: + case PRID_REV_LOONGSON3A_R2_0: + case PRID_REV_LOONGSON3A_R2_1: reg = ((reg >> 8) & 0xff) - 100; break; case PRID_REV_LOONGSON3A_R3_0: -- cgit v1.2.3