From ae77cbc1e7b90473a2b0963bce0e1eb163873214 Mon Sep 17 00:00:00 2001 From: Ken Steele Date: Wed, 7 Aug 2013 12:39:56 -0400 Subject: RAID: add tilegx SIMD implementation of raid6 This change adds TILE-Gx SIMD instructions to the software raid (md), modeling the Altivec implementation. This is only for Syndrome generation; there is more that could be done to improve recovery, as in the recent Intel SSE3 recovery implementation. The code unrolls 8 times; this turns out to be the best on tilegx hardware among the set 1, 2, 4, 8 or 16. The code reads one cache-line of data from each disk, stores P and Q then goes to the next cache-line. The test code in sys/linux/lib/raid6/test reports 2008 MB/s data read rate for syndrome generation using 18 disks (16 data and 2 parity). It was 1512 MB/s before this SIMD optimizations. This is running on 1 core with all the data in cache. This is based on the paper The Mathematics of RAID-6. (http://kernel.org/pub/linux/kernel/people/hpa/raid6.pdf). Signed-off-by: Ken Steele Signed-off-by: Chris Metcalf Signed-off-by: NeilBrown --- lib/raid6/algos.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'lib/raid6/algos.c') diff --git a/lib/raid6/algos.c b/lib/raid6/algos.c index 6d7316fe9f30..b9f340180a3b 100644 --- a/lib/raid6/algos.c +++ b/lib/raid6/algos.c @@ -65,6 +65,9 @@ const struct raid6_calls * const raid6_algos[] = { &raid6_altivec2, &raid6_altivec4, &raid6_altivec8, +#endif +#if defined(CONFIG_TILEGX) + &raid6_tilegx8, #endif &raid6_intx1, &raid6_intx2, -- cgit v1.2.3