summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/arm/mediatek/mediatek,pciesys.txt
blob: 7fe5dc6097a6a35b7d25f63cbbc0d5ae3bb9870c (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
MediaTek PCIESYS controller
============================

The MediaTek PCIESYS controller provides various clocks to the system.

Required Properties:

- compatible: Should be:
	- "mediatek,mt7622-pciesys", "syscon"
- #clock-cells: Must be 1
- #reset-cells: Must be 1

The PCIESYS controller uses the common clk binding from
Documentation/devicetree/bindings/clock/clock-bindings.txt
The available clocks are defined in dt-bindings/clock/mt*-clk.h.

Example:

pciesys: pciesys@1a100800 {
	compatible = "mediatek,mt7622-pciesys", "syscon";
	reg = <0 0x1a100800 0 0x1000>;
	#clock-cells = <1>;
	#reset-cells = <1>;
};