summaryrefslogtreecommitdiffstats
path: root/arch/arc/boot/dts/vdk_axs10x_mb.dtsi
blob: 45cd665fca232e80d244afe43239df125b1ac215 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
/*
 * Support for peripherals on the AXS10x mainboard (VDK version)
 *
 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

/ {
	axs10x_mb_vdk {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x00000000 0xe0000000 0x10000000>;
		interrupt-parent = <&mb_intc>;

		clocks {
			apbclk: apbclk {
				compatible = "fixed-clock";
				clock-frequency = <50000000>;
				#clock-cells = <0>;
			};

		};

		ethernet@0x18000 {
			#interrupt-cells = <1>;
			compatible = "snps,dwmac";
			reg = < 0x18000 0x2000 >;
			interrupts = < 4 >;
			interrupt-names = "macirq";
			phy-mode = "rgmii";
			snps,phy-addr = < 0 >;  // VDK model phy address is 0
			snps,pbl = < 32 >;
			clocks = <&apbclk>;
			clock-names = "stmmaceth";
		};

		ehci@0x40000 {
			compatible = "generic-ehci";
			reg = < 0x40000 0x100 >;
			interrupts = < 8 >;
		};

		uart@0x20000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x20000 0x100>;
			clock-frequency = <2403200>;
			interrupts = <17>;
			baud = <115200>;
			reg-shift = <2>;
			reg-io-width = <4>;
		};

		uart@0x21000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x21000 0x100>;
			clock-frequency = <2403200>;
			interrupts = <18>;
			baud = <115200>;
			reg-shift = <2>;
			reg-io-width = <4>;
		};

		uart@0x22000 {
			compatible = "snps,dw-apb-uart";
			reg = <0x22000 0x100>;
			clock-frequency = <2403200>;
			interrupts = <19>;
			baud = <115200>;
			reg-shift = <2>;
			reg-io-width = <4>;
		};

/* PGU output directly sent to virtual LCD screen; hdmi controller not modelled */
		pgu@0x17000 {
			compatible = "snps,arcpgufb";
			reg = <0x17000 0x400>;
			clock-frequency = <51000000>; /* PGU'clock is initated in init function */
			/* interrupts = <5>;   PGU interrupts not used, this vector is used for ps2 below */
		};

/* VDK has additional ps2 keyboard/mouse interface integrated in LCD screen model */
		ps2: ps2@e0017400 {
			compatible = "snps,arc_ps2";
			reg = <0x17400 0x14>;
			interrupts = <5>;
			interrupt-names = "arc_ps2_irq";
		};
	};
};