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/*
* Device Tree Source for the Blanche board
*
* Copyright (C) 2014 Renesas Electronics Corporation
* Copyright (C) 2016 Cogent Embedded, Inc.
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
/dts-v1/;
#include "r8a7792.dtsi"
/ {
model = "Blanche";
compatible = "renesas,blanche", "renesas,r8a7792";
aliases {
serial0 = &scif0;
serial1 = &scif3;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = "serial0:115200n8";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
d3_3v: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "D3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
ethernet@18000000 {
compatible = "smsc,lan89218", "smsc,lan9115";
reg = <0 0x18000000 0 0x100>;
phy-mode = "mii";
interrupt-parent = <&irqc>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
smsc,irq-push-pull;
reg-io-width = <4>;
vddvario-supply = <&d3_3v>;
vdd33a-supply = <&d3_3v>;
pinctrl-0 = <&lan89218_pins>;
pinctrl-names = "default";
};
};
&extal_clk {
clock-frequency = <20000000>;
};
&can_clk {
clock-frequency = <48000000>;
};
&pfc {
scif0_pins: scif0 {
groups = "scif0_data";
function = "scif0";
};
scif3_pins: scif3 {
groups = "scif3_data";
function = "scif3";
};
lan89218_pins: lan89218 {
intc {
groups = "intc_irq0";
function = "intc";
};
lbsc {
groups = "lbsc_ex_cs0";
function = "lbsc";
};
};
can0_pins: can0 {
groups = "can0_data", "can_clk";
function = "can0";
};
};
&scif0 {
pinctrl-0 = <&scif0_pins>;
pinctrl-names = "default";
status = "okay";
};
&scif3 {
pinctrl-0 = <&scif3_pins>;
pinctrl-names = "default";
status = "okay";
};
&can0 {
pinctrl-0 = <&can0_pins>;
pinctrl-names = "default";
status = "okay";
};
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