1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
|
/*
* Copyright (C) ST-Ericsson SA 2010
*
* Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
* License terms: GNU General Public License (GPL) version 2
*/
#include <linux/platform_device.h>
#include <linux/amba/bus.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/hardware/gic.h>
#include <asm/mach/map.h>
#include <asm/localtimer.h>
#include <plat/mtu.h>
#include <mach/hardware.h>
#include <mach/setup.h>
#include <mach/devices.h>
#include "clock.h"
static struct map_desc ux500_io_desc[] __initdata = {
__IO_DEV_DESC(UX500_UART0_BASE, SZ_4K),
__IO_DEV_DESC(UX500_UART2_BASE, SZ_4K),
__IO_DEV_DESC(UX500_GIC_CPU_BASE, SZ_4K),
__IO_DEV_DESC(UX500_GIC_DIST_BASE, SZ_4K),
__IO_DEV_DESC(UX500_L2CC_BASE, SZ_4K),
__IO_DEV_DESC(UX500_TWD_BASE, SZ_4K),
__IO_DEV_DESC(UX500_SCU_BASE, SZ_4K),
__IO_DEV_DESC(UX500_CLKRST1_BASE, SZ_4K),
__IO_DEV_DESC(UX500_CLKRST2_BASE, SZ_4K),
__IO_DEV_DESC(UX500_CLKRST3_BASE, SZ_4K),
__IO_DEV_DESC(UX500_CLKRST5_BASE, SZ_4K),
__IO_DEV_DESC(UX500_CLKRST6_BASE, SZ_4K),
__IO_DEV_DESC(UX500_MTU0_BASE, SZ_4K),
__IO_DEV_DESC(UX500_MTU1_BASE, SZ_4K),
__IO_DEV_DESC(UX500_BACKUPRAM0_BASE, SZ_8K),
};
static struct amba_device *ux500_amba_devs[] __initdata = {
&ux500_pl031_device,
};
void __init ux500_map_io(void)
{
iotable_init(ux500_io_desc, ARRAY_SIZE(ux500_io_desc));
}
void __init ux500_init_devices(void)
{
amba_add_devices(ux500_amba_devs, ARRAY_SIZE(ux500_amba_devs));
}
void __init ux500_init_irq(void)
{
gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29);
gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
/*
* Init clocks here so that they are available for system timer
* initialization.
*/
clk_init();
}
#ifdef CONFIG_CACHE_L2X0
static int ux500_l2x0_init(void)
{
void __iomem *l2x0_base;
l2x0_base = __io_address(UX500_L2CC_BASE);
/* 64KB way size, 8 way associativity, force WA */
l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
return 0;
}
early_initcall(ux500_l2x0_init);
#endif
static void __init ux500_timer_init(void)
{
#ifdef CONFIG_LOCAL_TIMERS
/* Setup the local timer base */
twd_base = __io_address(UX500_TWD_BASE);
#endif
/* Setup the MTU base */
if (cpu_is_u8500ed())
mtu_base = __io_address(U8500_MTU0_BASE_ED);
else
mtu_base = __io_address(UX500_MTU0_BASE);
nmdk_timer_init();
}
struct sys_timer ux500_timer = {
.init = ux500_timer_init,
};
|
