summaryrefslogtreecommitdiffstats
path: root/tools/arch/arm64/include/asm/barrier.h
blob: 12835ea0e4173c281e5ddfe0883595492e985b09 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _TOOLS_LINUX_ASM_AARCH64_BARRIER_H
#define _TOOLS_LINUX_ASM_AARCH64_BARRIER_H

/*
 * From tools/perf/perf-sys.h, last modified in:
 * f428ebd184c82a7914b2aa7e9f868918aaf7ea78 perf tools: Fix AAAAARGH64 memory barriers
 *
 * XXX: arch/arm64/include/asm/barrier.h in the kernel sources use dsb, is this
 * a case like for arm32 where we do things differently in userspace?
 */

#define mb()		asm volatile("dmb ish" ::: "memory")
#define wmb()		asm volatile("dmb ishst" ::: "memory")
#define rmb()		asm volatile("dmb ishld" ::: "memory")

#define smp_store_release(p, v)					\
do {								\
	union { typeof(*p) __val; char __c[1]; } __u =		\
		{ .__val = (__force typeof(*p)) (v) }; 		\
								\
	switch (sizeof(*p)) {					\
	case 1:							\
		asm volatile ("stlrb %w1, %0"			\
				: "=Q" (*p)			\
				: "r" (*(__u8 *)__u.__c)	\
				: "memory");			\
		break;						\
	case 2:							\
		asm volatile ("stlrh %w1, %0"			\
				: "=Q" (*p)			\
				: "r" (*(__u16 *)__u.__c)	\
				: "memory");			\
		break;						\
	case 4:							\
		asm volatile ("stlr %w1, %0"			\
				: "=Q" (*p)			\
				: "r" (*(__u32 *)__u.__c)	\
				: "memory");			\
		break;						\
	case 8:							\
		asm volatile ("stlr %1, %0"			\
				: "=Q" (*p)			\
				: "r" (*(__u64 *)__u.__c)	\
				: "memory");			\
		break;						\
	default:						\
		/* Only to shut up gcc ... */			\
		mb();						\
		break;						\
	}							\
} while (0)

#define smp_load_acquire(p)					\
({								\
	union { typeof(*p) __val; char __c[1]; } __u;		\
								\
	switch (sizeof(*p)) {					\
	case 1:							\
		asm volatile ("ldarb %w0, %1"			\
			: "=r" (*(__u8 *)__u.__c)		\
			: "Q" (*p) : "memory");			\
		break;						\
	case 2:							\
		asm volatile ("ldarh %w0, %1"			\
			: "=r" (*(__u16 *)__u.__c)		\
			: "Q" (*p) : "memory");			\
		break;						\
	case 4:							\
		asm volatile ("ldar %w0, %1"			\
			: "=r" (*(__u32 *)__u.__c)		\
			: "Q" (*p) : "memory");			\
		break;						\
	case 8:							\
		asm volatile ("ldar %0, %1"			\
			: "=r" (*(__u64 *)__u.__c)		\
			: "Q" (*p) : "memory");			\
		break;						\
	default:						\
		/* Only to shut up gcc ... */			\
		mb();						\
		break;						\
	}							\
	__u.__val;						\
})

#endif /* _TOOLS_LINUX_ASM_AARCH64_BARRIER_H */