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authorFelix Fietkau <nbd@openwrt.org>2016-02-07 21:00:11 +0000
committerFelix Fietkau <nbd@openwrt.org>2016-02-07 21:00:11 +0000
commitb1431170ee0dc2e47587a18799abaf236a33f0a9 (patch)
treea635bef742ba427c1dd5e699b24d050ed3450a70
parenta63fd6faf75cc5010d3da87af40d1b98e6a6c110 (diff)
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ar71xx: register only the built-in switch MDIO bus, hook up eth0 to it, should hopefully fix regression reported in #21520
Signed-off-by: Felix Fietkau <nbd@openwrt.org> SVN-Revision: 48652
-rw-r--r--target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr6500-v2.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr6500-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr6500-v2.c
index c2e75c278a..1e72477646 100644
--- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr6500-v2.c
+++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wdr6500-v2.c
@@ -100,13 +100,14 @@ static void __init tl_ap151_setup(void)
ath79_setup_ar933x_phy4_switch(false, false);
- ath79_register_mdio(0, 0x0);
+ ath79_register_mdio(1, 0x0);
/* WAN */
ath79_switch_data.phy4_mii_en = 1;
ath79_switch_data.phy_poll_mask = BIT(4);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ath79_eth0_data.phy_mask = BIT(4);
+ ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);