ipq40xx: adapt to new Upstream QCA807x PHY driver

Adapt patches to new Upstream QCA807x PHY driver.

Rework the PHY patch to new PHY Package nodes.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>

4 files changed, 74 insertions, 153 deletions

diff --git a/target/linux/ipq40xx/patches-6.1/708-dt-bindings-net-add-QCA807x-PHY.patch b/target/linux/ipq40xx/patches-6.1/708-dt-bindings-net-add-QCA807x-PHY.patch
deleted file mode 100644
index b325d9e535..0000000000
--- a/target/linux/ipq40xx/patches-6.1/708-dt-bindings-net-add-QCA807x-PHY.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 96eb388c082bd0086b128d82def9daaab1617951 Mon Sep 17 00:00:00 2001
-From: Robert Marko <robert.marko@sartura.hr>
-Date: Thu, 1 Oct 2020 15:05:35 +0200
-Subject: [PATCH] dt-bindings: net: add QCA807x PHY
-
-Add DT bindings for Qualcomm QCA807x PHY series.
-
-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
----
- include/dt-bindings/net/qcom-qca807x.h | 45 ++++++++++++++++++++++++++
- 1 file changed, 45 insertions(+)
- create mode 100644 include/dt-bindings/net/qcom-qca807x.h
-
---- /dev/null
-+++ b/include/dt-bindings/net/qcom-qca807x.h
-@@ -0,0 +1,45 @@
-+/* SPDX-License-Identifier: GPL-2.0-or-later */
-+/*
-+ * Device Tree constants for the Qualcomm QCA807X PHYs
-+ */
-+
-+#ifndef _DT_BINDINGS_QCOM_QCA807X_H
-+#define _DT_BINDINGS_QCOM_QCA807X_H
-+
-+#define PSGMII_QSGMII_TX_DRIVER_140MV	0
-+#define PSGMII_QSGMII_TX_DRIVER_160MV	1
-+#define PSGMII_QSGMII_TX_DRIVER_180MV	2
-+#define PSGMII_QSGMII_TX_DRIVER_200MV	3
-+#define PSGMII_QSGMII_TX_DRIVER_220MV	4
-+#define PSGMII_QSGMII_TX_DRIVER_240MV	5
-+#define PSGMII_QSGMII_TX_DRIVER_260MV	6
-+#define PSGMII_QSGMII_TX_DRIVER_280MV	7
-+#define PSGMII_QSGMII_TX_DRIVER_300MV	8
-+#define PSGMII_QSGMII_TX_DRIVER_320MV	9
-+#define PSGMII_QSGMII_TX_DRIVER_400MV	10
-+#define PSGMII_QSGMII_TX_DRIVER_500MV	11
-+/* Default value */
-+#define PSGMII_QSGMII_TX_DRIVER_600MV	12
-+
-+/* Full amplitude, full bias current */
-+#define QCA807X_CONTROL_DAC_FULL_VOLT_BIAS		0
-+/* Amplitude follow DSP (amplitude is adjusted based on cable length), half bias current */
-+#define QCA807X_CONTROL_DAC_DSP_VOLT_HALF_BIAS		1
-+/* Full amplitude, bias current follow DSP (bias current is adjusted based on cable length) */
-+#define QCA807X_CONTROL_DAC_FULL_VOLT_DSP_BIAS		2
-+/* Both amplitude and bias current follow DSP */
-+#define QCA807X_CONTROL_DAC_DSP_VOLT_BIAS		3
-+/* Full amplitude, half bias current */
-+#define QCA807X_CONTROL_DAC_FULL_VOLT_HALF_BIAS		4
-+/* Amplitude follow DSP setting; 1/4 bias current when cable<10m,
-+ * otherwise half bias current
-+ */
-+#define QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS	5
-+/* Full amplitude; same bias current setting with “010” and “011”,
-+ * but half more bias is reduced when cable <10m
-+ */
-+#define QCA807X_CONTROL_DAC_FULL_VOLT_HALF_BIAS_SHORT	6
-+/* Amplitude follow DSP; same bias current setting with “110”, default value */
-+#define QCA807X_CONTROL_DAC_DSP_VOLT_HALF_BIAS_SHORT	7
-+
-+#endif
diff --git a/target/linux/ipq40xx/patches-6.1/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch b/target/linux/ipq40xx/patches-6.1/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch
new file mode 100644
index 0000000000..e8b89647ce
--- /dev/null
+++ b/target/linux/ipq40xx/patches-6.1/709-ARM-dts-qcom-ipq4019-add-QCA8075-PHY-Package-nodes.patch
@@ -0,0 +1,67 @@
+From 5ac078c8fe18f3e8318547b8ed0ed782730c5039 Mon Sep 17 00:00:00 2001
+From: Christian Marangi <ansuelsmth@gmail.com>
+Date: Sat, 10 Feb 2024 22:28:27 +0100
+Subject: [PATCH] ARM: dts: qcom: ipq4019: add QCA8075 PHY Package nodes
+
+Add QCA8075 PHY Package nodes. The PHY nodes that were previously
+defined never worked and actually never had a driver to correctly setup
+these PHY. Now that we have a correct driver, correctly add the PHY
+Package node and set the default value of 300mw for tx driver strength
+following specification of ipq4019 SoC.
+
+Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
+---
+ arch/arm/boot/dts//qcom-ipq4019.dtsi | 35 +++++++++++++++---------
+ 1 file changed, 22 insertions(+), 13 deletions(-)
+
+--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
+@@ -725,24 +725,33 @@
+ 			reg = <0x90000 0x64>;
+ 			status = "disabled";
+ 
+-			ethphy0: ethernet-phy@0 {
++			ethernet-phy-package@0 {
++				#address-cells = <1>;
++				#size-cells = <0>;
++				compatible = "qcom,qca8075-package";
+ 				reg = <0>;
+-			};
+-
+-			ethphy1: ethernet-phy@1 {
+-				reg = <1>;
+-			};
+ 
+-			ethphy2: ethernet-phy@2 {
+-				reg = <2>;
+-			};
+-
+-			ethphy3: ethernet-phy@3 {
+-				reg = <3>;
+-			};
++				qcom,tx-drive-strength-milliwatt = <300>;
+ 
+-			ethphy4: ethernet-phy@4 {
+-				reg = <4>;
++				ethphy0: ethernet-phy@0 {
++					reg = <0>;
++				};
++
++				ethphy1: ethernet-phy@1 {
++					reg = <1>;
++				};
++
++				ethphy2: ethernet-phy@2 {
++					reg = <2>;
++				};
++
++				ethphy3: ethernet-phy@3 {
++					reg = <3>;
++				};
++
++				ethphy4: ethernet-phy@4 {
++					reg = <4>;
++				};
+ 			};
+ 		};
+ 
diff --git a/target/linux/ipq40xx/patches-6.1/709-net-phy-Add-Qualcom-QCA807x-driver.patch b/target/linux/ipq40xx/patches-6.1/709-net-phy-Add-Qualcom-QCA807x-driver.patch
deleted file mode 100644
index 80b066c31c..0000000000
--- a/target/linux/ipq40xx/patches-6.1/709-net-phy-Add-Qualcom-QCA807x-driver.patch
+++ /dev/null
@@ -1,49 +0,0 @@
-From 876bb5b69c1e083be526c0ea261982d5eb78556f Mon Sep 17 00:00:00 2001
-From: Robert Marko <robert.marko@sartura.hr>
-Date: Fri, 9 Sep 2022 23:44:42 +0200
-Subject: [PATCH] net: phy: Add Qualcom QCA807x driver
-
-This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
-
-They are 2 or 5 port IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.
-
-They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC, while second one is SGMII for connection to MAC or fiber.
-
-Both models have a combo port that supports 1000BASE-X and 100BASE-FX fiber.
-
-Each PHY inside of QCA807x series has 4 digitally controlled output only pins that natively drive LED-s.
-But some vendors used these to driver generic LED-s controlled by userspace,
-so lets enable registering each PHY as GPIO controller and add driver for it.
-
-These are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x boards.
-
-Signed-off-by: Robert Marko <robert.marko@sartura.hr>
----
- drivers/net/phy/Kconfig  | 7 +++++++
- drivers/net/phy/Makefile | 1 +
- 2 files changed, 8 insertions(+)
-
---- a/drivers/net/phy/qcom/Kconfig
-+++ b/drivers/net/phy/qcom/Kconfig
-@@ -15,6 +15,13 @@ config QCA83XX_PHY
- 	help
- 	  Currently supports the internal QCA8337(Internal qca8k PHY) model
- 
-+config QCA807X_PHY
-+	tristate "Qualcomm QCA807x PHYs"
-+	depends on OF_MDIO
-+	help
-+	  Currently supports the Qualcomm QCA8072, QCA8075 and the PSGMII
-+	  control PHY.
-+
- config QCA808X_PHY
- 	tristate "Qualcomm QCA808x PHYs"
- 	select QCOM_NET_PHYLIB
---- a/drivers/net/phy/qcom/Makefile
-+++ b/drivers/net/phy/qcom/Makefile
-@@ -2,4 +2,5 @@
- obj-$(CONFIG_QCOM_NET_PHYLIB)	+= qcom-phy-lib.o
- obj-$(CONFIG_AT803X_PHY)	+= at803x.o
- obj-$(CONFIG_QCA83XX_PHY)	+= qca83xx.o
-+obj-$(CONFIG_QCA807X_PHY)		+= qca807x.o
- obj-$(CONFIG_QCA808X_PHY)	+= qca808x.o
diff --git a/target/linux/ipq40xx/patches-6.1/710-arm-dts-ipq4019-QCA807x-properties.patch b/target/linux/ipq40xx/patches-6.1/710-arm-dts-ipq4019-QCA807x-properties.patch
index 92fb8a6a02..a9ba70ff2f 100644
--- a/target/linux/ipq40xx/patches-6.1/710-arm-dts-ipq4019-QCA807x-properties.patch
+++ b/target/linux/ipq40xx/patches-6.1/710-arm-dts-ipq4019-QCA807x-properties.patch
@@ -12,50 +12,14 @@ Signed-off-by: Robert Marko <robert.marko@sartura.hr>
 
 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
 +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
-@@ -8,6 +8,7 @@
- #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/interrupt-controller/irq.h>
-+#include <dt-bindings/net/qcom-qca807x.h>
- 
- / {
- 	#address-cells = <1>;
-@@ -727,22 +728,38 @@
- 
- 			ethphy0: ethernet-phy@0 {
- 				reg = <0>;
-+
-+				qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
- 			};
- 
- 			ethphy1: ethernet-phy@1 {
- 				reg = <1>;
-+
-+				qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
- 			};
- 
- 			ethphy2: ethernet-phy@2 {
- 				reg = <2>;
-+
-+				qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
- 			};
- 
- 			ethphy3: ethernet-phy@3 {
- 				reg = <3>;
-+
-+				qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
- 			};
- 
- 			ethphy4: ethernet-phy@4 {
- 				reg = <4>;
-+
-+				qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
-+			};
-+
-+			psgmiiphy: psgmii-phy@5 {
-+				reg = <5>;
+@@ -752,6 +752,10 @@
+ 				ethphy4: ethernet-phy@4 {
+ 					reg = <4>;
+ 				};
 +
-+				qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
++				psgmiiphy: psgmii-phy@5 {
++					reg = <5>;
++				};
  			};
  		};